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1 | /* |
1 | /* |
2 | * Copyright (C) 2003-2004 Jakub Jermar |
2 | * Copyright (C) 2003-2004 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup mips32 |
29 | /** @addtogroup mips32 |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | */ |
33 | */ |
34 | 34 | ||
35 | #include <arch.h> |
35 | #include <arch.h> |
36 | #include <arch/boot.h> |
36 | #include <arch/boot.h> |
37 | #include <arch/cp0.h> |
37 | #include <arch/cp0.h> |
38 | #include <arch/exception.h> |
38 | #include <arch/exception.h> |
39 | #include <arch/asm.h> |
39 | #include <arch/asm.h> |
40 | #include <mm/as.h> |
40 | #include <mm/as.h> |
41 | 41 | ||
42 | #include <userspace.h> |
42 | #include <userspace.h> |
43 | #include <arch/console.h> |
43 | #include <arch/console.h> |
44 | #include <memstr.h> |
44 | #include <memstr.h> |
45 | #include <proc/thread.h> |
45 | #include <proc/thread.h> |
46 | #include <proc/uarg.h> |
46 | #include <proc/uarg.h> |
47 | #include <print.h> |
47 | #include <print.h> |
48 | #include <syscall/syscall.h> |
48 | #include <syscall/syscall.h> |
49 | #include <sysinfo/sysinfo.h> |
49 | #include <sysinfo/sysinfo.h> |
50 | 50 | ||
51 | #include <arch/interrupt.h> |
51 | #include <arch/interrupt.h> |
52 | #include <arch/drivers/arc.h> |
52 | #include <arch/drivers/arc.h> |
53 | #include <console/chardev.h> |
53 | #include <console/chardev.h> |
54 | #include <arch/debugger.h> |
54 | #include <arch/debugger.h> |
55 | #include <genarch/fb/fb.h> |
55 | #include <genarch/fb/fb.h> |
56 | #include <macros.h> |
56 | #include <macros.h> |
57 | 57 | ||
58 | #include <arch/asm/regname.h> |
58 | #include <arch/asm/regname.h> |
59 | 59 | ||
60 | /* Size of the code jumping to the exception handler code |
60 | /* Size of the code jumping to the exception handler code |
61 | * - J+NOP |
61 | * - J+NOP |
62 | */ |
62 | */ |
63 | #define EXCEPTION_JUMP_SIZE 8 |
63 | #define EXCEPTION_JUMP_SIZE 8 |
64 | 64 | ||
65 | #define TLB_EXC ((char *) 0x80000000) |
65 | #define TLB_EXC ((char *) 0x80000000) |
66 | #define NORM_EXC ((char *) 0x80000180) |
66 | #define NORM_EXC ((char *) 0x80000180) |
67 | #define CACHE_EXC ((char *) 0x80000100) |
67 | #define CACHE_EXC ((char *) 0x80000100) |
68 | 68 | ||
69 | 69 | ||
70 | /* Why the linker moves the variable 64K away in assembler |
70 | /* Why the linker moves the variable 64K away in assembler |
71 | * when not in .text section ???????? |
71 | * when not in .text section ???????? |
72 | */ |
72 | */ |
73 | uintptr_t supervisor_sp __attribute__ ((section (".text"))); |
73 | uintptr_t supervisor_sp __attribute__ ((section (".text"))); |
74 | /* Stack pointer saved when entering user mode */ |
74 | /* Stack pointer saved when entering user mode */ |
75 | /* TODO: How do we do it on SMP system???? */ |
75 | /* TODO: How do we do it on SMP system???? */ |
76 | bootinfo_t bootinfo __attribute__ ((section (".text"))); |
76 | bootinfo_t bootinfo __attribute__ ((section (".text"))); |
77 | 77 | ||
78 | void arch_pre_main(void) |
78 | void arch_pre_main(void) |
79 | { |
79 | { |
80 | /* Setup usermode */ |
80 | /* Setup usermode */ |
81 | init.cnt = bootinfo.cnt; |
81 | init.cnt = bootinfo.cnt; |
82 | 82 | ||
83 | uint32_t i; |
83 | uint32_t i; |
84 | 84 | ||
85 | for (i = 0; i < bootinfo.cnt; i++) { |
85 | for (i = 0; i < bootinfo.cnt; i++) { |
86 | init.tasks[i].addr = bootinfo.tasks[i].addr; |
86 | init.tasks[i].addr = bootinfo.tasks[i].addr; |
87 | init.tasks[i].size = bootinfo.tasks[i].size; |
87 | init.tasks[i].size = bootinfo.tasks[i].size; |
88 | } |
88 | } |
89 | } |
89 | } |
90 | 90 | ||
91 | void arch_pre_mm_init(void) |
91 | void arch_pre_mm_init(void) |
92 | { |
92 | { |
93 | /* It is not assumed by default */ |
93 | /* It is not assumed by default */ |
94 | interrupts_disable(); |
94 | interrupts_disable(); |
95 | 95 | ||
96 | /* Initialize dispatch table */ |
96 | /* Initialize dispatch table */ |
97 | exception_init(); |
97 | exception_init(); |
98 | arc_init(); |
98 | arc_init(); |
99 | 99 | ||
100 | /* Copy the exception vectors to the right places */ |
100 | /* Copy the exception vectors to the right places */ |
101 | memcpy(TLB_EXC, (char *)tlb_refill_entry, EXCEPTION_JUMP_SIZE); |
101 | memcpy(TLB_EXC, (char *)tlb_refill_entry, EXCEPTION_JUMP_SIZE); |
102 | memcpy(NORM_EXC, (char *)exception_entry, EXCEPTION_JUMP_SIZE); |
102 | memcpy(NORM_EXC, (char *)exception_entry, EXCEPTION_JUMP_SIZE); |
103 | memcpy(CACHE_EXC, (char *)cache_error_entry, EXCEPTION_JUMP_SIZE); |
103 | memcpy(CACHE_EXC, (char *)cache_error_entry, EXCEPTION_JUMP_SIZE); |
104 | 104 | ||
105 | interrupt_init(); |
105 | interrupt_init(); |
106 | /* |
106 | /* |
107 | * Switch to BEV normal level so that exception vectors point to the kernel. |
107 | * Switch to BEV normal level so that exception vectors point to the kernel. |
108 | * Clear the error level. |
108 | * Clear the error level. |
109 | */ |
109 | */ |
110 | cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit|cp0_status_erl_error_bit)); |
110 | cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit|cp0_status_erl_error_bit)); |
111 | 111 | ||
112 | /* |
112 | /* |
113 | * Mask all interrupts |
113 | * Mask all interrupts |
114 | */ |
114 | */ |
115 | cp0_mask_all_int(); |
115 | cp0_mask_all_int(); |
116 | 116 | ||
117 | /* |
117 | /* |
118 | * Unmask hardware clock interrupt. |
118 | * Unmask hardware clock interrupt. |
119 | */ |
119 | */ |
120 | cp0_unmask_int(TIMER_IRQ); |
120 | cp0_unmask_int(TIMER_IRQ); |
121 | 121 | ||
122 | console_init(); |
122 | console_init(); |
123 | debugger_init(); |
123 | debugger_init(); |
124 | } |
124 | } |
125 | 125 | ||
126 | void arch_post_mm_init(void) |
126 | void arch_post_mm_init(void) |
127 | { |
127 | { |
128 | #ifdef CONFIG_FB |
128 | #ifdef CONFIG_FB |
129 | fb_init(0x12000000, 640, 480, 24, 1920, false); // gxemul framebuffer |
129 | fb_init(0x12000000, 640, 480, 24, 1920, false); // gxemul framebuffer |
130 | #endif |
130 | #endif |
131 | sysinfo_set_item_val("machine." STRING(MACHINE),NULL,1); |
131 | sysinfo_set_item_val("machine." STRING(MACHINE),NULL,1); |
132 | } |
132 | } |
133 | 133 | ||
- | 134 | void arch_post_cpu_init(void) |
|
- | 135 | { |
|
- | 136 | } |
|
- | 137 | ||
134 | void arch_pre_smp_init(void) |
138 | void arch_pre_smp_init(void) |
135 | { |
139 | { |
136 | } |
140 | } |
137 | 141 | ||
138 | void arch_post_smp_init(void) |
142 | void arch_post_smp_init(void) |
139 | { |
143 | { |
140 | } |
144 | } |
141 | 145 | ||
142 | void userspace(uspace_arg_t *kernel_uarg) |
146 | void userspace(uspace_arg_t *kernel_uarg) |
143 | { |
147 | { |
144 | /* EXL=1, UM=1, IE=1 */ |
148 | /* EXL=1, UM=1, IE=1 */ |
145 | cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit | |
149 | cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit | |
146 | cp0_status_um_bit | |
150 | cp0_status_um_bit | |
147 | cp0_status_ie_enabled_bit)); |
151 | cp0_status_ie_enabled_bit)); |
148 | cp0_epc_write((uintptr_t) kernel_uarg->uspace_entry); |
152 | cp0_epc_write((uintptr_t) kernel_uarg->uspace_entry); |
149 | userspace_asm(((uintptr_t) kernel_uarg->uspace_stack+PAGE_SIZE), |
153 | userspace_asm(((uintptr_t) kernel_uarg->uspace_stack+PAGE_SIZE), |
150 | (uintptr_t) kernel_uarg->uspace_uarg, |
154 | (uintptr_t) kernel_uarg->uspace_uarg, |
151 | (uintptr_t) kernel_uarg->uspace_entry); |
155 | (uintptr_t) kernel_uarg->uspace_entry); |
152 | while (1) |
156 | while (1) |
153 | ; |
157 | ; |
154 | } |
158 | } |
155 | 159 | ||
156 | /** Perform mips32 specific tasks needed before the new task is run. */ |
160 | /** Perform mips32 specific tasks needed before the new task is run. */ |
157 | void before_task_runs_arch(void) |
161 | void before_task_runs_arch(void) |
158 | { |
162 | { |
159 | } |
163 | } |
160 | 164 | ||
161 | /** Perform mips32 specific tasks needed before the new thread is scheduled. */ |
165 | /** Perform mips32 specific tasks needed before the new thread is scheduled. */ |
162 | void before_thread_runs_arch(void) |
166 | void before_thread_runs_arch(void) |
163 | { |
167 | { |
164 | supervisor_sp = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA]; |
168 | supervisor_sp = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA]; |
165 | } |
169 | } |
166 | 170 | ||
167 | void after_thread_ran_arch(void) |
171 | void after_thread_ran_arch(void) |
168 | { |
172 | { |
169 | } |
173 | } |
170 | 174 | ||
171 | /** Set thread-local-storage pointer |
175 | /** Set thread-local-storage pointer |
172 | * |
176 | * |
173 | * We have it currently in K1, it is |
177 | * We have it currently in K1, it is |
174 | * possible to have it separately in the future. |
178 | * possible to have it separately in the future. |
175 | */ |
179 | */ |
176 | unative_t sys_tls_set(unative_t addr) |
180 | unative_t sys_tls_set(unative_t addr) |
177 | { |
181 | { |
178 | return 0; |
182 | return 0; |
179 | } |
183 | } |
180 | 184 | ||
181 | /** @} |
185 | /** @} |
182 | */ |
186 | */ |
183 | 187 |