WebSVN – HelenOS – Diff – /trunk/kernel/arch/mips32/src/mips32.c


/*
 * Copyright (c) 2003-2004 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup mips32
 * @{
 */
/** @file
 */
 
#include <arch.h>
#include <arch/cp0.h>
#include <arch/exception.h>
#include <mm/as.h>
 
#include <userspace.h>
#include <arch/console.h>
#include <memstr.h>
#include <proc/thread.h>
#include <proc/uarg.h>
#include <print.h>
#include <syscall/syscall.h>
#include <sysinfo/sysinfo.h>
 
#include <arch/interrupt.h>
#include <console/chardev.h>
#include <arch/barrier.h>
#include <arch/debugger.h>
#include <genarch/fb/fb.h>
#include <genarch/fb/visuals.h>
#include <genarch/drivers/dsrln/dsrlnin.h>
#include <genarch/drivers/dsrln/dsrlnout.h>
#include <genarch/srln/srln.h>
#include <macros.h>
#include <ddi/device.h>
#include <config.h>
#include <string.h>
#include <arch/drivers/msim.h>
 
#include <arch/asm/regname.h>
 
/* Size of the code jumping to the exception handler code
 * - J+NOP
 */
#define EXCEPTION_JUMP_SIZE  8
 
#define TLB_EXC    ((char *) 0x80000000)
#define NORM_EXC   ((char *) 0x80000180)
#define CACHE_EXC  ((char *) 0x80000100)
 
 
/* Why the linker moves the variable 64K away in assembler
 * when not in .text section?
 */
 
/* Stack pointer saved when entering user mode */
uintptr_t supervisor_sp __attribute__ ((section (".text")));
 
count_t cpu_count = 0;
 
/** Performs mips32-specific initialization before main_bsp() is called. */
void arch_pre_main(void *entry __attribute__((unused)), bootinfo_t *bootinfo)
{
    /* Setup usermode */
    init.cnt = bootinfo->cnt;
   
    count_t i;
    for (i = 0; i < min3(bootinfo->cnt, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS); i++) {
        init.tasks[i].addr = bootinfo->tasks[i].addr;
        init.tasks[i].size = bootinfo->tasks[i].size;
        strncpy(init.tasks[i].name, bootinfo->tasks[i].name,
            CONFIG_TASK_NAME_BUFLEN);
    }
   
    for (i = 0; i < CPUMAP_MAX_RECORDS; i++) {
        if ((bootinfo->cpumap & (1 << i)) != 0)
            cpu_count++;
    }
}
 
void arch_pre_mm_init(void)
{
    /* It is not assumed by default */
    interrupts_disable();
   
    /* Initialize dispatch table */
    exception_init();
 
    /* Copy the exception vectors to the right places */
    memcpy(TLB_EXC, (char *) tlb_refill_entry, EXCEPTION_JUMP_SIZE);
    smc_coherence_block(TLB_EXC, EXCEPTION_JUMP_SIZE);
    memcpy(NORM_EXC, (char *) exception_entry, EXCEPTION_JUMP_SIZE);
    smc_coherence_block(NORM_EXC, EXCEPTION_JUMP_SIZE);
    memcpy(CACHE_EXC, (char *) cache_error_entry, EXCEPTION_JUMP_SIZE);
    smc_coherence_block(CACHE_EXC, EXCEPTION_JUMP_SIZE);
   
    /*
     * Switch to BEV normal level so that exception vectors point to the
     * kernel. Clear the error level.
     */
    cp0_status_write(cp0_status_read() &
        ~(cp0_status_bev_bootstrap_bit | cp0_status_erl_error_bit));
   
    /*
     * Mask all interrupts
     */
    cp0_mask_all_int();
   
    debugger_init();
}
 
void arch_post_mm_init(void)
{
    interrupt_init();
 
   
#ifdef CONFIG_FB
    /* GXemul framebuffer */
    fb_properties_t gxemul_prop = {
        .addr = 0x12000000,
        .offset = 0,
        .x = 640,
        .y = 480,
        .scan = 1920,
        .visual = VISUAL_BGR_8_8_8,
    };
    fb_init(&gxemul_prop);
#else
 
 
 
 
 
#ifdef CONFIG_MIPS_PRN
    dsrlnout_init((ioport8_t *) MSIM_KBD_ADDRESS);
 
 
#endif /* CONFIG_MIPS_PRN */
 
 
 
#endif /* CONFIG_FB */
 
 
}
 
void arch_post_cpu_init(void)
{
}
 
void arch_pre_smp_init(void)
{
}
 
void arch_post_smp_init(void)
{
#ifdef CONFIG_MIPS_KBD
    devno_t devno = device_assign_devno();
   
    /*
     * Initialize the msim/GXemul keyboard port. Then initialize the serial line
     * module and connect it to the msim/GXemul keyboard. Enable keyboard interrupts.
     */
    indev_t *kbrdin = dsrlnin_init((dsrlnin_t *) MSIM_KBD_ADDRESS, devno, MSIM_KBD_IRQ);
    if (kbrdin) {
        srln_init(kbrdin);
        cp0_unmask_int(MSIM_KBD_IRQ);
    }
   
    /*
     * This is the necessary evil until the userspace driver is entirely
     * self-sufficient.
     */
    sysinfo_set_item_val("kbd", NULL, true);
    sysinfo_set_item_val("kbd.devno", NULL, devno);
    sysinfo_set_item_val("kbd.inr", NULL, MSIM_KBD_IRQ);
    sysinfo_set_item_val("kbd.address.virtual", NULL, MSIM_KBD_ADDRESS);
#endif
}
 
void calibrate_delay_loop(void)
{
}
 
void userspace(uspace_arg_t *kernel_uarg)
{
    /* EXL = 1, UM = 1, IE = 1 */
    cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit |
        cp0_status_um_bit | cp0_status_ie_enabled_bit));
    cp0_epc_write((uintptr_t) kernel_uarg->uspace_entry);
    userspace_asm(((uintptr_t) kernel_uarg->uspace_stack + PAGE_SIZE),
        (uintptr_t) kernel_uarg->uspace_uarg,
        (uintptr_t) kernel_uarg->uspace_entry);
   
    while (1);
}
 
/** Perform mips32 specific tasks needed before the new task is run. */
void before_task_runs_arch(void)
{
}
 
/** Perform mips32 specific tasks needed before the new thread is scheduled. */
void before_thread_runs_arch(void)
{
    supervisor_sp = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE -
        SP_DELTA];
}
 
void after_thread_ran_arch(void)
{
}
 
/** Set thread-local-storage pointer
 *
 * We have it currently in K1, it is
 * possible to have it separately in the future.
 */
unative_t sys_tls_set(unative_t addr)
{
    return 0;
}
 
void arch_reboot(void)
{
    ___halt();
 
    while (1);
}
 
/** Construct function pointer
 *
 * @param fptr   function pointer structure
 * @param addr   function address
 * @param caller calling function address
 *
 * @return address of the function pointer
 *
 */
void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
{
    return addr;
}
 
/** @}
 */
 

Rev 4046	Rev 4109
1	/*	1	/*
2	* Copyright (c) 2003-2004 Jakub Jermar	2	* Copyright (c) 2003-2004 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup mips32	29	/** @addtogroup mips32
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35	#include <arch.h>	35	#include <arch.h>
36	#include <arch/cp0.h>	36	#include <arch/cp0.h>
37	#include <arch/exception.h>	37	#include <arch/exception.h>
38	#include <mm/as.h>	38	#include <mm/as.h>
39		39
40	#include <userspace.h>	40	#include <userspace.h>
41	#include <arch/console.h>	41	#include <arch/console.h>
42	#include <memstr.h>	42	#include <memstr.h>
43	#include <proc/thread.h>	43	#include <proc/thread.h>
44	#include <proc/uarg.h>	44	#include <proc/uarg.h>
45	#include <print.h>	45	#include <print.h>
46	#include <syscall/syscall.h>	46	#include <syscall/syscall.h>
47	#include <sysinfo/sysinfo.h>	47	#include <sysinfo/sysinfo.h>
48		48
49	#include <arch/interrupt.h>	49	#include <arch/interrupt.h>
50	#include <console/chardev.h>	50	#include <console/chardev.h>
51	#include <arch/barrier.h>	51	#include <arch/barrier.h>
52	#include <arch/debugger.h>	52	#include <arch/debugger.h>
53	#include <genarch/fb/fb.h>	53	#include <genarch/fb/fb.h>
54	#include <genarch/fb/visuals.h>	54	#include <genarch/fb/visuals.h>
-		55	#include <genarch/drivers/dsrln/dsrlnin.h>
-		56	#include <genarch/drivers/dsrln/dsrlnout.h>
-		57	#include <genarch/srln/srln.h>
55	#include <macros.h>	58	#include <macros.h>
56	#include <ddi/device.h>	59	#include <ddi/device.h>
57	#include <config.h>	60	#include <config.h>
58	#include <string.h>	61	#include <string.h>
59	#include <arch/drivers/msim.h>	62	#include <arch/drivers/msim.h>
60		63
61	#include <arch/asm/regname.h>	64	#include <arch/asm/regname.h>
62		65
63	/* Size of the code jumping to the exception handler code	66	/* Size of the code jumping to the exception handler code
64	* - J+NOP	67	* - J+NOP
65	*/	68	*/
66	#define EXCEPTION_JUMP_SIZE 8	69	#define EXCEPTION_JUMP_SIZE 8
67		70
68	#define TLB_EXC ((char *) 0x80000000)	71	#define TLB_EXC ((char *) 0x80000000)
69	#define NORM_EXC ((char *) 0x80000180)	72	#define NORM_EXC ((char *) 0x80000180)
70	#define CACHE_EXC ((char *) 0x80000100)	73	#define CACHE_EXC ((char *) 0x80000100)
71		74
72		75
73	/* Why the linker moves the variable 64K away in assembler	76	/* Why the linker moves the variable 64K away in assembler
74	* when not in .text section?	77	* when not in .text section?
75	*/	78	*/
76		79
77	/* Stack pointer saved when entering user mode */	80	/* Stack pointer saved when entering user mode */
78	uintptr_t supervisor_sp __attribute__ ((section (".text")));	81	uintptr_t supervisor_sp __attribute__ ((section (".text")));
79		82
80	count_t cpu_count = 0;	83	count_t cpu_count = 0;
81		84
82	/** Performs mips32-specific initialization before main_bsp() is called. */	85	/** Performs mips32-specific initialization before main_bsp() is called. */
83	void arch_pre_main(void entry __attribute__((unused)), bootinfo_t bootinfo)	86	void arch_pre_main(void entry __attribute__((unused)), bootinfo_t bootinfo)
84	{	87	{
85	/* Setup usermode */	88	/* Setup usermode */
86	init.cnt = bootinfo->cnt;	89	init.cnt = bootinfo->cnt;
87		90
88	count_t i;	91	count_t i;
89	for (i = 0; i < min3(bootinfo->cnt, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS); i++) {	92	for (i = 0; i < min3(bootinfo->cnt, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS); i++) {
90	init.tasks[i].addr = bootinfo->tasks[i].addr;	93	init.tasks[i].addr = bootinfo->tasks[i].addr;
91	init.tasks[i].size = bootinfo->tasks[i].size;	94	init.tasks[i].size = bootinfo->tasks[i].size;
92	strncpy(init.tasks[i].name, bootinfo->tasks[i].name,	95	strncpy(init.tasks[i].name, bootinfo->tasks[i].name,
93	CONFIG_TASK_NAME_BUFLEN);	96	CONFIG_TASK_NAME_BUFLEN);
94	}	97	}
95		98
96	for (i = 0; i < CPUMAP_MAX_RECORDS; i++) {	99	for (i = 0; i < CPUMAP_MAX_RECORDS; i++) {
97	if ((bootinfo->cpumap & (1 << i)) != 0)	100	if ((bootinfo->cpumap & (1 << i)) != 0)
98	cpu_count++;	101	cpu_count++;
99	}	102	}
100	}	103	}
101		104
102	void arch_pre_mm_init(void)	105	void arch_pre_mm_init(void)
103	{	106	{
104	/* It is not assumed by default */	107	/* It is not assumed by default */
105	interrupts_disable();	108	interrupts_disable();
106		109
107	/* Initialize dispatch table */	110	/* Initialize dispatch table */
108	exception_init();	111	exception_init();
109		112
110	/* Copy the exception vectors to the right places */	113	/* Copy the exception vectors to the right places */
111	memcpy(TLB_EXC, (char *) tlb_refill_entry, EXCEPTION_JUMP_SIZE);	114	memcpy(TLB_EXC, (char *) tlb_refill_entry, EXCEPTION_JUMP_SIZE);
112	smc_coherence_block(TLB_EXC, EXCEPTION_JUMP_SIZE);	115	smc_coherence_block(TLB_EXC, EXCEPTION_JUMP_SIZE);
113	memcpy(NORM_EXC, (char *) exception_entry, EXCEPTION_JUMP_SIZE);	116	memcpy(NORM_EXC, (char *) exception_entry, EXCEPTION_JUMP_SIZE);
114	smc_coherence_block(NORM_EXC, EXCEPTION_JUMP_SIZE);	117	smc_coherence_block(NORM_EXC, EXCEPTION_JUMP_SIZE);
115	memcpy(CACHE_EXC, (char *) cache_error_entry, EXCEPTION_JUMP_SIZE);	118	memcpy(CACHE_EXC, (char *) cache_error_entry, EXCEPTION_JUMP_SIZE);
116	smc_coherence_block(CACHE_EXC, EXCEPTION_JUMP_SIZE);	119	smc_coherence_block(CACHE_EXC, EXCEPTION_JUMP_SIZE);
117		120
118	/*	121	/*
119	* Switch to BEV normal level so that exception vectors point to the	122	* Switch to BEV normal level so that exception vectors point to the
120	* kernel. Clear the error level.	123	* kernel. Clear the error level.
121	*/	124	*/
122	cp0_status_write(cp0_status_read() &	125	cp0_status_write(cp0_status_read() &
123	~(cp0_status_bev_bootstrap_bit \| cp0_status_erl_error_bit));	126	~(cp0_status_bev_bootstrap_bit \| cp0_status_erl_error_bit));
124		127
125	/*	128	/*
126	* Mask all interrupts	129	* Mask all interrupts
127	*/	130	*/
128	cp0_mask_all_int();	131	cp0_mask_all_int();
129		132
130	debugger_init();	133	debugger_init();
131	}	134	}
132		135
133	void arch_post_mm_init(void)	136	void arch_post_mm_init(void)
134	{	137	{
135	interrupt_init();	138	interrupt_init();
136	msim_console(device_assign_devno());	-
-		139
137	#ifdef CONFIG_FB	140	#ifdef CONFIG_FB
138	/* GXemul framebuffer */	141	/* GXemul framebuffer */
139	fb_properties_t gxemul_prop = {	142	fb_properties_t gxemul_prop = {
140	.addr = 0x12000000,	143	.addr = 0x12000000,
141	.offset = 0,	144	.offset = 0,
142	.x = 640,	145	.x = 640,
143	.y = 480,	146	.y = 480,
144	.scan = 1920,	147	.scan = 1920,
145	.visual = VISUAL_BGR_8_8_8,	148	.visual = VISUAL_BGR_8_8_8,
146	};	149	};
147	fb_init(&gxemul_prop);	150	fb_init(&gxemul_prop);
148	#endif	151	#else
149		-
150	#ifdef MACHINE_msim	-
151	sysinfo_set_item_val("machine.msim", NULL, 1);	-
152	#endif	-
153		-
154	#ifdef MACHINE_simics	152	#ifdef CONFIG_MIPS_PRN
155	sysinfo_set_item_val("machine.simics", NULL, 1);	153	dsrlnout_init((ioport8_t *) MSIM_KBD_ADDRESS);
156	#endif	-
157		-
158	#ifdef MACHINE_bgxemul	154	#endif /* CONFIG_MIPS_PRN */
159	sysinfo_set_item_val("machine.bgxemul", NULL, 1);	-
160	#endif	-
161		-
162	#ifdef MACHINE_lgxemul	155	#endif /* CONFIG_FB */
163	sysinfo_set_item_val("machine.lgxemul", NULL, 1);	-
164	#endif	-
165	}	156	}
166		157
167	void arch_post_cpu_init(void)	158	void arch_post_cpu_init(void)
168	{	159	{
169	}	160	}
170		161
171	void arch_pre_smp_init(void)	162	void arch_pre_smp_init(void)
172	{	163	{
173	}	164	}
174		165
175	void arch_post_smp_init(void)	166	void arch_post_smp_init(void)
176	{	167	{
-		168	#ifdef CONFIG_MIPS_KBD
-		169	devno_t devno = device_assign_devno();
-		170
-		171	/*
-		172	* Initialize the msim/GXemul keyboard port. Then initialize the serial line
-		173	* module and connect it to the msim/GXemul keyboard. Enable keyboard interrupts.
-		174	*/
-		175	indev_t kbrdin = dsrlnin_init((dsrlnin_t ) MSIM_KBD_ADDRESS, devno, MSIM_KBD_IRQ);
-		176	if (kbrdin) {
-		177	srln_init(kbrdin);
-		178	cp0_unmask_int(MSIM_KBD_IRQ);
-		179	}
-		180
-		181	/*
-		182	* This is the necessary evil until the userspace driver is entirely
-		183	* self-sufficient.
-		184	*/
-		185	sysinfo_set_item_val("kbd", NULL, true);
-		186	sysinfo_set_item_val("kbd.devno", NULL, devno);
-		187	sysinfo_set_item_val("kbd.inr", NULL, MSIM_KBD_IRQ);
-		188	sysinfo_set_item_val("kbd.address.virtual", NULL, MSIM_KBD_ADDRESS);
-		189	#endif
177	}	190	}
178		191
179	void calibrate_delay_loop(void)	192	void calibrate_delay_loop(void)
180	{	193	{
181	}	194	}
182		195
183	void userspace(uspace_arg_t *kernel_uarg)	196	void userspace(uspace_arg_t *kernel_uarg)
184	{	197	{
185	/* EXL = 1, UM = 1, IE = 1 */	198	/* EXL = 1, UM = 1, IE = 1 */
186	cp0_status_write(cp0_status_read() \| (cp0_status_exl_exception_bit \|	199	cp0_status_write(cp0_status_read() \| (cp0_status_exl_exception_bit \|
187	cp0_status_um_bit \| cp0_status_ie_enabled_bit));	200	cp0_status_um_bit \| cp0_status_ie_enabled_bit));
188	cp0_epc_write((uintptr_t) kernel_uarg->uspace_entry);	201	cp0_epc_write((uintptr_t) kernel_uarg->uspace_entry);
189	userspace_asm(((uintptr_t) kernel_uarg->uspace_stack + PAGE_SIZE),	202	userspace_asm(((uintptr_t) kernel_uarg->uspace_stack + PAGE_SIZE),
190	(uintptr_t) kernel_uarg->uspace_uarg,	203	(uintptr_t) kernel_uarg->uspace_uarg,
191	(uintptr_t) kernel_uarg->uspace_entry);	204	(uintptr_t) kernel_uarg->uspace_entry);
192		205
193	while (1);	206	while (1);
194	}	207	}
195		208
196	/** Perform mips32 specific tasks needed before the new task is run. */	209	/** Perform mips32 specific tasks needed before the new task is run. */
197	void before_task_runs_arch(void)	210	void before_task_runs_arch(void)
198	{	211	{
199	}	212	}
200		213
201	/** Perform mips32 specific tasks needed before the new thread is scheduled. */	214	/** Perform mips32 specific tasks needed before the new thread is scheduled. */
202	void before_thread_runs_arch(void)	215	void before_thread_runs_arch(void)
203	{	216	{
204	supervisor_sp = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE -	217	supervisor_sp = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE -
205	SP_DELTA];	218	SP_DELTA];
206	}	219	}
207		220
208	void after_thread_ran_arch(void)	221	void after_thread_ran_arch(void)
209	{	222	{
210	}	223	}
211		224
212	/** Set thread-local-storage pointer	225	/** Set thread-local-storage pointer
213	*	226	*
214	* We have it currently in K1, it is	227	* We have it currently in K1, it is
215	* possible to have it separately in the future.	228	* possible to have it separately in the future.
216	*/	229	*/
217	unative_t sys_tls_set(unative_t addr)	230	unative_t sys_tls_set(unative_t addr)
218	{	231	{
219	return 0;	232	return 0;
220	}	233	}
221		234
222	void arch_reboot(void)	235	void arch_reboot(void)
223	{	236	{
224	___halt();	237	___halt();
225		-
226	while (1);	238	while (1);
227	}	239	}
228		240
229	/** Construct function pointer	241	/** Construct function pointer
230	*	242	*
231	* @param fptr function pointer structure	243	* @param fptr function pointer structure
232	* @param addr function address	244	* @param addr function address
233	* @param caller calling function address	245	* @param caller calling function address
234	*	246	*
235	* @return address of the function pointer	247	* @return address of the function pointer
236	*	248	*
237	*/	249	*/
238	void arch_construct_function(fncptr_t fptr, void addr, void caller)	250	void arch_construct_function(fncptr_t fptr, void addr, void caller)
239	{	251	{
240	return addr;	252	return addr;
241	}	253	}
242		254
243	/** @}	255	/** @}
244	*/	256	*/
245		257

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(root)/trunk/kernel/arch/mips32/src/mips32.c @ 2773 – Rev 4046 → 4109