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1 | /* |
1 | /* |
2 | * Copyright (C) 2003-2004 Jakub Jermar |
2 | * Copyright (C) 2003-2004 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | 29 | ||
30 | #include <arch.h> |
30 | #include <arch.h> |
- | 31 | #include <arch/boot.h> |
|
31 | #include <arch/cp0.h> |
32 | #include <arch/cp0.h> |
32 | #include <arch/exception.h> |
33 | #include <arch/exception.h> |
33 | #include <arch/asm.h> |
34 | #include <arch/asm.h> |
34 | #include <mm/as.h> |
35 | #include <mm/as.h> |
35 | 36 | ||
36 | #include <userspace.h> |
37 | #include <userspace.h> |
37 | #include <arch/console.h> |
38 | #include <arch/console.h> |
38 | #include <memstr.h> |
39 | #include <memstr.h> |
39 | #include <proc/thread.h> |
40 | #include <proc/thread.h> |
40 | #include <proc/uarg.h> |
41 | #include <proc/uarg.h> |
41 | #include <print.h> |
42 | #include <print.h> |
42 | #include <syscall/syscall.h> |
43 | #include <syscall/syscall.h> |
43 | #include <sysinfo/sysinfo.h> |
44 | #include <sysinfo/sysinfo.h> |
44 | 45 | ||
45 | #include <arch/interrupt.h> |
46 | #include <arch/interrupt.h> |
46 | #include <arch/drivers/arc.h> |
47 | #include <arch/drivers/arc.h> |
47 | #include <console/chardev.h> |
48 | #include <console/chardev.h> |
48 | #include <arch/debugger.h> |
49 | #include <arch/debugger.h> |
49 | #include <genarch/fb/fb.h> |
50 | #include <genarch/fb/fb.h> |
50 | #include <debug.h> |
51 | #include <debug.h> |
51 | 52 | ||
52 | #include <arch/asm/regname.h> |
53 | #include <arch/asm/regname.h> |
53 | 54 | ||
54 | /* Size of the code jumping to the exception handler code |
55 | /* Size of the code jumping to the exception handler code |
55 | * - J+NOP |
56 | * - J+NOP |
56 | */ |
57 | */ |
57 | #define EXCEPTION_JUMP_SIZE 8 |
58 | #define EXCEPTION_JUMP_SIZE 8 |
58 | 59 | ||
59 | #define TLB_EXC ((char *) 0x80000000) |
60 | #define TLB_EXC ((char *) 0x80000000) |
60 | #define NORM_EXC ((char *) 0x80000180) |
61 | #define NORM_EXC ((char *) 0x80000180) |
61 | #define CACHE_EXC ((char *) 0x80000100) |
62 | #define CACHE_EXC ((char *) 0x80000100) |
62 | 63 | ||
- | 64 | bootinfo_t bootinfo; |
|
- | 65 | ||
63 | void arch_pre_main(void) |
66 | void arch_pre_main(void) |
64 | { |
67 | { |
65 | /* Setup usermode */ |
68 | /* Setup usermode */ |
66 | init.cnt = 8; |
69 | init.cnt = bootinfo.cnt; |
67 | init.tasks[0].addr = INIT_ADDRESS; |
- | |
68 | init.tasks[0].size = INIT_SIZE; |
- | |
69 | init.tasks[1].addr = INIT_ADDRESS + 0x100000; |
- | |
70 | init.tasks[1].size = INIT_SIZE; |
- | |
71 | init.tasks[2].addr = INIT_ADDRESS + 0x200000; |
- | |
- | 70 | ||
72 | init.tasks[2].size = INIT_SIZE; |
71 | __u32 i; |
73 | init.tasks[3].addr = INIT_ADDRESS + 0x300000; |
- | |
- | 72 | ||
74 | init.tasks[3].size = INIT_SIZE; |
73 | for (i = 0; i < bootinfo.cnt; i++) { |
75 | init.tasks[4].addr = INIT_ADDRESS + 0x400000; |
- | |
76 | init.tasks[4].size = INIT_SIZE; |
- | |
77 | init.tasks[5].addr = INIT_ADDRESS + 0x500000; |
- | |
78 | init.tasks[5].size = INIT_SIZE; |
- | |
79 | init.tasks[6].addr = INIT_ADDRESS + 0x600000; |
- | |
80 | init.tasks[6].size = INIT_SIZE; |
- | |
81 | init.tasks[7].addr = INIT_ADDRESS + 0x700000; |
74 | init.tasks[i].addr = bootinfo.tasks[i].addr; |
82 | init.tasks[7].size = INIT_SIZE; |
75 | init.tasks[i].size = bootinfo.tasks[i].size; |
- | 76 | } |
|
83 | } |
77 | } |
84 | 78 | ||
85 | void arch_pre_mm_init(void) |
79 | void arch_pre_mm_init(void) |
86 | { |
80 | { |
87 | /* It is not assumed by default */ |
81 | /* It is not assumed by default */ |
88 | interrupts_disable(); |
82 | interrupts_disable(); |
89 | 83 | ||
90 | /* Initialize dispatch table */ |
84 | /* Initialize dispatch table */ |
91 | exception_init(); |
85 | exception_init(); |
92 | arc_init(); |
86 | arc_init(); |
93 | 87 | ||
94 | /* Copy the exception vectors to the right places */ |
88 | /* Copy the exception vectors to the right places */ |
95 | memcpy(TLB_EXC, (char *)tlb_refill_entry, EXCEPTION_JUMP_SIZE); |
89 | memcpy(TLB_EXC, (char *)tlb_refill_entry, EXCEPTION_JUMP_SIZE); |
96 | memcpy(NORM_EXC, (char *)exception_entry, EXCEPTION_JUMP_SIZE); |
90 | memcpy(NORM_EXC, (char *)exception_entry, EXCEPTION_JUMP_SIZE); |
97 | memcpy(CACHE_EXC, (char *)cache_error_entry, EXCEPTION_JUMP_SIZE); |
91 | memcpy(CACHE_EXC, (char *)cache_error_entry, EXCEPTION_JUMP_SIZE); |
98 | 92 | ||
99 | interrupt_init(); |
93 | interrupt_init(); |
100 | /* |
94 | /* |
101 | * Switch to BEV normal level so that exception vectors point to the kernel. |
95 | * Switch to BEV normal level so that exception vectors point to the kernel. |
102 | * Clear the error level. |
96 | * Clear the error level. |
103 | */ |
97 | */ |
104 | cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit|cp0_status_erl_error_bit)); |
98 | cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit|cp0_status_erl_error_bit)); |
105 | 99 | ||
106 | /* |
100 | /* |
107 | * Mask all interrupts |
101 | * Mask all interrupts |
108 | */ |
102 | */ |
109 | cp0_mask_all_int(); |
103 | cp0_mask_all_int(); |
110 | 104 | ||
111 | /* |
105 | /* |
112 | * Unmask hardware clock interrupt. |
106 | * Unmask hardware clock interrupt. |
113 | */ |
107 | */ |
114 | cp0_unmask_int(TIMER_IRQ); |
108 | cp0_unmask_int(TIMER_IRQ); |
115 | 109 | ||
116 | console_init(); |
110 | console_init(); |
117 | debugger_init(); |
111 | debugger_init(); |
118 | } |
112 | } |
119 | 113 | ||
120 | void arch_post_mm_init(void) |
114 | void arch_post_mm_init(void) |
121 | { |
115 | { |
122 | #ifdef CONFIG_FB |
116 | #ifdef CONFIG_FB |
123 | fb_init(0x12000000, 640, 480, 24, 1920); // gxemul framebuffer |
117 | fb_init(0x12000000, 640, 480, 24, 1920); // gxemul framebuffer |
124 | #endif |
118 | #endif |
125 | sysinfo_set_item_val("machine." STRING(MACHINE),NULL,1); |
119 | sysinfo_set_item_val("machine." STRING(MACHINE),NULL,1); |
126 | } |
120 | } |
127 | 121 | ||
128 | void arch_pre_smp_init(void) |
122 | void arch_pre_smp_init(void) |
129 | { |
123 | { |
130 | } |
124 | } |
131 | 125 | ||
132 | void arch_post_smp_init(void) |
126 | void arch_post_smp_init(void) |
133 | { |
127 | { |
134 | } |
128 | } |
135 | 129 | ||
136 | /* Stack pointer saved when entering user mode */ |
130 | /* Stack pointer saved when entering user mode */ |
137 | /* TODO: How do we do it on SMP system???? */ |
131 | /* TODO: How do we do it on SMP system???? */ |
138 | 132 | ||
139 | /* Why the linker moves the variable 64K away in assembler |
133 | /* Why the linker moves the variable 64K away in assembler |
140 | * when not in .text section ???????? |
134 | * when not in .text section ???????? |
141 | */ |
135 | */ |
142 | __address supervisor_sp __attribute__ ((section (".text"))); |
136 | __address supervisor_sp __attribute__ ((section (".text"))); |
143 | 137 | ||
144 | void userspace(uspace_arg_t *kernel_uarg) |
138 | void userspace(uspace_arg_t *kernel_uarg) |
145 | { |
139 | { |
146 | /* EXL=1, UM=1, IE=1 */ |
140 | /* EXL=1, UM=1, IE=1 */ |
147 | cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit | |
141 | cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit | |
148 | cp0_status_um_bit | |
142 | cp0_status_um_bit | |
149 | cp0_status_ie_enabled_bit)); |
143 | cp0_status_ie_enabled_bit)); |
150 | cp0_epc_write((__address) kernel_uarg->uspace_entry); |
144 | cp0_epc_write((__address) kernel_uarg->uspace_entry); |
151 | userspace_asm(((__address) kernel_uarg->uspace_stack+PAGE_SIZE), |
145 | userspace_asm(((__address) kernel_uarg->uspace_stack+PAGE_SIZE), |
152 | (__address) kernel_uarg->uspace_uarg, |
146 | (__address) kernel_uarg->uspace_uarg, |
153 | (__address) kernel_uarg->uspace_entry); |
147 | (__address) kernel_uarg->uspace_entry); |
154 | while (1) |
148 | while (1) |
155 | ; |
149 | ; |
156 | } |
150 | } |
157 | 151 | ||
158 | /** Perform mips32 specific tasks needed before the new task is run. */ |
152 | /** Perform mips32 specific tasks needed before the new task is run. */ |
159 | void before_task_runs_arch(void) |
153 | void before_task_runs_arch(void) |
160 | { |
154 | { |
161 | } |
155 | } |
162 | 156 | ||
163 | /** Perform mips32 specific tasks needed before the new thread is scheduled. */ |
157 | /** Perform mips32 specific tasks needed before the new thread is scheduled. */ |
164 | void before_thread_runs_arch(void) |
158 | void before_thread_runs_arch(void) |
165 | { |
159 | { |
166 | supervisor_sp = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA]; |
160 | supervisor_sp = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA]; |
167 | } |
161 | } |
168 | 162 | ||
169 | void after_thread_ran_arch(void) |
163 | void after_thread_ran_arch(void) |
170 | { |
164 | { |
171 | } |
165 | } |
172 | 166 | ||
173 | /** Set thread-local-storage pointer |
167 | /** Set thread-local-storage pointer |
174 | * |
168 | * |
175 | * We have it currently in K1, it is |
169 | * We have it currently in K1, it is |
176 | * possible to have it separately in the future. |
170 | * possible to have it separately in the future. |
177 | */ |
171 | */ |
178 | __native sys_tls_set(__native addr) |
172 | __native sys_tls_set(__native addr) |
179 | { |
173 | { |
180 | return 0; |
174 | return 0; |
181 | } |
175 | } |
182 | 176 | ||
183 | 177 |