WebSVN – HelenOS – Diff – /trunk/kernel/arch/mips32/src/exception.c


/*
 * Copyright (c) 2003-2004 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup mips32 
 * @{
 */
/** @file
 */
 
#include <arch/exception.h>
#include <arch/interrupt.h>
#include <arch/mm/tlb.h>
#include <panic.h>
#include <arch/cp0.h>
#include <arch/types.h>
#include <arch.h>
#include <debug.h>
#include <proc/thread.h>
 
#include <print.h>
#include <interrupt.h>
#include <func.h>
#include <ddi/irq.h>
#include <arch/debugger.h>
 
#ifdef CONFIG_SYMTAB
#include <symtab.h>
#endif
 
static char * exctable[] = {
    "Interrupt",
    "TLB Modified",
    "TLB Invalid",
    "TLB Invalid Store",
    "Address Error - load/instr. fetch",
    "Address Error - store",
    "Bus Error - fetch instruction",
    "Bus Error - data reference",
    "Syscall",
    "BreakPoint",
    "Reserved Instruction",
    "Coprocessor Unusable",
    "Arithmetic Overflow",
    "Trap",
    "Virtual Coherency - instruction",
    "Floating Point",
    NULL, NULL, NULL, NULL, NULL, NULL, NULL,
    "WatchHi/WatchLo", /* 23 */
    NULL, NULL, NULL, NULL, NULL, NULL, NULL,
    "Virtual Coherency - data",
};
 
static void print_regdump(istate_t *istate)
{
    char *pcsymbol = "";
    char *rasymbol = "";
 
#ifdef CONFIG_SYMTAB
    char *s = get_symtab_entry(istate->epc);
    if (s)
        pcsymbol = s;
    s = get_symtab_entry(istate->ra);
    if (s)
        rasymbol = s;
#endif
   
    printf("PC: %#x(%s) RA: %#x(%s), SP(%p)\n", istate->epc, pcsymbol, istate->ra, rasymbol, istate->sp);
}
 
static void unhandled_exception(int n, istate_t *istate)
{
    fault_if_from_uspace(istate, "Unhandled exception %s.", exctable[n]);
   
    print_regdump(istate);
    panic("Unhandled exception %s.", exctable[n]);
}
 
static void reserved_instr_exception(int n, istate_t *istate)
{
    if (*((uint32_t *)istate->epc) == 0x7c03e83b) {
        ASSERT(THREAD);
        istate->epc += 4;
        istate->v1 = istate->k1;
    } else
        unhandled_exception(n, istate);
}
 
static void breakpoint_exception(int n, istate_t *istate)
{
#ifdef CONFIG_DEBUG
    debugger_bpoint(istate);
#else
    /* it is necessary to not re-execute BREAK instruction after
       returning from Exception handler
       (see page 138 in R4000 Manual for more information) */
    istate->epc += 4;
#endif
}
 
static void tlbmod_exception(int n, istate_t *istate)
{
    tlb_modified(istate);
}
 
static void tlbinv_exception(int n, istate_t *istate)
{
    tlb_invalid(istate);
}
 
#ifdef CONFIG_FPU_LAZY
static void cpuns_exception(int n, istate_t *istate)
{
    if (cp0_cause_coperr(cp0_cause_read()) == fpu_cop_id)
        scheduler_fpu_lazy_request();
    else {
        fault_if_from_uspace(istate, "Unhandled Coprocessor Unusable Exception.");
        panic("Unhandled Coprocessor Unusable Exception.");
    }
}
#endif
 
static void interrupt_exception(int n, istate_t *istate)
{
    uint32_t cause;
    int i;
   
    /* decode interrupt number and process the interrupt */
    cause = (cp0_cause_read() >> 8) & 0xff;
   
    for (i = 0; i < 8; i++) {
        if (cause & (1 << i)) {
            irq_t *irq = irq_dispatch_and_lock(i);
            if (irq) {
                /*
                 * The IRQ handler was found.
                 */
                irq->handler(irq);
                spinlock_unlock(&irq->lock);
            } else {
                /*
                 * Spurious interrupt.
                 */
#ifdef CONFIG_DEBUG
                printf("cpu%u: spurious interrupt (inum=%d)\n",
                    CPU->id, i);
#endif
            }
        }
    }
}
 
/** Handle syscall userspace call */
static void syscall_exception(int n, istate_t *istate)
{
    panic("Syscall is handled through shortcut.");
}
 
void exception_init(void)
{
    int i;
 
    /* Clear exception table */
    for (i = 0; i < IVT_ITEMS; i++)
        exc_register(i, "undef", (iroutine) unhandled_exception);
   
    exc_register(EXC_Bp, "bkpoint", (iroutine) breakpoint_exception);
    exc_register(EXC_RI, "resinstr", (iroutine) reserved_instr_exception);
    exc_register(EXC_Mod, "tlb_mod", (iroutine) tlbmod_exception);
    exc_register(EXC_TLBL, "tlbinvl", (iroutine) tlbinv_exception);
    exc_register(EXC_TLBS, "tlbinvl", (iroutine) tlbinv_exception);
    exc_register(EXC_Int, "interrupt", (iroutine) interrupt_exception);
#ifdef CONFIG_FPU_LAZY
    exc_register(EXC_CpU, "cpunus", (iroutine) cpuns_exception);
#endif
    exc_register(EXC_Sys, "syscall", (iroutine) syscall_exception);
}
 
/** @}
 */
 

Rev 3906	Rev 4132
1	/*	1	/*
2	* Copyright (c) 2003-2004 Jakub Jermar	2	* Copyright (c) 2003-2004 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup mips32	29	/** @addtogroup mips32
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35	#include <arch/exception.h>	35	#include <arch/exception.h>
36	#include <arch/interrupt.h>	36	#include <arch/interrupt.h>
37	#include <arch/mm/tlb.h>	37	#include <arch/mm/tlb.h>
38	#include <panic.h>	38	#include <panic.h>
39	#include <arch/cp0.h>	39	#include <arch/cp0.h>
40	#include <arch/types.h>	40	#include <arch/types.h>
41	#include <arch.h>	41	#include <arch.h>
42	#include <debug.h>	42	#include <debug.h>
43	#include <proc/thread.h>	43	#include <proc/thread.h>
44	#include <symtab.h>	-
45	#include <print.h>	44	#include <print.h>
46	#include <interrupt.h>	45	#include <interrupt.h>
47	#include <func.h>	46	#include <func.h>
48	#include <ddi/irq.h>	47	#include <ddi/irq.h>
49	#include <arch/debugger.h>	48	#include <arch/debugger.h>
50		49
-		50	#ifdef CONFIG_SYMTAB
-		51	#include <symtab.h>
-		52	#endif
-		53
51	static char * exctable[] = {	54	static char * exctable[] = {
52	"Interrupt",	55	"Interrupt",
53	"TLB Modified",	56	"TLB Modified",
54	"TLB Invalid",	57	"TLB Invalid",
55	"TLB Invalid Store",	58	"TLB Invalid Store",
56	"Address Error - load/instr. fetch",	59	"Address Error - load/instr. fetch",
57	"Address Error - store",	60	"Address Error - store",
58	"Bus Error - fetch instruction",	61	"Bus Error - fetch instruction",
59	"Bus Error - data reference",	62	"Bus Error - data reference",
60	"Syscall",	63	"Syscall",
61	"BreakPoint",	64	"BreakPoint",
62	"Reserved Instruction",	65	"Reserved Instruction",
63	"Coprocessor Unusable",	66	"Coprocessor Unusable",
64	"Arithmetic Overflow",	67	"Arithmetic Overflow",
65	"Trap",	68	"Trap",
66	"Virtual Coherency - instruction",	69	"Virtual Coherency - instruction",
67	"Floating Point",	70	"Floating Point",
68	NULL, NULL, NULL, NULL, NULL, NULL, NULL,	71	NULL, NULL, NULL, NULL, NULL, NULL, NULL,
69	"WatchHi/WatchLo", /* 23 */	72	"WatchHi/WatchLo", /* 23 */
70	NULL, NULL, NULL, NULL, NULL, NULL, NULL,	73	NULL, NULL, NULL, NULL, NULL, NULL, NULL,
71	"Virtual Coherency - data",	74	"Virtual Coherency - data",
72	};	75	};
73		76
74	static void print_regdump(istate_t *istate)	77	static void print_regdump(istate_t *istate)
75	{	78	{
76	char *pcsymbol = "";	79	char *pcsymbol = "";
77	char *rasymbol = "";	80	char *rasymbol = "";
78		81
-		82	#ifdef CONFIG_SYMTAB
79	char *s = get_symtab_entry(istate->epc);	83	char *s = get_symtab_entry(istate->epc);
80	if (s)	84	if (s)
81	pcsymbol = s;	85	pcsymbol = s;
82	s = get_symtab_entry(istate->ra);	86	s = get_symtab_entry(istate->ra);
83	if (s)	87	if (s)
84	rasymbol = s;	88	rasymbol = s;
-		89	#endif
85		90
86	printf("PC: %#x(%s) RA: %#x(%s), SP(%p)\n", istate->epc, pcsymbol, istate->ra, rasymbol, istate->sp);	91	printf("PC: %#x(%s) RA: %#x(%s), SP(%p)\n", istate->epc, pcsymbol, istate->ra, rasymbol, istate->sp);
87	}	92	}
88		93
89	static void unhandled_exception(int n, istate_t *istate)	94	static void unhandled_exception(int n, istate_t *istate)
90	{	95	{
91	fault_if_from_uspace(istate, "Unhandled exception %s.", exctable[n]);	96	fault_if_from_uspace(istate, "Unhandled exception %s.", exctable[n]);
92		97
93	print_regdump(istate);	98	print_regdump(istate);
94	panic("Unhandled exception %s.", exctable[n]);	99	panic("Unhandled exception %s.", exctable[n]);
95	}	100	}
96		101
97	static void reserved_instr_exception(int n, istate_t *istate)	102	static void reserved_instr_exception(int n, istate_t *istate)
98	{	103	{
99	if (((uint32_t )istate->epc) == 0x7c03e83b) {	104	if (((uint32_t )istate->epc) == 0x7c03e83b) {
100	ASSERT(THREAD);	105	ASSERT(THREAD);
101	istate->epc += 4;	106	istate->epc += 4;
102	istate->v1 = istate->k1;	107	istate->v1 = istate->k1;
103	} else	108	} else
104	unhandled_exception(n, istate);	109	unhandled_exception(n, istate);
105	}	110	}
106		111
107	static void breakpoint_exception(int n, istate_t *istate)	112	static void breakpoint_exception(int n, istate_t *istate)
108	{	113	{
109	#ifdef CONFIG_DEBUG	114	#ifdef CONFIG_DEBUG
110	debugger_bpoint(istate);	115	debugger_bpoint(istate);
111	#else	116	#else
112	/* it is necessary to not re-execute BREAK instruction after	117	/* it is necessary to not re-execute BREAK instruction after
113	returning from Exception handler	118	returning from Exception handler
114	(see page 138 in R4000 Manual for more information) */	119	(see page 138 in R4000 Manual for more information) */
115	istate->epc += 4;	120	istate->epc += 4;
116	#endif	121	#endif
117	}	122	}
118		123
119	static void tlbmod_exception(int n, istate_t *istate)	124	static void tlbmod_exception(int n, istate_t *istate)
120	{	125	{
121	tlb_modified(istate);	126	tlb_modified(istate);
122	}	127	}
123		128
124	static void tlbinv_exception(int n, istate_t *istate)	129	static void tlbinv_exception(int n, istate_t *istate)
125	{	130	{
126	tlb_invalid(istate);	131	tlb_invalid(istate);
127	}	132	}
128		133
129	#ifdef CONFIG_FPU_LAZY	134	#ifdef CONFIG_FPU_LAZY
130	static void cpuns_exception(int n, istate_t *istate)	135	static void cpuns_exception(int n, istate_t *istate)
131	{	136	{
132	if (cp0_cause_coperr(cp0_cause_read()) == fpu_cop_id)	137	if (cp0_cause_coperr(cp0_cause_read()) == fpu_cop_id)
133	scheduler_fpu_lazy_request();	138	scheduler_fpu_lazy_request();
134	else {	139	else {
135	fault_if_from_uspace(istate, "Unhandled Coprocessor Unusable Exception.");	140	fault_if_from_uspace(istate, "Unhandled Coprocessor Unusable Exception.");
136	panic("Unhandled Coprocessor Unusable Exception.");	141	panic("Unhandled Coprocessor Unusable Exception.");
137	}	142	}
138	}	143	}
139	#endif	144	#endif
140		145
141	static void interrupt_exception(int n, istate_t *istate)	146	static void interrupt_exception(int n, istate_t *istate)
142	{	147	{
143	uint32_t cause;	148	uint32_t cause;
144	int i;	149	int i;
145		150
146	/* decode interrupt number and process the interrupt */	151	/* decode interrupt number and process the interrupt */
147	cause = (cp0_cause_read() >> 8) & 0xff;	152	cause = (cp0_cause_read() >> 8) & 0xff;
148		153
149	for (i = 0; i < 8; i++) {	154	for (i = 0; i < 8; i++) {
150	if (cause & (1 << i)) {	155	if (cause & (1 << i)) {
151	irq_t *irq = irq_dispatch_and_lock(i);	156	irq_t *irq = irq_dispatch_and_lock(i);
152	if (irq) {	157	if (irq) {
153	/*	158	/*
154	* The IRQ handler was found.	159	* The IRQ handler was found.
155	*/	160	*/
156	irq->handler(irq);	161	irq->handler(irq);
157	spinlock_unlock(&irq->lock);	162	spinlock_unlock(&irq->lock);
158	} else {	163	} else {
159	/*	164	/*
160	* Spurious interrupt.	165	* Spurious interrupt.
161	*/	166	*/
162	#ifdef CONFIG_DEBUG	167	#ifdef CONFIG_DEBUG
163	printf("cpu%u: spurious interrupt (inum=%d)\n",	168	printf("cpu%u: spurious interrupt (inum=%d)\n",
164	CPU->id, i);	169	CPU->id, i);
165	#endif	170	#endif
166	}	171	}
167	}	172	}
168	}	173	}
169	}	174	}
170		175
171	/** Handle syscall userspace call */	176	/** Handle syscall userspace call */
172	static void syscall_exception(int n, istate_t *istate)	177	static void syscall_exception(int n, istate_t *istate)
173	{	178	{
174	panic("Syscall is handled through shortcut.");	179	panic("Syscall is handled through shortcut.");
175	}	180	}
176		181
177	void exception_init(void)	182	void exception_init(void)
178	{	183	{
179	int i;	184	int i;
180		185
181	/* Clear exception table */	186	/* Clear exception table */
182	for (i = 0; i < IVT_ITEMS; i++)	187	for (i = 0; i < IVT_ITEMS; i++)
183	exc_register(i, "undef", (iroutine) unhandled_exception);	188	exc_register(i, "undef", (iroutine) unhandled_exception);
184		189
185	exc_register(EXC_Bp, "bkpoint", (iroutine) breakpoint_exception);	190	exc_register(EXC_Bp, "bkpoint", (iroutine) breakpoint_exception);
186	exc_register(EXC_RI, "resinstr", (iroutine) reserved_instr_exception);	191	exc_register(EXC_RI, "resinstr", (iroutine) reserved_instr_exception);
187	exc_register(EXC_Mod, "tlb_mod", (iroutine) tlbmod_exception);	192	exc_register(EXC_Mod, "tlb_mod", (iroutine) tlbmod_exception);
188	exc_register(EXC_TLBL, "tlbinvl", (iroutine) tlbinv_exception);	193	exc_register(EXC_TLBL, "tlbinvl", (iroutine) tlbinv_exception);
189	exc_register(EXC_TLBS, "tlbinvl", (iroutine) tlbinv_exception);	194	exc_register(EXC_TLBS, "tlbinvl", (iroutine) tlbinv_exception);
190	exc_register(EXC_Int, "interrupt", (iroutine) interrupt_exception);	195	exc_register(EXC_Int, "interrupt", (iroutine) interrupt_exception);
191	#ifdef CONFIG_FPU_LAZY	196	#ifdef CONFIG_FPU_LAZY
192	exc_register(EXC_CpU, "cpunus", (iroutine) cpuns_exception);	197	exc_register(EXC_CpU, "cpunus", (iroutine) cpuns_exception);
193	#endif	198	#endif
194	exc_register(EXC_Sys, "syscall", (iroutine) syscall_exception);	199	exc_register(EXC_Sys, "syscall", (iroutine) syscall_exception);
195	}	200	}
196		201
197	/** @}	202	/** @}
198	*/	203	*/
199		204

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(root)/trunk/kernel/arch/mips32/src/exception.c @ 2914 – Rev 3906 → 4132