WebSVN – HelenOS – Diff – /trunk/kernel/arch/mips32/src/exception.c


/*
 * Copyright (c) 2003-2004 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup mips32 
 * @{
 */
/** @file
 */
 
#include <arch/exception.h>
#include <arch/interrupt.h>
#include <arch/mm/tlb.h>
#include <panic.h>
#include <arch/cp0.h>
#include <arch/types.h>
#include <arch.h>
#include <debug.h>
#include <proc/thread.h>
#include <print.h>
#include <interrupt.h>
#include <func.h>
#include <ddi/irq.h>
#include <arch/debugger.h>
 
 
#include <symtab.h>
 
 
static char * exctable[] = {
    "Interrupt",
    "TLB Modified",
    "TLB Invalid",
    "TLB Invalid Store",
    "Address Error - load/instr. fetch",
    "Address Error - store",
    "Bus Error - fetch instruction",
    "Bus Error - data reference",
    "Syscall",
    "BreakPoint",
    "Reserved Instruction",
    "Coprocessor Unusable",
    "Arithmetic Overflow",
    "Trap",
    "Virtual Coherency - instruction",
    "Floating Point",
    NULL, NULL, NULL, NULL, NULL, NULL, NULL,
    "WatchHi/WatchLo", /* 23 */
    NULL, NULL, NULL, NULL, NULL, NULL, NULL,
    "Virtual Coherency - data",
};
 
static void print_regdump(istate_t *istate)
{
    char *pcsymbol, *rasymbol;
 
    pcsymbol = symtab_fmt_name_lookup(istate->epc);
    rasymbol = symtab_fmt_name_lookup(istate->ra);
 
 
    printf("PC: %#x(%s) RA: %#x(%s), SP(%p)\n", istate->epc, pcsymbol,
 
 
        istate->ra, rasymbol, istate->sp);
 
 
 
 
 
}
 
static void unhandled_exception(int n, istate_t *istate)
{
    fault_if_from_uspace(istate, "Unhandled exception %s.", exctable[n]);
   
    print_regdump(istate);
    panic("Unhandled exception %s.", exctable[n]);
}
 
static void reserved_instr_exception(int n, istate_t *istate)
{
    if (*((uint32_t *)istate->epc) == 0x7c03e83b) {
        ASSERT(THREAD);
        istate->epc += 4;
        istate->v1 = istate->k1;
    } else
        unhandled_exception(n, istate);
}
 
static void breakpoint_exception(int n, istate_t *istate)
{
#ifdef CONFIG_DEBUG
    debugger_bpoint(istate);
#else
    /* it is necessary to not re-execute BREAK instruction after
       returning from Exception handler
       (see page 138 in R4000 Manual for more information) */
    istate->epc += 4;
#endif
}
 
static void tlbmod_exception(int n, istate_t *istate)
{
    tlb_modified(istate);
}
 
static void tlbinv_exception(int n, istate_t *istate)
{
    tlb_invalid(istate);
}
 
#ifdef CONFIG_FPU_LAZY
static void cpuns_exception(int n, istate_t *istate)
{
    if (cp0_cause_coperr(cp0_cause_read()) == fpu_cop_id)
        scheduler_fpu_lazy_request();
    else {
        fault_if_from_uspace(istate, "Unhandled Coprocessor Unusable Exception.");
        panic("Unhandled Coprocessor Unusable Exception.");
    }
}
#endif
 
static void interrupt_exception(int n, istate_t *istate)
{
    uint32_t cause;
    int i;
   
    /* decode interrupt number and process the interrupt */
    cause = (cp0_cause_read() >> 8) & 0xff;
   
    for (i = 0; i < 8; i++) {
        if (cause & (1 << i)) {
            irq_t *irq = irq_dispatch_and_lock(i);
            if (irq) {
                /*
                 * The IRQ handler was found.
                 */
                irq->handler(irq);
                spinlock_unlock(&irq->lock);
            } else {
                /*
                 * Spurious interrupt.
                 */
#ifdef CONFIG_DEBUG
                printf("cpu%u: spurious interrupt (inum=%d)\n",
                    CPU->id, i);
#endif
            }
        }
    }
}
 
/** Handle syscall userspace call */
static void syscall_exception(int n, istate_t *istate)
{
    panic("Syscall is handled through shortcut.");
}
 
void exception_init(void)
{
    int i;
 
    /* Clear exception table */
    for (i = 0; i < IVT_ITEMS; i++)
        exc_register(i, "undef", (iroutine) unhandled_exception);
   
    exc_register(EXC_Bp, "bkpoint", (iroutine) breakpoint_exception);
    exc_register(EXC_RI, "resinstr", (iroutine) reserved_instr_exception);
    exc_register(EXC_Mod, "tlb_mod", (iroutine) tlbmod_exception);
    exc_register(EXC_TLBL, "tlbinvl", (iroutine) tlbinv_exception);
    exc_register(EXC_TLBS, "tlbinvl", (iroutine) tlbinv_exception);
    exc_register(EXC_Int, "interrupt", (iroutine) interrupt_exception);
#ifdef CONFIG_FPU_LAZY
    exc_register(EXC_CpU, "cpunus", (iroutine) cpuns_exception);
#endif
    exc_register(EXC_Sys, "syscall", (iroutine) syscall_exception);
}
 
/** @}
 */
 

Rev 4132	Rev 4137
1	/*	1	/*
2	* Copyright (c) 2003-2004 Jakub Jermar	2	* Copyright (c) 2003-2004 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup mips32	29	/** @addtogroup mips32
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35	#include <arch/exception.h>	35	#include <arch/exception.h>
36	#include <arch/interrupt.h>	36	#include <arch/interrupt.h>
37	#include <arch/mm/tlb.h>	37	#include <arch/mm/tlb.h>
38	#include <panic.h>	38	#include <panic.h>
39	#include <arch/cp0.h>	39	#include <arch/cp0.h>
40	#include <arch/types.h>	40	#include <arch/types.h>
41	#include <arch.h>	41	#include <arch.h>
42	#include <debug.h>	42	#include <debug.h>
43	#include <proc/thread.h>	43	#include <proc/thread.h>
44	#include <print.h>	44	#include <print.h>
45	#include <interrupt.h>	45	#include <interrupt.h>
46	#include <func.h>	46	#include <func.h>
47	#include <ddi/irq.h>	47	#include <ddi/irq.h>
48	#include <arch/debugger.h>	48	#include <arch/debugger.h>
49		-
50	#ifdef CONFIG_SYMTAB	-
51	#include <symtab.h>	49	#include <symtab.h>
52	#endif	-
53		50
54	static char * exctable[] = {	51	static char * exctable[] = {
55	"Interrupt",	52	"Interrupt",
56	"TLB Modified",	53	"TLB Modified",
57	"TLB Invalid",	54	"TLB Invalid",
58	"TLB Invalid Store",	55	"TLB Invalid Store",
59	"Address Error - load/instr. fetch",	56	"Address Error - load/instr. fetch",
60	"Address Error - store",	57	"Address Error - store",
61	"Bus Error - fetch instruction",	58	"Bus Error - fetch instruction",
62	"Bus Error - data reference",	59	"Bus Error - data reference",
63	"Syscall",	60	"Syscall",
64	"BreakPoint",	61	"BreakPoint",
65	"Reserved Instruction",	62	"Reserved Instruction",
66	"Coprocessor Unusable",	63	"Coprocessor Unusable",
67	"Arithmetic Overflow",	64	"Arithmetic Overflow",
68	"Trap",	65	"Trap",
69	"Virtual Coherency - instruction",	66	"Virtual Coherency - instruction",
70	"Floating Point",	67	"Floating Point",
71	NULL, NULL, NULL, NULL, NULL, NULL, NULL,	68	NULL, NULL, NULL, NULL, NULL, NULL, NULL,
72	"WatchHi/WatchLo", /* 23 */	69	"WatchHi/WatchLo", /* 23 */
73	NULL, NULL, NULL, NULL, NULL, NULL, NULL,	70	NULL, NULL, NULL, NULL, NULL, NULL, NULL,
74	"Virtual Coherency - data",	71	"Virtual Coherency - data",
75	};	72	};
76		73
77	static void print_regdump(istate_t *istate)	74	static void print_regdump(istate_t *istate)
78	{	75	{
79	char *pcsymbol = "";	76	char pcsymbol, rasymbol;
-		77
80	char *rasymbol = "";	78	pcsymbol = symtab_fmt_name_lookup(istate->epc);
-		79	rasymbol = symtab_fmt_name_lookup(istate->ra);
81		80
82	#ifdef CONFIG_SYMTAB	-
83	char *s = get_symtab_entry(istate->epc);	81	printf("PC: %#x(%s) RA: %#x(%s), SP(%p)\n", istate->epc, pcsymbol,
84	if (s)	-
85	pcsymbol = s;	-
86	s = get_symtab_entry(istate->ra);	82	istate->ra, rasymbol, istate->sp);
87	if (s)	-
88	rasymbol = s;	-
89	#endif	-
90		-
91	printf("PC: %#x(%s) RA: %#x(%s), SP(%p)\n", istate->epc, pcsymbol, istate->ra, rasymbol, istate->sp);	-
92	}	83	}
93		84
94	static void unhandled_exception(int n, istate_t *istate)	85	static void unhandled_exception(int n, istate_t *istate)
95	{	86	{
96	fault_if_from_uspace(istate, "Unhandled exception %s.", exctable[n]);	87	fault_if_from_uspace(istate, "Unhandled exception %s.", exctable[n]);
97		88
98	print_regdump(istate);	89	print_regdump(istate);
99	panic("Unhandled exception %s.", exctable[n]);	90	panic("Unhandled exception %s.", exctable[n]);
100	}	91	}
101		92
102	static void reserved_instr_exception(int n, istate_t *istate)	93	static void reserved_instr_exception(int n, istate_t *istate)
103	{	94	{
104	if (((uint32_t )istate->epc) == 0x7c03e83b) {	95	if (((uint32_t )istate->epc) == 0x7c03e83b) {
105	ASSERT(THREAD);	96	ASSERT(THREAD);
106	istate->epc += 4;	97	istate->epc += 4;
107	istate->v1 = istate->k1;	98	istate->v1 = istate->k1;
108	} else	99	} else
109	unhandled_exception(n, istate);	100	unhandled_exception(n, istate);
110	}	101	}
111		102
112	static void breakpoint_exception(int n, istate_t *istate)	103	static void breakpoint_exception(int n, istate_t *istate)
113	{	104	{
114	#ifdef CONFIG_DEBUG	105	#ifdef CONFIG_DEBUG
115	debugger_bpoint(istate);	106	debugger_bpoint(istate);
116	#else	107	#else
117	/* it is necessary to not re-execute BREAK instruction after	108	/* it is necessary to not re-execute BREAK instruction after
118	returning from Exception handler	109	returning from Exception handler
119	(see page 138 in R4000 Manual for more information) */	110	(see page 138 in R4000 Manual for more information) */
120	istate->epc += 4;	111	istate->epc += 4;
121	#endif	112	#endif
122	}	113	}
123		114
124	static void tlbmod_exception(int n, istate_t *istate)	115	static void tlbmod_exception(int n, istate_t *istate)
125	{	116	{
126	tlb_modified(istate);	117	tlb_modified(istate);
127	}	118	}
128		119
129	static void tlbinv_exception(int n, istate_t *istate)	120	static void tlbinv_exception(int n, istate_t *istate)
130	{	121	{
131	tlb_invalid(istate);	122	tlb_invalid(istate);
132	}	123	}
133		124
134	#ifdef CONFIG_FPU_LAZY	125	#ifdef CONFIG_FPU_LAZY
135	static void cpuns_exception(int n, istate_t *istate)	126	static void cpuns_exception(int n, istate_t *istate)
136	{	127	{
137	if (cp0_cause_coperr(cp0_cause_read()) == fpu_cop_id)	128	if (cp0_cause_coperr(cp0_cause_read()) == fpu_cop_id)
138	scheduler_fpu_lazy_request();	129	scheduler_fpu_lazy_request();
139	else {	130	else {
140	fault_if_from_uspace(istate, "Unhandled Coprocessor Unusable Exception.");	131	fault_if_from_uspace(istate, "Unhandled Coprocessor Unusable Exception.");
141	panic("Unhandled Coprocessor Unusable Exception.");	132	panic("Unhandled Coprocessor Unusable Exception.");
142	}	133	}
143	}	134	}
144	#endif	135	#endif
145		136
146	static void interrupt_exception(int n, istate_t *istate)	137	static void interrupt_exception(int n, istate_t *istate)
147	{	138	{
148	uint32_t cause;	139	uint32_t cause;
149	int i;	140	int i;
150		141
151	/* decode interrupt number and process the interrupt */	142	/* decode interrupt number and process the interrupt */
152	cause = (cp0_cause_read() >> 8) & 0xff;	143	cause = (cp0_cause_read() >> 8) & 0xff;
153		144
154	for (i = 0; i < 8; i++) {	145	for (i = 0; i < 8; i++) {
155	if (cause & (1 << i)) {	146	if (cause & (1 << i)) {
156	irq_t *irq = irq_dispatch_and_lock(i);	147	irq_t *irq = irq_dispatch_and_lock(i);
157	if (irq) {	148	if (irq) {
158	/*	149	/*
159	* The IRQ handler was found.	150	* The IRQ handler was found.
160	*/	151	*/
161	irq->handler(irq);	152	irq->handler(irq);
162	spinlock_unlock(&irq->lock);	153	spinlock_unlock(&irq->lock);
163	} else {	154	} else {
164	/*	155	/*
165	* Spurious interrupt.	156	* Spurious interrupt.
166	*/	157	*/
167	#ifdef CONFIG_DEBUG	158	#ifdef CONFIG_DEBUG
168	printf("cpu%u: spurious interrupt (inum=%d)\n",	159	printf("cpu%u: spurious interrupt (inum=%d)\n",
169	CPU->id, i);	160	CPU->id, i);
170	#endif	161	#endif
171	}	162	}
172	}	163	}
173	}	164	}
174	}	165	}
175		166
176	/** Handle syscall userspace call */	167	/** Handle syscall userspace call */
177	static void syscall_exception(int n, istate_t *istate)	168	static void syscall_exception(int n, istate_t *istate)
178	{	169	{
179	panic("Syscall is handled through shortcut.");	170	panic("Syscall is handled through shortcut.");
180	}	171	}
181		172
182	void exception_init(void)	173	void exception_init(void)
183	{	174	{
184	int i;	175	int i;
185		176
186	/* Clear exception table */	177	/* Clear exception table */
187	for (i = 0; i < IVT_ITEMS; i++)	178	for (i = 0; i < IVT_ITEMS; i++)
188	exc_register(i, "undef", (iroutine) unhandled_exception);	179	exc_register(i, "undef", (iroutine) unhandled_exception);
189		180
190	exc_register(EXC_Bp, "bkpoint", (iroutine) breakpoint_exception);	181	exc_register(EXC_Bp, "bkpoint", (iroutine) breakpoint_exception);
191	exc_register(EXC_RI, "resinstr", (iroutine) reserved_instr_exception);	182	exc_register(EXC_RI, "resinstr", (iroutine) reserved_instr_exception);
192	exc_register(EXC_Mod, "tlb_mod", (iroutine) tlbmod_exception);	183	exc_register(EXC_Mod, "tlb_mod", (iroutine) tlbmod_exception);
193	exc_register(EXC_TLBL, "tlbinvl", (iroutine) tlbinv_exception);	184	exc_register(EXC_TLBL, "tlbinvl", (iroutine) tlbinv_exception);
194	exc_register(EXC_TLBS, "tlbinvl", (iroutine) tlbinv_exception);	185	exc_register(EXC_TLBS, "tlbinvl", (iroutine) tlbinv_exception);
195	exc_register(EXC_Int, "interrupt", (iroutine) interrupt_exception);	186	exc_register(EXC_Int, "interrupt", (iroutine) interrupt_exception);
196	#ifdef CONFIG_FPU_LAZY	187	#ifdef CONFIG_FPU_LAZY
197	exc_register(EXC_CpU, "cpunus", (iroutine) cpuns_exception);	188	exc_register(EXC_CpU, "cpunus", (iroutine) cpuns_exception);
198	#endif	189	#endif
199	exc_register(EXC_Sys, "syscall", (iroutine) syscall_exception);	190	exc_register(EXC_Sys, "syscall", (iroutine) syscall_exception);
200	}	191	}
201		192
202	/** @}	193	/** @}
203	*/	194	*/
204		195

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(root)/trunk/kernel/arch/mips32/src/exception.c @ 2071 – Rev 4132 → 4137