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1 | /* |
1 | /* |
2 | * Copyright (C) 2003-2004 Jakub Jermar |
2 | * Copyright (C) 2003-2004 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | #ifndef __mips32_TLB_H__ |
29 | #ifndef __mips32_TLB_H__ |
30 | #define __mips32_TLB_H__ |
30 | #define __mips32_TLB_H__ |
31 | 31 | ||
32 | #include <arch/exception.h> |
32 | #include <arch/exception.h> |
33 | 33 | ||
34 | #define TLB_SIZE 48 |
34 | #define TLB_SIZE 48 |
35 | 35 | ||
36 | #define TLB_WIRED 1 |
36 | #define TLB_WIRED 1 |
37 | #define TLB_KSTACK_WIRED_INDEX 0 |
37 | #define TLB_KSTACK_WIRED_INDEX 0 |
38 | 38 | ||
39 | #define TLB_PAGE_MASK_16K (0x3<<13) |
39 | #define TLB_PAGE_MASK_16K (0x3<<13) |
40 | 40 | ||
41 | #define PAGE_UNCACHED 2 |
41 | #define PAGE_UNCACHED 2 |
42 | #define PAGE_CACHEABLE_EXC_WRITE 5 |
42 | #define PAGE_CACHEABLE_EXC_WRITE 5 |
43 | 43 | ||
44 | struct entry_lo { |
44 | struct entry_lo { |
45 | unsigned g : 1; /* global bit */ |
45 | unsigned g : 1; /* global bit */ |
46 | unsigned v : 1; /* valid bit */ |
46 | unsigned v : 1; /* valid bit */ |
47 | unsigned d : 1; /* dirty/write-protect bit */ |
47 | unsigned d : 1; /* dirty/write-protect bit */ |
48 | unsigned c : 3; /* cache coherency attribute */ |
48 | unsigned c : 3; /* cache coherency attribute */ |
49 | unsigned pfn : 24; /* frame number */ |
49 | unsigned pfn : 24; /* frame number */ |
50 | unsigned : 2; |
50 | unsigned zero: 2; /* zero */ |
- | 51 | } __attribute__ ((packed)); |
|
- | 52 | ||
- | 53 | struct pte { |
|
- | 54 | unsigned g : 1; /* global bit */ |
|
- | 55 | unsigned v : 1; /* valid bit */ |
|
- | 56 | unsigned d : 1; /* dirty/write-protect bit */ |
|
- | 57 | unsigned c : 3; /* cache coherency attribute */ |
|
- | 58 | unsigned pfn : 24; /* frame number */ |
|
- | 59 | unsigned w : 1; /* writable */ |
|
- | 60 | unsigned a : 1; /* accessed */ |
|
51 | } __attribute__ ((packed)); |
61 | } __attribute__ ((packed)); |
52 | 62 | ||
53 | struct entry_hi { |
63 | struct entry_hi { |
54 | unsigned asid : 8; |
64 | unsigned asid : 8; |
55 | unsigned : 5; |
65 | unsigned : 5; |
56 | unsigned vpn2 : 19; |
66 | unsigned vpn2 : 19; |
57 | } __attribute__ ((packed)); |
67 | } __attribute__ ((packed)); |
58 | 68 | ||
59 | struct page_mask { |
69 | struct page_mask { |
60 | unsigned : 13; |
70 | unsigned : 13; |
61 | unsigned mask : 12; |
71 | unsigned mask : 12; |
62 | unsigned : 7; |
72 | unsigned : 7; |
63 | } __attribute__ ((packed)); |
73 | } __attribute__ ((packed)); |
64 | 74 | ||
65 | struct tlb_entry { |
75 | struct index { |
66 | struct entry_lo lo0; |
76 | unsigned index : 4; |
67 | struct entry_lo lo1; |
77 | unsigned : 27; |
68 | struct entry_hi hi; |
78 | unsigned p : 1; |
69 | struct page_mask mask; |
- | |
70 | } __attribute__ ((packed)); |
79 | } __attribute__ ((packed)); |
71 | 80 | ||
- | 81 | /** Probe TLB for Matching Entry |
|
- | 82 | * |
|
- | 83 | * Probe TLB for Matching Entry. |
|
- | 84 | */ |
|
- | 85 | static inline void tlbp(void) |
|
- | 86 | { |
|
- | 87 | __asm__ volatile ("tlbp\n\t"); |
|
- | 88 | } |
|
- | 89 | ||
72 | 90 | ||
73 | /** Read Indexed TLB Entry |
91 | /** Read Indexed TLB Entry |
74 | * |
92 | * |
75 | * Read Indexed TLB Entry. |
93 | * Read Indexed TLB Entry. |
76 | */ |
94 | */ |
77 | static inline void tlbr(void) |
95 | static inline void tlbr(void) |
78 | { |
96 | { |
79 | __asm__ volatile ("tlbr\n\t"); |
97 | __asm__ volatile ("tlbr\n\t"); |
80 | } |
98 | } |
81 | 99 | ||
82 | /** Write Indexed TLB Entry |
100 | /** Write Indexed TLB Entry |
83 | * |
101 | * |
84 | * Write Indexed TLB Entry. |
102 | * Write Indexed TLB Entry. |
85 | */ |
103 | */ |
86 | static inline void tlbwi(void) |
104 | static inline void tlbwi(void) |
87 | { |
105 | { |
88 | __asm__ volatile ("tlbwi\n\t"); |
106 | __asm__ volatile ("tlbwi\n\t"); |
89 | } |
107 | } |
90 | 108 | ||
91 | /** Write Random TLB Entry |
109 | /** Write Random TLB Entry |
92 | * |
110 | * |
93 | * Write Random TLB Entry. |
111 | * Write Random TLB Entry. |
94 | */ |
112 | */ |
95 | static inline void tlbwr(void) |
113 | static inline void tlbwr(void) |
96 | { |
114 | { |
97 | __asm__ volatile ("tlbwr\n\t"); |
115 | __asm__ volatile ("tlbwr\n\t"); |
98 | } |
116 | } |
99 | 117 | ||
100 | extern void tlb_invalid(struct exception_regdump *pstate); |
118 | extern void tlb_invalid(struct exception_regdump *pstate); |
101 | extern void tlb_refill(struct exception_regdump *pstate); |
119 | extern void tlb_refill(struct exception_regdump *pstate); |
102 | extern void tlb_modified(struct exception_regdump *pstate); |
120 | extern void tlb_modified(struct exception_regdump *pstate); |
103 | 121 | ||
104 | #endif |
122 | #endif |
105 | 123 |