WebSVN – HelenOS – Diff – /trunk/kernel/arch/mips32/include/mm/tlb.h


/*
 * Copyright (C) 2003-2004 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
#ifndef __mips32_TLB_H__
#define __mips32_TLB_H__
 
#include <arch/exception.h>
#include <typedefs.h>
 
#define TLB_SIZE    48
 
#define TLB_WIRED       1
#define TLB_KSTACK_WIRED_INDEX  0
 
#define TLB_PAGE_MASK_16K   (0x3<<13)
 
#define PAGE_UNCACHED           2
#define PAGE_CACHEABLE_EXC_WRITE    5
 
typedef union entry_lo entry_lo_t;
typedef union entry_hi entry_hi_t;
typedef union page_mask page_mask_t;
typedef union index tlb_index_t;
 
union entry_lo {
    struct {
        unsigned g : 1;     /* global bit */
        unsigned v : 1;     /* valid bit */
        unsigned d : 1;     /* dirty/write-protect bit */
        unsigned c : 3;     /* cache coherency attribute */
        unsigned pfn : 24;  /* frame number */
        unsigned : 2;       /* zero */
    } __attribute__ ((packed));
    __u32 value;
};
 
union pte {
    entry_lo_t lo;
    struct {
 
 
        unsigned : 30;
        unsigned w : 1;     /* writable */
        unsigned a : 1;     /* accessed */
    } __attribute__ ((packed));
};
 
union entry_hi {
    struct {
        unsigned asid : 8;
        unsigned : 5;
        unsigned vpn2 : 19;
    } __attribute__ ((packed));
    __u32 value;
};
 
union page_mask {
    struct {
        unsigned : 13;
        unsigned mask : 12;
        unsigned : 7;
    } __attribute__ ((packed));
    __u32 value;
};
 
union index {
    struct {
        unsigned index : 4;
        unsigned : 27;
        unsigned p : 1;
    } __attribute__ ((packed));
    __u32 value;
};
 
 
 
 
 
 
/** Probe TLB for Matching Entry
 *
 * Probe TLB for Matching Entry.
 */
static inline void tlbp(void)
{
    __asm__ volatile ("tlbp\n\t");
}
 
 
/** Read Indexed TLB Entry
 *
 * Read Indexed TLB Entry.
 */
static inline void tlbr(void)
{
    __asm__ volatile ("tlbr\n\t");
}
 
/** Write Indexed TLB Entry
 *
 * Write Indexed TLB Entry.
 */
static inline void tlbwi(void)
{
    __asm__ volatile ("tlbwi\n\t");
}
 
/** Write Random TLB Entry
 *
 * Write Random TLB Entry.
 */
static inline void tlbwr(void)
{
    __asm__ volatile ("tlbwr\n\t");
}
 
extern void tlb_invalid(struct exception_regdump *pstate);
extern void tlb_refill(struct exception_regdump *pstate);
extern void tlb_modified(struct exception_regdump *pstate);
 
#endif
 

Rev 399	Rev 403
1	/*	1	/*
2	* Copyright (C) 2003-2004 Jakub Jermar	2	* Copyright (C) 2003-2004 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	#ifndef __mips32_TLB_H__	29	#ifndef __mips32_TLB_H__
30	#define __mips32_TLB_H__	30	#define __mips32_TLB_H__
31		31
32	#include <arch/exception.h>	32	#include <arch/exception.h>
-		33	#include <typedefs.h>
33		34
34	#define TLB_SIZE 48	35	#define TLB_SIZE 48
35		36
36	#define TLB_WIRED 1	37	#define TLB_WIRED 1
37	#define TLB_KSTACK_WIRED_INDEX 0	38	#define TLB_KSTACK_WIRED_INDEX 0
38		39
39	#define TLB_PAGE_MASK_16K (0x3<<13)	40	#define TLB_PAGE_MASK_16K (0x3<<13)
40		41
41	#define PAGE_UNCACHED 2	42	#define PAGE_UNCACHED 2
42	#define PAGE_CACHEABLE_EXC_WRITE 5	43	#define PAGE_CACHEABLE_EXC_WRITE 5
43		44
-		45	typedef union entry_lo entry_lo_t;
-		46	typedef union entry_hi entry_hi_t;
-		47	typedef union page_mask page_mask_t;
-		48	typedef union index tlb_index_t;
-		49
44	union entry_lo {	50	union entry_lo {
45	struct {	51	struct {
46	unsigned g : 1; /* global bit */	52	unsigned g : 1; /* global bit */
47	unsigned v : 1; /* valid bit */	53	unsigned v : 1; /* valid bit */
48	unsigned d : 1; /* dirty/write-protect bit */	54	unsigned d : 1; /* dirty/write-protect bit */
49	unsigned c : 3; /* cache coherency attribute */	55	unsigned c : 3; /* cache coherency attribute */
50	unsigned pfn : 24; /* frame number */	56	unsigned pfn : 24; /* frame number */
51	unsigned : 2; /* zero */	57	unsigned : 2; /* zero */
52	} __attribute__ ((packed));	58	} __attribute__ ((packed));
53	__u32 value;	59	__u32 value;
54	};	60	};
55		61
56	struct pte {	62	union pte {
57	unsigned g : 1; /* global bit */	63	entry_lo_t lo;
58	unsigned v : 1; /* valid bit */	64	struct {
59	unsigned d : 1; /* dirty/write-protect bit */	-
60	unsigned c : 3; /* cache coherency attribute */	-
61	unsigned pfn : 24; /* frame number */	65	unsigned : 30;
62	unsigned w : 1; /* writable */	66	unsigned w : 1; /* writable */
63	unsigned a : 1; /* accessed */	67	unsigned a : 1; /* accessed */
64	} __attribute__ ((packed));	68	} __attribute__ ((packed));
-		69	};
65		70
66	union entry_hi {	71	union entry_hi {
67	struct {	72	struct {
68	unsigned asid : 8;	73	unsigned asid : 8;
69	unsigned : 5;	74	unsigned : 5;
70	unsigned vpn2 : 19;	75	unsigned vpn2 : 19;
71	} __attribute__ ((packed));	76	} __attribute__ ((packed));
72	__u32 value;	77	__u32 value;
73	};	78	};
74		79
75	union page_mask {	80	union page_mask {
76	struct {	81	struct {
77	unsigned : 13;	82	unsigned : 13;
78	unsigned mask : 12;	83	unsigned mask : 12;
79	unsigned : 7;	84	unsigned : 7;
80	} __attribute__ ((packed));	85	} __attribute__ ((packed));
81	__u32 value;	86	__u32 value;
82	};	87	};
83		88
84	union index {	89	union index {
85	struct {	90	struct {
86	unsigned index : 4;	91	unsigned index : 4;
87	unsigned : 27;	92	unsigned : 27;
88	unsigned p : 1;	93	unsigned p : 1;
89	} __attribute__ ((packed));	94	} __attribute__ ((packed));
90	__u32 value;	95	__u32 value;
91	};	96	};
92		97
93	typedef union entry_lo entry_lo_t;	-
94	typedef union entry_hi entry_hi_t;	-
95	typedef union page_mask page_mask_t;	-
96	typedef union index tlb_index_t;	-
97		-
98	/** Probe TLB for Matching Entry	98	/** Probe TLB for Matching Entry
99	*	99	*
100	* Probe TLB for Matching Entry.	100	* Probe TLB for Matching Entry.
101	*/	101	*/
102	static inline void tlbp(void)	102	static inline void tlbp(void)
103	{	103	{
104	__asm__ volatile ("tlbp\n\t");	104	__asm__ volatile ("tlbp\n\t");
105	}	105	}
106		106
107		107
108	/** Read Indexed TLB Entry	108	/** Read Indexed TLB Entry
109	*	109	*
110	* Read Indexed TLB Entry.	110	* Read Indexed TLB Entry.
111	*/	111	*/
112	static inline void tlbr(void)	112	static inline void tlbr(void)
113	{	113	{
114	__asm__ volatile ("tlbr\n\t");	114	__asm__ volatile ("tlbr\n\t");
115	}	115	}
116		116
117	/** Write Indexed TLB Entry	117	/** Write Indexed TLB Entry
118	*	118	*
119	* Write Indexed TLB Entry.	119	* Write Indexed TLB Entry.
120	*/	120	*/
121	static inline void tlbwi(void)	121	static inline void tlbwi(void)
122	{	122	{
123	__asm__ volatile ("tlbwi\n\t");	123	__asm__ volatile ("tlbwi\n\t");
124	}	124	}
125		125
126	/** Write Random TLB Entry	126	/** Write Random TLB Entry
127	*	127	*
128	* Write Random TLB Entry.	128	* Write Random TLB Entry.
129	*/	129	*/
130	static inline void tlbwr(void)	130	static inline void tlbwr(void)
131	{	131	{
132	__asm__ volatile ("tlbwr\n\t");	132	__asm__ volatile ("tlbwr\n\t");
133	}	133	}
134		134
135	extern void tlb_invalid(struct exception_regdump *pstate);	135	extern void tlb_invalid(struct exception_regdump *pstate);
136	extern void tlb_refill(struct exception_regdump *pstate);	136	extern void tlb_refill(struct exception_regdump *pstate);
137	extern void tlb_modified(struct exception_regdump *pstate);	137	extern void tlb_modified(struct exception_regdump *pstate);
138		138
139	#endif	139	#endif
140		140

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(root)/trunk/kernel/arch/mips32/include/mm/tlb.h @ 2071 – Rev 399 → 403