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1 | /* |
1 | /* |
2 | * Copyright (c) 2005 Martin Decky |
2 | * Copyright (c) 2005 Martin Decky |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | #ifndef KERN_mips32_CONTEXT_OFFSET_H_ |
29 | #ifndef KERN_mips32_CONTEXT_OFFSET_H_ |
30 | #define KERN_mips32_CONTEXT_OFFSET_H_ |
30 | #define KERN_mips32_CONTEXT_OFFSET_H_ |
31 | 31 | ||
32 | #define OFFSET_SP 0x0 |
32 | #define OFFSET_SP 0x0 |
33 | #define OFFSET_PC 0x4 |
33 | #define OFFSET_PC 0x4 |
34 | #define OFFSET_S0 0x8 |
34 | #define OFFSET_S0 0x8 |
35 | #define OFFSET_S1 0xc |
35 | #define OFFSET_S1 0xc |
36 | #define OFFSET_S2 0x10 |
36 | #define OFFSET_S2 0x10 |
37 | #define OFFSET_S3 0x14 |
37 | #define OFFSET_S3 0x14 |
38 | #define OFFSET_S4 0x18 |
38 | #define OFFSET_S4 0x18 |
39 | #define OFFSET_S5 0x1c |
39 | #define OFFSET_S5 0x1c |
40 | #define OFFSET_S6 0x20 |
40 | #define OFFSET_S6 0x20 |
41 | #define OFFSET_S7 0x24 |
41 | #define OFFSET_S7 0x24 |
42 | #define OFFSET_S8 0x28 |
42 | #define OFFSET_S8 0x28 |
43 | #define OFFSET_GP 0x2c |
43 | #define OFFSET_GP 0x2c |
44 | 44 | ||
45 | #ifdef KERNEL |
45 | #ifdef KERNEL |
46 | # define OFFSET_IPL 0x30 |
46 | # define OFFSET_IPL 0x30 |
47 | #else |
47 | #else |
48 | # define OFFSET_TLS 0x30 |
48 | # define OFFSET_TLS 0x30 |
49 | 49 | ||
50 | # define OFFSET_F20 0x34 |
50 | # define OFFSET_F20 0x34 |
51 | # define OFFSET_F21 0x38 |
51 | # define OFFSET_F21 0x38 |
52 | # define OFFSET_F22 0x3c |
52 | # define OFFSET_F22 0x3c |
53 | # define OFFSET_F23 0x40 |
53 | # define OFFSET_F23 0x40 |
54 | # define OFFSET_F24 0x44 |
54 | # define OFFSET_F24 0x44 |
55 | # define OFFSET_F25 0x48 |
55 | # define OFFSET_F25 0x48 |
56 | # define OFFSET_F26 0x4c |
56 | # define OFFSET_F26 0x4c |
57 | # define OFFSET_F27 0x50 |
57 | # define OFFSET_F27 0x50 |
58 | # define OFFSET_F28 0x54 |
58 | # define OFFSET_F28 0x54 |
59 | # define OFFSET_F29 0x58 |
59 | # define OFFSET_F29 0x58 |
60 | # define OFFSET_F30 0x5c |
60 | # define OFFSET_F30 0x5c |
61 | #endif /* KERNEL */ |
61 | #endif /* KERNEL */ |
62 | 62 | ||
63 | /* istate_t */ |
63 | /* istate_t */ |
64 | #define EOFFSET_AT 0x0 |
64 | #define EOFFSET_AT 0x0 |
65 | #define EOFFSET_V0 0x4 |
65 | #define EOFFSET_V0 0x4 |
66 | #define EOFFSET_V1 0x8 |
66 | #define EOFFSET_V1 0x8 |
67 | #define EOFFSET_A0 0xc |
67 | #define EOFFSET_A0 0xc |
68 | #define EOFFSET_A1 0x10 |
68 | #define EOFFSET_A1 0x10 |
69 | #define EOFFSET_A2 0x14 |
69 | #define EOFFSET_A2 0x14 |
70 | #define EOFFSET_A3 0x18 |
70 | #define EOFFSET_A3 0x18 |
71 | #define EOFFSET_T0 0x1c |
71 | #define EOFFSET_T0 0x1c |
72 | #define EOFFSET_T1 0x20 |
72 | #define EOFFSET_T1 0x20 |
73 | #define EOFFSET_T2 0x24 |
73 | #define EOFFSET_T2 0x24 |
74 | #define EOFFSET_T3 0x28 |
74 | #define EOFFSET_T3 0x28 |
75 | #define EOFFSET_T4 0x2c |
75 | #define EOFFSET_T4 0x2c |
76 | #define EOFFSET_T5 0x30 |
76 | #define EOFFSET_T5 0x30 |
77 | #define EOFFSET_T6 0x34 |
77 | #define EOFFSET_T6 0x34 |
78 | #define EOFFSET_T7 0x38 |
78 | #define EOFFSET_T7 0x38 |
79 | #define EOFFSET_T8 0x3c |
79 | #define EOFFSET_T8 0x3c |
80 | #define EOFFSET_T9 0x40 |
80 | #define EOFFSET_T9 0x40 |
81 | #define EOFFSET_GP 0x44 |
81 | #define EOFFSET_GP 0x44 |
82 | #define EOFFSET_SP 0x48 |
82 | #define EOFFSET_SP 0x48 |
83 | #define EOFFSET_RA 0x4c |
83 | #define EOFFSET_RA 0x4c |
84 | #define EOFFSET_LO 0x50 |
84 | #define EOFFSET_LO 0x50 |
85 | #define EOFFSET_HI 0x54 |
85 | #define EOFFSET_HI 0x54 |
86 | #define EOFFSET_STATUS 0x58 |
86 | #define EOFFSET_STATUS 0x58 |
87 | #define EOFFSET_EPC 0x5c |
87 | #define EOFFSET_EPC 0x5c |
88 | #define EOFFSET_K1 0x60 |
88 | #define EOFFSET_K1 0x60 |
89 | #define REGISTER_SPACE 100 |
89 | #define REGISTER_SPACE 104 /* respect stack alignment */ |
90 | 90 | ||
91 | #ifdef __ASM__ |
91 | #ifdef __ASM__ |
92 | 92 | ||
93 | #include <arch/asm/regname.h> |
93 | #include <arch/asm/regname.h> |
94 | 94 | ||
95 | # ctx: address of the structure with saved context |
95 | # ctx: address of the structure with saved context |
96 | .macro CONTEXT_SAVE_ARCH_CORE ctx:req |
96 | .macro CONTEXT_SAVE_ARCH_CORE ctx:req |
97 | sw $s0,OFFSET_S0(\ctx) |
97 | sw $s0,OFFSET_S0(\ctx) |
98 | sw $s1,OFFSET_S1(\ctx) |
98 | sw $s1,OFFSET_S1(\ctx) |
99 | sw $s2,OFFSET_S2(\ctx) |
99 | sw $s2,OFFSET_S2(\ctx) |
100 | sw $s3,OFFSET_S3(\ctx) |
100 | sw $s3,OFFSET_S3(\ctx) |
101 | sw $s4,OFFSET_S4(\ctx) |
101 | sw $s4,OFFSET_S4(\ctx) |
102 | sw $s5,OFFSET_S5(\ctx) |
102 | sw $s5,OFFSET_S5(\ctx) |
103 | sw $s6,OFFSET_S6(\ctx) |
103 | sw $s6,OFFSET_S6(\ctx) |
104 | sw $s7,OFFSET_S7(\ctx) |
104 | sw $s7,OFFSET_S7(\ctx) |
105 | sw $s8,OFFSET_S8(\ctx) |
105 | sw $s8,OFFSET_S8(\ctx) |
106 | sw $gp,OFFSET_GP(\ctx) |
106 | sw $gp,OFFSET_GP(\ctx) |
107 | 107 | ||
108 | #ifndef KERNEL |
108 | #ifndef KERNEL |
109 | sw $k1,OFFSET_TLS(\ctx) |
109 | sw $k1,OFFSET_TLS(\ctx) |
110 | 110 | ||
111 | #ifdef CONFIG_FPU |
111 | #ifdef CONFIG_FPU |
112 | mfc1 $t0,$20 |
112 | mfc1 $t0,$20 |
113 | sw $t0, OFFSET_F20(\ctx) |
113 | sw $t0, OFFSET_F20(\ctx) |
114 | 114 | ||
115 | mfc1 $t0,$21 |
115 | mfc1 $t0,$21 |
116 | sw $t0, OFFSET_F21(\ctx) |
116 | sw $t0, OFFSET_F21(\ctx) |
117 | 117 | ||
118 | mfc1 $t0,$22 |
118 | mfc1 $t0,$22 |
119 | sw $t0, OFFSET_F22(\ctx) |
119 | sw $t0, OFFSET_F22(\ctx) |
120 | 120 | ||
121 | mfc1 $t0,$23 |
121 | mfc1 $t0,$23 |
122 | sw $t0, OFFSET_F23(\ctx) |
122 | sw $t0, OFFSET_F23(\ctx) |
123 | 123 | ||
124 | mfc1 $t0,$24 |
124 | mfc1 $t0,$24 |
125 | sw $t0, OFFSET_F24(\ctx) |
125 | sw $t0, OFFSET_F24(\ctx) |
126 | 126 | ||
127 | mfc1 $t0,$25 |
127 | mfc1 $t0,$25 |
128 | sw $t0, OFFSET_F25(\ctx) |
128 | sw $t0, OFFSET_F25(\ctx) |
129 | 129 | ||
130 | mfc1 $t0,$26 |
130 | mfc1 $t0,$26 |
131 | sw $t0, OFFSET_F26(\ctx) |
131 | sw $t0, OFFSET_F26(\ctx) |
132 | 132 | ||
133 | mfc1 $t0,$27 |
133 | mfc1 $t0,$27 |
134 | sw $t0, OFFSET_F27(\ctx) |
134 | sw $t0, OFFSET_F27(\ctx) |
135 | 135 | ||
136 | mfc1 $t0,$28 |
136 | mfc1 $t0,$28 |
137 | sw $t0, OFFSET_F28(\ctx) |
137 | sw $t0, OFFSET_F28(\ctx) |
138 | 138 | ||
139 | mfc1 $t0,$29 |
139 | mfc1 $t0,$29 |
140 | sw $t0, OFFSET_F29(\ctx) |
140 | sw $t0, OFFSET_F29(\ctx) |
141 | 141 | ||
142 | mfc1 $t0,$30 |
142 | mfc1 $t0,$30 |
143 | sw $t0, OFFSET_F30(\ctx) |
143 | sw $t0, OFFSET_F30(\ctx) |
144 | #endif /* CONFIG_FPU */ |
144 | #endif /* CONFIG_FPU */ |
145 | #endif /* KERNEL */ |
145 | #endif /* KERNEL */ |
146 | 146 | ||
147 | sw $ra,OFFSET_PC(\ctx) |
147 | sw $ra,OFFSET_PC(\ctx) |
148 | sw $sp,OFFSET_SP(\ctx) |
148 | sw $sp,OFFSET_SP(\ctx) |
149 | .endm |
149 | .endm |
150 | 150 | ||
151 | # ctx: address of the structure with saved context |
151 | # ctx: address of the structure with saved context |
152 | .macro CONTEXT_RESTORE_ARCH_CORE ctx:req |
152 | .macro CONTEXT_RESTORE_ARCH_CORE ctx:req |
153 | lw $s0,OFFSET_S0(\ctx) |
153 | lw $s0,OFFSET_S0(\ctx) |
154 | lw $s1,OFFSET_S1(\ctx) |
154 | lw $s1,OFFSET_S1(\ctx) |
155 | lw $s2,OFFSET_S2(\ctx) |
155 | lw $s2,OFFSET_S2(\ctx) |
156 | lw $s3,OFFSET_S3(\ctx) |
156 | lw $s3,OFFSET_S3(\ctx) |
157 | lw $s4,OFFSET_S4(\ctx) |
157 | lw $s4,OFFSET_S4(\ctx) |
158 | lw $s5,OFFSET_S5(\ctx) |
158 | lw $s5,OFFSET_S5(\ctx) |
159 | lw $s6,OFFSET_S6(\ctx) |
159 | lw $s6,OFFSET_S6(\ctx) |
160 | lw $s7,OFFSET_S7(\ctx) |
160 | lw $s7,OFFSET_S7(\ctx) |
161 | lw $s8,OFFSET_S8(\ctx) |
161 | lw $s8,OFFSET_S8(\ctx) |
162 | lw $gp,OFFSET_GP(\ctx) |
162 | lw $gp,OFFSET_GP(\ctx) |
163 | #ifndef KERNEL |
163 | #ifndef KERNEL |
164 | lw $k1,OFFSET_TLS(\ctx) |
164 | lw $k1,OFFSET_TLS(\ctx) |
165 | 165 | ||
166 | #ifdef CONFIG_FPU |
166 | #ifdef CONFIG_FPU |
167 | lw $t0, OFFSET_F20(\ctx) |
167 | lw $t0, OFFSET_F20(\ctx) |
168 | mtc1 $t0,$20 |
168 | mtc1 $t0,$20 |
169 | 169 | ||
170 | lw $t0, OFFSET_F21(\ctx) |
170 | lw $t0, OFFSET_F21(\ctx) |
171 | mtc1 $t0,$21 |
171 | mtc1 $t0,$21 |
172 | 172 | ||
173 | lw $t0, OFFSET_F22(\ctx) |
173 | lw $t0, OFFSET_F22(\ctx) |
174 | mtc1 $t0,$22 |
174 | mtc1 $t0,$22 |
175 | 175 | ||
176 | lw $t0, OFFSET_F23(\ctx) |
176 | lw $t0, OFFSET_F23(\ctx) |
177 | mtc1 $t0,$23 |
177 | mtc1 $t0,$23 |
178 | 178 | ||
179 | lw $t0, OFFSET_F24(\ctx) |
179 | lw $t0, OFFSET_F24(\ctx) |
180 | mtc1 $t0,$24 |
180 | mtc1 $t0,$24 |
181 | 181 | ||
182 | lw $t0, OFFSET_F25(\ctx) |
182 | lw $t0, OFFSET_F25(\ctx) |
183 | mtc1 $t0,$25 |
183 | mtc1 $t0,$25 |
184 | 184 | ||
185 | lw $t0, OFFSET_F26(\ctx) |
185 | lw $t0, OFFSET_F26(\ctx) |
186 | mtc1 $t0,$26 |
186 | mtc1 $t0,$26 |
187 | 187 | ||
188 | lw $t0, OFFSET_F27(\ctx) |
188 | lw $t0, OFFSET_F27(\ctx) |
189 | mtc1 $t0,$27 |
189 | mtc1 $t0,$27 |
190 | 190 | ||
191 | lw $t0, OFFSET_F28(\ctx) |
191 | lw $t0, OFFSET_F28(\ctx) |
192 | mtc1 $t0,$28 |
192 | mtc1 $t0,$28 |
193 | 193 | ||
194 | lw $t0, OFFSET_F29(\ctx) |
194 | lw $t0, OFFSET_F29(\ctx) |
195 | mtc1 $t0,$29 |
195 | mtc1 $t0,$29 |
196 | 196 | ||
197 | lw $t0, OFFSET_F30(\ctx) |
197 | lw $t0, OFFSET_F30(\ctx) |
198 | mtc1 $t0,$30 |
198 | mtc1 $t0,$30 |
199 | #endif /* CONFIG_FPU */ |
199 | #endif /* CONFIG_FPU */ |
200 | #endif /* KERNEL */ |
200 | #endif /* KERNEL */ |
201 | 201 | ||
202 | lw $ra,OFFSET_PC(\ctx) |
202 | lw $ra,OFFSET_PC(\ctx) |
203 | lw $sp,OFFSET_SP(\ctx) |
203 | lw $sp,OFFSET_SP(\ctx) |
204 | .endm |
204 | .endm |
205 | 205 | ||
206 | #endif |
206 | #endif |
207 | 207 | ||
208 | 208 | ||
209 | #endif |
209 | #endif |
210 | 210 |