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1 | /* |
1 | /* |
2 | * Copyright (c) 2005 Martin Decky |
2 | * Copyright (c) 2005 Martin Decky |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | #ifndef KERN_mips32_CONTEXT_OFFSET_H_ |
29 | #ifndef KERN_mips32_CONTEXT_OFFSET_H_ |
30 | #define KERN_mips32_CONTEXT_OFFSET_H_ |
30 | #define KERN_mips32_CONTEXT_OFFSET_H_ |
31 | 31 | ||
32 | #define OFFSET_SP 0x0 |
32 | #define OFFSET_SP 0x0 |
33 | #define OFFSET_PC 0x4 |
33 | #define OFFSET_PC 0x4 |
34 | #define OFFSET_S0 0x8 |
34 | #define OFFSET_S0 0x8 |
35 | #define OFFSET_S1 0xc |
35 | #define OFFSET_S1 0xc |
36 | #define OFFSET_S2 0x10 |
36 | #define OFFSET_S2 0x10 |
37 | #define OFFSET_S3 0x14 |
37 | #define OFFSET_S3 0x14 |
38 | #define OFFSET_S4 0x18 |
38 | #define OFFSET_S4 0x18 |
39 | #define OFFSET_S5 0x1c |
39 | #define OFFSET_S5 0x1c |
40 | #define OFFSET_S6 0x20 |
40 | #define OFFSET_S6 0x20 |
41 | #define OFFSET_S7 0x24 |
41 | #define OFFSET_S7 0x24 |
42 | #define OFFSET_S8 0x28 |
42 | #define OFFSET_S8 0x28 |
43 | #define OFFSET_GP 0x2c |
43 | #define OFFSET_GP 0x2c |
44 | 44 | ||
- | 45 | #ifdef KERNEL |
|
- | 46 | # define OFFSET_IPL 0x30 |
|
- | 47 | #else |
|
- | 48 | # define OFFSET_TLS 0x30 |
|
- | 49 | ||
- | 50 | # define OFFSET_F20 0x34 |
|
- | 51 | # define OFFSET_F21 0x38 |
|
- | 52 | # define OFFSET_F22 0x3c |
|
- | 53 | # define OFFSET_F23 0x40 |
|
- | 54 | # define OFFSET_F24 0x44 |
|
- | 55 | # define OFFSET_F25 0x48 |
|
- | 56 | # define OFFSET_F26 0x4c |
|
- | 57 | # define OFFSET_F27 0x50 |
|
- | 58 | # define OFFSET_F28 0x54 |
|
- | 59 | # define OFFSET_F29 0x58 |
|
- | 60 | # define OFFSET_F30 0x5c |
|
- | 61 | #endif /* KERNEL */ |
|
- | 62 | ||
45 | /* istate_t */ |
63 | /* istate_t */ |
46 | #define EOFFSET_AT 0x0 |
64 | #define EOFFSET_AT 0x0 |
47 | #define EOFFSET_V0 0x4 |
65 | #define EOFFSET_V0 0x4 |
48 | #define EOFFSET_V1 0x8 |
66 | #define EOFFSET_V1 0x8 |
49 | #define EOFFSET_A0 0xc |
67 | #define EOFFSET_A0 0xc |
50 | #define EOFFSET_A1 0x10 |
68 | #define EOFFSET_A1 0x10 |
51 | #define EOFFSET_A2 0x14 |
69 | #define EOFFSET_A2 0x14 |
52 | #define EOFFSET_A3 0x18 |
70 | #define EOFFSET_A3 0x18 |
53 | #define EOFFSET_T0 0x1c |
71 | #define EOFFSET_T0 0x1c |
54 | #define EOFFSET_T1 0x20 |
72 | #define EOFFSET_T1 0x20 |
55 | #define EOFFSET_T2 0x24 |
73 | #define EOFFSET_T2 0x24 |
56 | #define EOFFSET_T3 0x28 |
74 | #define EOFFSET_T3 0x28 |
57 | #define EOFFSET_T4 0x2c |
75 | #define EOFFSET_T4 0x2c |
58 | #define EOFFSET_T5 0x30 |
76 | #define EOFFSET_T5 0x30 |
59 | #define EOFFSET_T6 0x34 |
77 | #define EOFFSET_T6 0x34 |
60 | #define EOFFSET_T7 0x38 |
78 | #define EOFFSET_T7 0x38 |
61 | #define EOFFSET_S0 0x3c |
79 | #define EOFFSET_S0 0x3c |
62 | #define EOFFSET_S1 0x40 |
80 | #define EOFFSET_S1 0x40 |
63 | #define EOFFSET_S2 0x44 |
81 | #define EOFFSET_S2 0x44 |
64 | #define EOFFSET_S3 0x48 |
82 | #define EOFFSET_S3 0x48 |
65 | #define EOFFSET_S4 0x4c |
83 | #define EOFFSET_S4 0x4c |
66 | #define EOFFSET_S5 0x50 |
84 | #define EOFFSET_S5 0x50 |
67 | #define EOFFSET_S6 0x54 |
85 | #define EOFFSET_S6 0x54 |
68 | #define EOFFSET_S7 0x58 |
86 | #define EOFFSET_S7 0x58 |
69 | #define EOFFSET_T8 0x5c |
87 | #define EOFFSET_T8 0x5c |
70 | #define EOFFSET_T9 0x60 |
88 | #define EOFFSET_T9 0x60 |
71 | #define EOFFSET_GP 0x64 |
89 | #define EOFFSET_GP 0x64 |
72 | #define EOFFSET_SP 0x68 |
90 | #define EOFFSET_SP 0x68 |
73 | #define EOFFSET_S8 0x6c |
91 | #define EOFFSET_S8 0x6c |
74 | #define EOFFSET_RA 0x70 |
92 | #define EOFFSET_RA 0x70 |
75 | #define EOFFSET_LO 0x74 |
93 | #define EOFFSET_LO 0x74 |
76 | #define EOFFSET_HI 0x78 |
94 | #define EOFFSET_HI 0x78 |
77 | #define EOFFSET_STATUS 0x7c |
95 | #define EOFFSET_STATUS 0x7c |
78 | #define EOFFSET_EPC 0x80 |
96 | #define EOFFSET_EPC 0x80 |
79 | #define EOFFSET_K1 0x84 |
97 | #define EOFFSET_K1 0x84 |
80 | #define REGISTER_SPACE 136 |
98 | #define REGISTER_SPACE 136 |
81 | 99 | ||
- | 100 | #ifdef __ASM__ |
|
- | 101 | ||
- | 102 | #include <arch/asm/regname.h> |
|
- | 103 | ||
- | 104 | # ctx: address of the structure with saved context |
|
- | 105 | .macro CONTEXT_SAVE_ARCH_CORE ctx:req |
|
- | 106 | sw $s0,OFFSET_S0(\ctx) |
|
- | 107 | sw $s1,OFFSET_S1(\ctx) |
|
- | 108 | sw $s2,OFFSET_S2(\ctx) |
|
- | 109 | sw $s3,OFFSET_S3(\ctx) |
|
- | 110 | sw $s4,OFFSET_S4(\ctx) |
|
- | 111 | sw $s5,OFFSET_S5(\ctx) |
|
- | 112 | sw $s6,OFFSET_S6(\ctx) |
|
- | 113 | sw $s7,OFFSET_S7(\ctx) |
|
- | 114 | sw $s8,OFFSET_S8(\ctx) |
|
- | 115 | sw $gp,OFFSET_GP(\ctx) |
|
- | 116 | ||
- | 117 | #ifndef KERNEL |
|
- | 118 | sw $k1,OFFSET_TLS(\ctx) |
|
- | 119 | ||
- | 120 | # ifdef CONFIG_MIPS_FPU |
|
- | 121 | mfc1 $t0,$20 |
|
- | 122 | sw $t0, OFFSET_F20(\ctx) |
|
- | 123 | ||
- | 124 | mfc1 $t0,$21 |
|
- | 125 | sw $t0, OFFSET_F21(\ctx) |
|
- | 126 | ||
- | 127 | mfc1 $t0,$22 |
|
- | 128 | sw $t0, OFFSET_F22(\ctx) |
|
- | 129 | ||
- | 130 | mfc1 $t0,$23 |
|
- | 131 | sw $t0, OFFSET_F23(\ctx) |
|
- | 132 | ||
- | 133 | mfc1 $t0,$24 |
|
- | 134 | sw $t0, OFFSET_F24(\ctx) |
|
- | 135 | ||
- | 136 | mfc1 $t0,$25 |
|
- | 137 | sw $t0, OFFSET_F25(\ctx) |
|
- | 138 | ||
- | 139 | mfc1 $t0,$26 |
|
- | 140 | sw $t0, OFFSET_F26(\ctx) |
|
- | 141 | ||
- | 142 | mfc1 $t0,$27 |
|
- | 143 | sw $t0, OFFSET_F27(\ctx) |
|
- | 144 | ||
- | 145 | mfc1 $t0,$28 |
|
- | 146 | sw $t0, OFFSET_F28(\ctx) |
|
- | 147 | ||
- | 148 | mfc1 $t0,$29 |
|
- | 149 | sw $t0, OFFSET_F29(\ctx) |
|
- | 150 | ||
- | 151 | mfc1 $t0,$30 |
|
- | 152 | sw $t0, OFFSET_F30(\ctx) |
|
- | 153 | # endif /* CONFIG_MIPS_FPU */ |
|
- | 154 | #endif /* KERNEL */ |
|
- | 155 | ||
- | 156 | sw $ra,OFFSET_PC(\ctx) |
|
- | 157 | sw $sp,OFFSET_SP(\ctx) |
|
- | 158 | .endm |
|
- | 159 | ||
- | 160 | # ctx: address of the structure with saved context |
|
- | 161 | .macro CONTEXT_RESTORE_ARCH_CORE ctx:req |
|
- | 162 | lw $s0,OFFSET_S0(\ctx) |
|
- | 163 | lw $s1,OFFSET_S1(\ctx) |
|
- | 164 | lw $s2,OFFSET_S2(\ctx) |
|
- | 165 | lw $s3,OFFSET_S3(\ctx) |
|
- | 166 | lw $s4,OFFSET_S4(\ctx) |
|
- | 167 | lw $s5,OFFSET_S5(\ctx) |
|
- | 168 | lw $s6,OFFSET_S6(\ctx) |
|
- | 169 | lw $s7,OFFSET_S7(\ctx) |
|
- | 170 | lw $s8,OFFSET_S8(\ctx) |
|
- | 171 | lw $gp,OFFSET_GP(\ctx) |
|
- | 172 | #ifndef KERNEL |
|
- | 173 | lw $k1,OFFSET_TLS(\ctx) |
|
- | 174 | ||
- | 175 | # ifdef CONFIG_MIPS_FPU |
|
- | 176 | lw $t0, OFFSET_F20(\ctx) |
|
- | 177 | mtc1 $t0,$20 |
|
- | 178 | ||
- | 179 | lw $t0, OFFSET_F21(\ctx) |
|
- | 180 | mtc1 $t0,$21 |
|
- | 181 | ||
- | 182 | lw $t0, OFFSET_F22(\ctx) |
|
- | 183 | mtc1 $t0,$22 |
|
- | 184 | ||
- | 185 | lw $t0, OFFSET_F23(\ctx) |
|
- | 186 | mtc1 $t0,$23 |
|
- | 187 | ||
- | 188 | lw $t0, OFFSET_F24(\ctx) |
|
- | 189 | mtc1 $t0,$24 |
|
- | 190 | ||
- | 191 | lw $t0, OFFSET_F25(\ctx) |
|
- | 192 | mtc1 $t0,$25 |
|
- | 193 | ||
- | 194 | lw $t0, OFFSET_F26(\ctx) |
|
- | 195 | mtc1 $t0,$26 |
|
- | 196 | ||
- | 197 | lw $t0, OFFSET_F27(\ctx) |
|
- | 198 | mtc1 $t0,$27 |
|
- | 199 | ||
- | 200 | lw $t0, OFFSET_F28(\ctx) |
|
- | 201 | mtc1 $t0,$28 |
|
- | 202 | ||
- | 203 | lw $t0, OFFSET_F29(\ctx) |
|
- | 204 | mtc1 $t0,$29 |
|
- | 205 | ||
- | 206 | lw $t0, OFFSET_F30(\ctx) |
|
- | 207 | mtc1 $t0,$30 |
|
- | 208 | # endif /* CONFIG_MIPS_FPU */ |
|
- | 209 | ||
- | 210 | #endif /* KERNEL */ |
|
- | 211 | lw $ra,OFFSET_PC(\ctx) |
|
- | 212 | lw $sp,OFFSET_SP(\ctx) |
|
- | 213 | .endm |
|
- | 214 | ||
- | 215 | #endif |
|
- | 216 | ||
- | 217 | ||
82 | #endif |
218 | #endif |
83 | 219 |