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| 1 | /* |
1 | /* |
| 2 | * Copyright (C) 2005 Ondrej Palkovsky |
2 | * Copyright (C) 2005 Ondrej Palkovsky |
| 3 | * All rights reserved. |
3 | * All rights reserved. |
| 4 | * |
4 | * |
| 5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
| 6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
| 7 | * are met: |
7 | * are met: |
| 8 | * |
8 | * |
| 9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
| 10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
| 11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
| 12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
| 13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
| 14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
| 15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
| 16 | * |
16 | * |
| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 | */ |
27 | */ |
| 28 | 28 | ||
| 29 | #ifndef __mips32_ATOMIC_H__ |
29 | #ifndef __mips32_ATOMIC_H__ |
| 30 | #define __mips32_ATOMIC_H__ |
30 | #define __mips32_ATOMIC_H__ |
| 31 | 31 | ||
| 32 | #include <arch/types.h> |
32 | #include <arch/types.h> |
| 33 | 33 | ||
| 34 | #define atomic_inc(x) (a_add(x,1)) |
34 | #define atomic_inc(x) (a_add(x,1)) |
| 35 | #define atomic_dec(x) (a_sub(x,1)) |
35 | #define atomic_dec(x) (a_sub(x,1)) |
| 36 | 36 | ||
| - | 37 | #define atomic_inc_pre(x) (a_add(x,1)-1) |
|
| - | 38 | #define atomic_dec_pre(x) (a_sub(x,1)+1) |
|
| - | 39 | ||
| - | 40 | #define atomic_inc_post(x) (a_add(x,1)) |
|
| - | 41 | #define atomic_dec_post(x) (a_sub(x,1)) |
|
| - | 42 | ||
| - | 43 | ||
| 37 | typedef volatile __u32 atomic_t; |
44 | typedef volatile __u32 atomic_t; |
| 38 | 45 | ||
| 39 | /* |
46 | /* |
| 40 | * Atomic addition |
47 | * Atomic addition |
| 41 | * |
48 | * |
| 42 | * This case is harder, and we have to use the special LL and SC operations |
49 | * This case is harder, and we have to use the special LL and SC operations |
| 43 | * to achieve atomicity. The instructions are similar to LW (load) and SW |
50 | * to achieve atomicity. The instructions are similar to LW (load) and SW |
| 44 | * (store), except that the LL (load-linked) instruction loads the address |
51 | * (store), except that the LL (load-linked) instruction loads the address |
| 45 | * of the variable to a special register and if another process writes to |
52 | * of the variable to a special register and if another process writes to |
| 46 | * the same location, the SC (store-conditional) instruction fails. |
53 | * the same location, the SC (store-conditional) instruction fails. |
| - | 54 | |
|
| - | 55 | Returns (*val)+i |
|
| - | 56 | |
|
| 47 | */ |
57 | */ |
| 48 | static inline atomic_t a_add(atomic_t *val, int i) |
58 | static inline atomic_t a_add(atomic_t *val, int i) |
| 49 | { |
59 | { |
| 50 | atomic_t tmp, tmp2; |
60 | atomic_t tmp, tmp2; |
| 51 | 61 | ||
| 52 | asm volatile ( |
62 | asm volatile ( |
| 53 | " .set push\n" |
63 | " .set push\n" |
| 54 | " .set noreorder\n" |
64 | " .set noreorder\n" |
| 55 | " nop\n" |
65 | " nop\n" |
| 56 | "1:\n" |
66 | "1:\n" |
| 57 | " ll %0, %1\n" |
67 | " ll %0, %1\n" |
| 58 | " addu %0, %0, %3\n" |
68 | " addu %0, %0, %3\n" |
| 59 | " move %2, %0\n" |
69 | " move %2, %0\n" |
| 60 | " sc %0, %1\n" |
70 | " sc %0, %1\n" |
| 61 | " beq %0, 0x0, 1b\n" |
71 | " beq %0, 0x0, 1b\n" |
| 62 | " move %0, %2\n" |
72 | " move %0, %2\n" |
| 63 | " .set pop\n" |
73 | " .set pop\n" |
| 64 | : "=&r" (tmp), "=o" (*val), "=r" (tmp2) |
74 | : "=&r" (tmp), "=o" (*val), "=r" (tmp2) |
| 65 | : "r" (i) |
75 | : "r" (i) |
| 66 | ); |
76 | ); |
| 67 | return tmp; |
77 | return tmp; |
| 68 | } |
78 | } |
| 69 | 79 | ||
| 70 | 80 | ||
| 71 | /* |
81 | /* |
| 72 | * Atomic subtraction |
82 | * Atomic subtraction |
| 73 | * |
83 | * |
| 74 | * Implemented in the same manner as a_add, except we substract the value. |
84 | * Implemented in the same manner as a_add, except we substract the value. |
| - | 85 | ||
| - | 86 | Returns (*val)-i |
|
| - | 87 | ||
| 75 | */ |
88 | */ |
| 76 | static inline atomic_t a_sub(atomic_t *val, int i) |
89 | static inline atomic_t a_sub(atomic_t *val, int i) |
| 77 | 90 | ||
| 78 | { |
91 | { |
| 79 | atomic_t tmp, tmp2; |
92 | atomic_t tmp, tmp2; |
| 80 | 93 | ||
| 81 | asm volatile ( |
94 | asm volatile ( |
| 82 | " .set push\n" |
95 | " .set push\n" |
| 83 | " .set noreorder\n" |
96 | " .set noreorder\n" |
| 84 | " nop\n" |
97 | " nop\n" |
| 85 | "1:\n" |
98 | "1:\n" |
| 86 | " ll %0, %1\n" |
99 | " ll %0, %1\n" |
| 87 | " subu %0, %0, %3\n" |
100 | " subu %0, %0, %3\n" |
| 88 | " move %2, %0\n" |
101 | " move %2, %0\n" |
| 89 | " sc %0, %1\n" |
102 | " sc %0, %1\n" |
| 90 | " beq %0, 0x0, 1b\n" |
103 | " beq %0, 0x0, 1b\n" |
| 91 | " move %0, %2\n" |
104 | " move %0, %2\n" |
| 92 | " .set pop\n" |
105 | " .set pop\n" |
| 93 | : "=&r" (tmp), "=o" (*val), "=r" (tmp2) |
106 | : "=&r" (tmp), "=o" (*val), "=r" (tmp2) |
| 94 | : "r" (i) |
107 | : "r" (i) |
| 95 | ); |
108 | ); |
| 96 | return tmp; |
109 | return tmp; |
| 97 | } |
110 | } |
| 98 | 111 | ||
| 99 | 112 | ||
| 100 | #endif |
113 | #endif |
| 101 | 114 | ||