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#
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#
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# Copyright (c) 2005 Martin Decky
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# Copyright (c) 2005 Martin Decky
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# All rights reserved.
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# All rights reserved.
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#
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#
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# Redistribution and use in source and binary forms, with or without
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# modification, are permitted provided that the following conditions
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# are met:
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# are met:
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#
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#
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# - Redistributions of source code must retain the above copyright
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# - Redistributions of source code must retain the above copyright
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#   notice, this list of conditions and the following disclaimer.
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#   notice, this list of conditions and the following disclaimer.
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# - Redistributions in binary form must reproduce the above copyright
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# - Redistributions in binary form must reproduce the above copyright
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#   notice, this list of conditions and the following disclaimer in the
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#   notice, this list of conditions and the following disclaimer in the
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#   documentation and/or other materials provided with the distribution.
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#   documentation and/or other materials provided with the distribution.
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# - The name of the author may not be used to endorse or promote products
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# - The name of the author may not be used to endorse or promote products
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#   derived from this software without specific prior written permission.
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#   derived from this software without specific prior written permission.
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#
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#
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# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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#
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## Toolchain configuration
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## Toolchain configuration
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#
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#
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ifndef CROSS_PREFIX
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ifndef CROSS_PREFIX
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	CROSS_PREFIX = /usr/local
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	CROSS_PREFIX = /usr/local
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endif
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endif
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BFD_ARCH = mips
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BFD_ARCH = mips
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TARGET = mipsel-linux-gnu
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TARGET = mipsel-linux-gnu
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TOOLCHAIN_DIR = $(CROSS_PREFIX)/mipsel
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TOOLCHAIN_DIR = $(CROSS_PREFIX)/mipsel
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KERNEL_LOAD_ADDRESS = 0x80100000
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KERNEL_LOAD_ADDRESS = 0x80100000
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INIT_ADDRESS = 0x81000000
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INIT_SIZE = 262144
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GCC_CFLAGS += -mno-abicalls -G 0 -fno-zero-initialized-in-bss
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GCC_CFLAGS += -mno-abicalls -G 0 -fno-zero-initialized-in-bss
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DEFS += -D__32_BITS__ -DMACHINE=$(MACHINE) -DKERNEL_LOAD_ADDRESS=${KERNEL_LOAD_ADDRESS} -DINIT_ADDRESS=${INIT_ADDRESS} -DINIT_SIZE=${INIT_SIZE}
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DEFS += -D__32_BITS__ -DMACHINE=$(MACHINE) -DKERNEL_LOAD_ADDRESS=${KERNEL_LOAD_ADDRESS} 
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## Compile with hierarchical page tables support.
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## Compile with hierarchical page tables support.
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#
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#
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CONFIG_PAGE_PT = y
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CONFIG_PAGE_PT = y
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DEFS += -DCONFIG_PAGE_PT
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DEFS += -DCONFIG_PAGE_PT
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## Compile with support for address space identifiers.
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## Compile with support for address space identifiers.
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#
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#
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CONFIG_ASID = y
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CONFIG_ASID = y
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CONFIG_ASID_FIFO = y
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CONFIG_ASID_FIFO = y
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## Accepted MACHINEs
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## Accepted MACHINEs
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#
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#
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ifeq ($(MACHINE),lgxemul)
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ifeq ($(MACHINE),lgxemul)
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	BFD_NAME = elf32-tradlittlemips
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	BFD_NAME = elf32-tradlittlemips
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	BFD = binary
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	BFD = binary
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	GCC_CFLAGS += -DFB_INVERT_ENDIAN -DARCH_HAS_FPU -mips3
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	GCC_CFLAGS += -DFB_INVERT_ENDIAN -DARCH_HAS_FPU -mips3
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endif
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endif
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ifeq ($(MACHINE),bgxemul)
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ifeq ($(MACHINE),bgxemul)
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	BFD_NAME = elf32-bigmips
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	BFD_NAME = elf32-bigmips
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	BFD = ecoff-bigmips
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	BFD = ecoff-bigmips
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	TARGET = mips-sgi-irix5
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	TARGET = mips-sgi-irix5
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	TOOLCHAIN_DIR = $(CROSS_PREFIX)/mips/bin
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	TOOLCHAIN_DIR = $(CROSS_PREFIX)/mips/bin
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	GCC_CFLAGS += -EB -DBIG_ENDIAN -DARCH_HAS_FPU -mips3
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	GCC_CFLAGS += -EB -DBIG_ENDIAN -DARCH_HAS_FPU -mips3
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	INIT_ADDRESS = 0x81800000
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endif
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endif
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ifeq ($(MACHINE),simics)
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ifeq ($(MACHINE),simics)
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	# SIMICS 4kc emulation is broken, although for instructions
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	# SIMICS 4kc emulation is broken, although for instructions
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	# that do not bother us
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	# that do not bother us
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	BFD_NAME = elf32-tradlittlemips
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	BFD_NAME = elf32-tradlittlemips
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	BFD = elf32-tradlittlemips
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	BFD = elf32-tradlittlemips
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	GCC_CFLAGS += -mhard-float -mips3 -DTLBCNT=16
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	GCC_CFLAGS += -mhard-float -mips3 -DTLBCNT=16
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	TLBCNT = 16
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	TLBCNT = 16
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endif
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endif
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ifeq ($(MACHINE),msim)
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ifeq ($(MACHINE),msim)
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	BFD_NAME = elf32-tradlittlemips
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	BFD_NAME = elf32-tradlittlemips
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	BFD = binary
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	BFD = binary
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	GCC_CFLAGS += -mhard-float -mips3
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	GCC_CFLAGS += -mhard-float -mips3
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endif
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endif
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## Compile with support for software integer division.
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## Compile with support for software integer division.
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#
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#
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CONFIG_SOFTINT = y
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CONFIG_SOFTINT = y
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ARCH_SOURCES = \
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ARCH_SOURCES = \
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	arch/$(ARCH)/src/start.S \
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	arch/$(ARCH)/src/start.S \
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	arch/$(ARCH)/src/context.S \
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	arch/$(ARCH)/src/context.S \
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	arch/$(ARCH)/src/panic.S \
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	arch/$(ARCH)/src/panic.S \
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	arch/$(ARCH)/src/mips32.c \
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	arch/$(ARCH)/src/mips32.c \
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	arch/$(ARCH)/src/dummy.S \
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	arch/$(ARCH)/src/dummy.S \
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	arch/$(ARCH)/src/console.c \
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	arch/$(ARCH)/src/console.c \
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	arch/$(ARCH)/src/asm.S \
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	arch/$(ARCH)/src/asm.S \
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	arch/$(ARCH)/src/exception.c \
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	arch/$(ARCH)/src/exception.c \
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	arch/$(ARCH)/src/interrupt.c \
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	arch/$(ARCH)/src/interrupt.c \
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	arch/$(ARCH)/src/cache.c \
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	arch/$(ARCH)/src/cache.c \
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	arch/$(ARCH)/src/debugger.c \
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	arch/$(ARCH)/src/debugger.c \
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	arch/$(ARCH)/src/cpu/cpu.c \
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	arch/$(ARCH)/src/cpu/cpu.c \
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	arch/$(ARCH)/src/mm/frame.c \
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	arch/$(ARCH)/src/mm/frame.c \
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	arch/$(ARCH)/src/mm/page.c \
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	arch/$(ARCH)/src/mm/page.c \
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	arch/$(ARCH)/src/mm/tlb.c \
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	arch/$(ARCH)/src/mm/tlb.c \
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	arch/$(ARCH)/src/mm/as.c \
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	arch/$(ARCH)/src/mm/as.c \
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	arch/$(ARCH)/src/fpu_context.c \
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	arch/$(ARCH)/src/fpu_context.c \
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	arch/$(ARCH)/src/ddi/ddi.c \
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	arch/$(ARCH)/src/ddi/ddi.c \
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	arch/$(ARCH)/src/drivers/msim.c \
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	arch/$(ARCH)/src/drivers/msim.c \
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	arch/$(ARCH)/src/drivers/serial.c \
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	arch/$(ARCH)/src/drivers/serial.c \
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	arch/$(ARCH)/src/smp/order.c
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	arch/$(ARCH)/src/smp/order.c
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