WebSVN – HelenOS – Diff – /trunk/kernel/arch/ia64/src/mm/page.c


/*
 * Copyright (c) 2006 Jakub Jermar
 * Copyright (c) 2006 Jakub Vana
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup ia64mm
 * @{
 */
/** @file
 */
 
#include <arch/mm/page.h>
#include <genarch/mm/page_ht.h>
#include <mm/asid.h>
#include <arch/mm/asid.h>
#include <arch/mm/vhpt.h>
#include <arch/types.h>
#include <print.h>
#include <mm/page.h>
#include <mm/frame.h>
#include <config.h>
#include <panic.h>
#include <arch/asm.h>
#include <arch/barrier.h>
#include <memstr.h>
#include <align.h>
 
 
 
 
 
static void set_environment(void);
 
/** Initialize ia64 virtual address translation subsystem. */
void page_arch_init(void)
{
    page_mapping_operations = &ht_mapping_operations;
    pk_disable();
    set_environment();
}
 
/** Initialize VHPT and region registers. */
void set_environment(void)
{
    region_register rr;
    pta_register pta;
    int i;
#ifdef CONFIG_VHPT
    uintptr_t vhpt_base;
#endif
 
    /*
     * First set up kernel region register.
     * This is redundant (see start.S) but we keep it here just for sure.
     */
    rr.word = rr_read(VRN_KERNEL);
    rr.map.ve = 0;                  /* disable VHPT walker */
    rr.map.ps = PAGE_WIDTH;
    rr.map.rid = ASID2RID(ASID_KERNEL, VRN_KERNEL);
    rr_write(VRN_KERNEL, rr.word);
    srlz_i();
    srlz_d();
 
    /*
     * And setup the rest of region register.
     */
    for(i = 0; i < REGION_REGISTERS; i++) {
        /* skip kernel rr */
        if (i == VRN_KERNEL)
            continue;
   
        rr.word = rr_read(i);
        rr.map.ve = 0;      /* disable VHPT walker */
        rr.map.rid = RID_KERNEL;
        rr.map.ps = PAGE_WIDTH;
        rr_write(i, rr.word);
        srlz_i();
        srlz_d();
    }
 
#ifdef CONFIG_VHPT  
    vhpt_base = vhpt_set_up();
#endif
    /*
     * Set up PTA register.
     */
    pta.word = pta_read();
#ifndef CONFIG_VHPT
    pta.map.ve = 0;                   /* disable VHPT walker */
    pta.map.base = 0 >> PTA_BASE_SHIFT;
#else
    pta.map.ve = 1;                   /* enable VHPT walker */
    pta.map.base = vhpt_base >> PTA_BASE_SHIFT;
#endif
    pta.map.vf = 1;                   /* large entry format */
    pta.map.size = VHPT_WIDTH;
    pta_write(pta.word);
    srlz_i();
    srlz_d();
}
 
/** Calculate address of collision chain from VPN and ASID.
 *
 * Interrupts must be disabled.
 *
 * @param page      Address of virtual page including VRN bits.
 * @param asid      Address space identifier.
 *
 * @return      VHPT entry address.
 */
vhpt_entry_t *vhpt_hash(uintptr_t page, asid_t asid)
{
    region_register rr_save, rr;
    index_t vrn;
    rid_t rid;
    vhpt_entry_t *v;
 
    vrn = page >> VRN_SHIFT;
    rid = ASID2RID(asid, vrn);
   
    rr_save.word = rr_read(vrn);
    if (rr_save.map.rid == rid) {
        /*
         * The RID is already in place, compute thash and return.
         */
        v = (vhpt_entry_t *) thash(page);
        return v;
    }
   
    /*
     * The RID must be written to some region register.
     * To speed things up, register indexed by vrn is used.
     */
    rr.word = rr_save.word;
    rr.map.rid = rid;
    rr_write(vrn, rr.word);
    srlz_i();
    v = (vhpt_entry_t *) thash(page);
    rr_write(vrn, rr_save.word);
    srlz_i();
    srlz_d();
 
    return v;
}
 
/** Compare ASID and VPN against PTE.
 *
 * Interrupts must be disabled.
 *
 * @param page      Address of virtual page including VRN bits.
 * @param asid      Address space identifier.
 *
 * @return      True if page and asid match the page and asid of t,
 *          false otherwise.
 */
bool vhpt_compare(uintptr_t page, asid_t asid, vhpt_entry_t *v)
{
    region_register rr_save, rr;   
    index_t vrn;
    rid_t rid;
    bool match;
 
    ASSERT(v);
 
    vrn = page >> VRN_SHIFT;
    rid = ASID2RID(asid, vrn);
   
    rr_save.word = rr_read(vrn);
    if (rr_save.map.rid == rid) {
        /*
         * The RID is already in place, compare ttag with t and return.
         */
        return ttag(page) == v->present.tag.tag_word;
    }
   
    /*
     * The RID must be written to some region register.
     * To speed things up, register indexed by vrn is used.
     */
    rr.word = rr_save.word;
    rr.map.rid = rid;
    rr_write(vrn, rr.word);
    srlz_i();
    match = (ttag(page) == v->present.tag.tag_word);
    rr_write(vrn, rr_save.word);
    srlz_i();
    srlz_d();
 
    return match;      
}
 
/** Set up one VHPT entry.
 *
 * @param v VHPT entry to be set up.
 * @param page      Virtual address of the page mapped by the entry.
 * @param asid      Address space identifier of the address space to which
 *          page belongs.
 * @param frame     Physical address of the frame to wich page is mapped.
 * @param flags     Different flags for the mapping.
 */
void
vhpt_set_record(vhpt_entry_t *v, uintptr_t page, asid_t asid, uintptr_t frame,
    int flags)
{
    region_register rr_save, rr;   
    index_t vrn;
    rid_t rid;
    uint64_t tag;
 
    ASSERT(v);
 
    vrn = page >> VRN_SHIFT;
    rid = ASID2RID(asid, vrn);
   
    /*
     * Compute ttag.
     */
    rr_save.word = rr_read(vrn);
    rr.word = rr_save.word;
    rr.map.rid = rid;
    rr_write(vrn, rr.word);
    srlz_i();
    tag = ttag(page);
    rr_write(vrn, rr_save.word);
    srlz_i();
    srlz_d();
   
    /*
     * Clear the entry.
     */
    v->word[0] = 0;
    v->word[1] = 0;
    v->word[2] = 0;
    v->word[3] = 0;
   
    v->present.p = true;
    v->present.ma = (flags & PAGE_CACHEABLE) ?
        MA_WRITEBACK : MA_UNCACHEABLE;
    v->present.a = false;   /* not accessed */
    v->present.d = false;   /* not dirty */
    v->present.pl = (flags & PAGE_USER) ? PL_USER : PL_KERNEL;
    v->present.ar = (flags & PAGE_WRITE) ? AR_WRITE : AR_READ;
    v->present.ar |= (flags & PAGE_EXEC) ? AR_EXECUTE : 0;
    v->present.ppn = frame >> PPN_SHIFT;
    v->present.ed = false;  /* exception not deffered */
    v->present.ps = PAGE_WIDTH;
    v->present.key = 0;
    v->present.tag.tag_word = tag;
}
 
uintptr_t hw_map(uintptr_t physaddr, size_t size __attribute__ ((unused)))
{
    /* THIS is a dirty hack. */
    return (uintptr_t)((uint64_t)(PA2KA(physaddr)) + VIO_OFFSET);
}
 
 
 
 
 
 
 
 
/** @}
 */
 

Rev 3971	Rev 3973
1	/*	1	/*
2	* Copyright (c) 2006 Jakub Jermar	2	* Copyright (c) 2006 Jakub Jermar
3	* Copyright (c) 2006 Jakub Vana	3	* Copyright (c) 2006 Jakub Vana
4	* All rights reserved.	4	* All rights reserved.
5	*	5	*
6	* Redistribution and use in source and binary forms, with or without	6	* Redistribution and use in source and binary forms, with or without
7	* modification, are permitted provided that the following conditions	7	* modification, are permitted provided that the following conditions
8	* are met:	8	* are met:
9	*	9	*
10	* - Redistributions of source code must retain the above copyright	10	* - Redistributions of source code must retain the above copyright
11	* notice, this list of conditions and the following disclaimer.	11	* notice, this list of conditions and the following disclaimer.
12	* - Redistributions in binary form must reproduce the above copyright	12	* - Redistributions in binary form must reproduce the above copyright
13	* notice, this list of conditions and the following disclaimer in the	13	* notice, this list of conditions and the following disclaimer in the
14	* documentation and/or other materials provided with the distribution.	14	* documentation and/or other materials provided with the distribution.
15	* - The name of the author may not be used to endorse or promote products	15	* - The name of the author may not be used to endorse or promote products
16	* derived from this software without specific prior written permission.	16	* derived from this software without specific prior written permission.
17	*	17	*
18	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	18	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	19	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	20	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	21	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	22	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	23	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	24	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	25	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	26	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	27	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28	*/	28	*/
29		29
30	/** @addtogroup ia64mm	30	/** @addtogroup ia64mm
31	* @{	31	* @{
32	*/	32	*/
33	/** @file	33	/** @file
34	*/	34	*/
35		35
36	#include <arch/mm/page.h>	36	#include <arch/mm/page.h>
37	#include <genarch/mm/page_ht.h>	37	#include <genarch/mm/page_ht.h>
38	#include <mm/asid.h>	38	#include <mm/asid.h>
39	#include <arch/mm/asid.h>	39	#include <arch/mm/asid.h>
40	#include <arch/mm/vhpt.h>	40	#include <arch/mm/vhpt.h>
41	#include <arch/types.h>	41	#include <arch/types.h>
42	#include <print.h>	42	#include <print.h>
43	#include <mm/page.h>	43	#include <mm/page.h>
44	#include <mm/frame.h>	44	#include <mm/frame.h>
45	#include <config.h>	45	#include <config.h>
46	#include <panic.h>	46	#include <panic.h>
47	#include <arch/asm.h>	47	#include <arch/asm.h>
48	#include <arch/barrier.h>	48	#include <arch/barrier.h>
49	#include <memstr.h>	49	#include <memstr.h>
50	#include <align.h>	50	#include <align.h>
51	#include <ddi/ddi.h>	-
52		-
53	/** Physical memory area for devices. */	-
54	static parea_t dev_area;	-
55		51
56	static void set_environment(void);	52	static void set_environment(void);
57		53
58	/** Initialize ia64 virtual address translation subsystem. */	54	/** Initialize ia64 virtual address translation subsystem. */
59	void page_arch_init(void)	55	void page_arch_init(void)
60	{	56	{
61	page_mapping_operations = &ht_mapping_operations;	57	page_mapping_operations = &ht_mapping_operations;
62	pk_disable();	58	pk_disable();
63	set_environment();	59	set_environment();
64	}	60	}
65		61
66	/** Initialize VHPT and region registers. */	62	/** Initialize VHPT and region registers. */
67	void set_environment(void)	63	void set_environment(void)
68	{	64	{
69	region_register rr;	65	region_register rr;
70	pta_register pta;	66	pta_register pta;
71	int i;	67	int i;
72	#ifdef CONFIG_VHPT	68	#ifdef CONFIG_VHPT
73	uintptr_t vhpt_base;	69	uintptr_t vhpt_base;
74	#endif	70	#endif
75		71
76	/*	72	/*
77	* First set up kernel region register.	73	* First set up kernel region register.
78	* This is redundant (see start.S) but we keep it here just for sure.	74	* This is redundant (see start.S) but we keep it here just for sure.
79	*/	75	*/
80	rr.word = rr_read(VRN_KERNEL);	76	rr.word = rr_read(VRN_KERNEL);
81	rr.map.ve = 0; /* disable VHPT walker */	77	rr.map.ve = 0; /* disable VHPT walker */
82	rr.map.ps = PAGE_WIDTH;	78	rr.map.ps = PAGE_WIDTH;
83	rr.map.rid = ASID2RID(ASID_KERNEL, VRN_KERNEL);	79	rr.map.rid = ASID2RID(ASID_KERNEL, VRN_KERNEL);
84	rr_write(VRN_KERNEL, rr.word);	80	rr_write(VRN_KERNEL, rr.word);
85	srlz_i();	81	srlz_i();
86	srlz_d();	82	srlz_d();
87		83
88	/*	84	/*
89	* And setup the rest of region register.	85	* And setup the rest of region register.
90	*/	86	*/
91	for(i = 0; i < REGION_REGISTERS; i++) {	87	for(i = 0; i < REGION_REGISTERS; i++) {
92	/* skip kernel rr */	88	/* skip kernel rr */
93	if (i == VRN_KERNEL)	89	if (i == VRN_KERNEL)
94	continue;	90	continue;
95		91
96	rr.word = rr_read(i);	92	rr.word = rr_read(i);
97	rr.map.ve = 0; /* disable VHPT walker */	93	rr.map.ve = 0; /* disable VHPT walker */
98	rr.map.rid = RID_KERNEL;	94	rr.map.rid = RID_KERNEL;
99	rr.map.ps = PAGE_WIDTH;	95	rr.map.ps = PAGE_WIDTH;
100	rr_write(i, rr.word);	96	rr_write(i, rr.word);
101	srlz_i();	97	srlz_i();
102	srlz_d();	98	srlz_d();
103	}	99	}
104		100
105	#ifdef CONFIG_VHPT	101	#ifdef CONFIG_VHPT
106	vhpt_base = vhpt_set_up();	102	vhpt_base = vhpt_set_up();
107	#endif	103	#endif
108	/*	104	/*
109	* Set up PTA register.	105	* Set up PTA register.
110	*/	106	*/
111	pta.word = pta_read();	107	pta.word = pta_read();
112	#ifndef CONFIG_VHPT	108	#ifndef CONFIG_VHPT
113	pta.map.ve = 0; /* disable VHPT walker */	109	pta.map.ve = 0; /* disable VHPT walker */
114	pta.map.base = 0 >> PTA_BASE_SHIFT;	110	pta.map.base = 0 >> PTA_BASE_SHIFT;
115	#else	111	#else
116	pta.map.ve = 1; /* enable VHPT walker */	112	pta.map.ve = 1; /* enable VHPT walker */
117	pta.map.base = vhpt_base >> PTA_BASE_SHIFT;	113	pta.map.base = vhpt_base >> PTA_BASE_SHIFT;
118	#endif	114	#endif
119	pta.map.vf = 1; /* large entry format */	115	pta.map.vf = 1; /* large entry format */
120	pta.map.size = VHPT_WIDTH;	116	pta.map.size = VHPT_WIDTH;
121	pta_write(pta.word);	117	pta_write(pta.word);
122	srlz_i();	118	srlz_i();
123	srlz_d();	119	srlz_d();
124	}	120	}
125		121
126	/** Calculate address of collision chain from VPN and ASID.	122	/** Calculate address of collision chain from VPN and ASID.
127	*	123	*
128	* Interrupts must be disabled.	124	* Interrupts must be disabled.
129	*	125	*
130	* @param page Address of virtual page including VRN bits.	126	* @param page Address of virtual page including VRN bits.
131	* @param asid Address space identifier.	127	* @param asid Address space identifier.
132	*	128	*
133	* @return VHPT entry address.	129	* @return VHPT entry address.
134	*/	130	*/
135	vhpt_entry_t *vhpt_hash(uintptr_t page, asid_t asid)	131	vhpt_entry_t *vhpt_hash(uintptr_t page, asid_t asid)
136	{	132	{
137	region_register rr_save, rr;	133	region_register rr_save, rr;
138	index_t vrn;	134	index_t vrn;
139	rid_t rid;	135	rid_t rid;
140	vhpt_entry_t *v;	136	vhpt_entry_t *v;
141		137
142	vrn = page >> VRN_SHIFT;	138	vrn = page >> VRN_SHIFT;
143	rid = ASID2RID(asid, vrn);	139	rid = ASID2RID(asid, vrn);
144		140
145	rr_save.word = rr_read(vrn);	141	rr_save.word = rr_read(vrn);
146	if (rr_save.map.rid == rid) {	142	if (rr_save.map.rid == rid) {
147	/*	143	/*
148	* The RID is already in place, compute thash and return.	144	* The RID is already in place, compute thash and return.
149	*/	145	*/
150	v = (vhpt_entry_t *) thash(page);	146	v = (vhpt_entry_t *) thash(page);
151	return v;	147	return v;
152	}	148	}
153		149
154	/*	150	/*
155	* The RID must be written to some region register.	151	* The RID must be written to some region register.
156	* To speed things up, register indexed by vrn is used.	152	* To speed things up, register indexed by vrn is used.
157	*/	153	*/
158	rr.word = rr_save.word;	154	rr.word = rr_save.word;
159	rr.map.rid = rid;	155	rr.map.rid = rid;
160	rr_write(vrn, rr.word);	156	rr_write(vrn, rr.word);
161	srlz_i();	157	srlz_i();
162	v = (vhpt_entry_t *) thash(page);	158	v = (vhpt_entry_t *) thash(page);
163	rr_write(vrn, rr_save.word);	159	rr_write(vrn, rr_save.word);
164	srlz_i();	160	srlz_i();
165	srlz_d();	161	srlz_d();
166		162
167	return v;	163	return v;
168	}	164	}
169		165
170	/** Compare ASID and VPN against PTE.	166	/** Compare ASID and VPN against PTE.
171	*	167	*
172	* Interrupts must be disabled.	168	* Interrupts must be disabled.
173	*	169	*
174	* @param page Address of virtual page including VRN bits.	170	* @param page Address of virtual page including VRN bits.
175	* @param asid Address space identifier.	171	* @param asid Address space identifier.
176	*	172	*
177	* @return True if page and asid match the page and asid of t,	173	* @return True if page and asid match the page and asid of t,
178	* false otherwise.	174	* false otherwise.
179	*/	175	*/
180	bool vhpt_compare(uintptr_t page, asid_t asid, vhpt_entry_t *v)	176	bool vhpt_compare(uintptr_t page, asid_t asid, vhpt_entry_t *v)
181	{	177	{
182	region_register rr_save, rr;	178	region_register rr_save, rr;
183	index_t vrn;	179	index_t vrn;
184	rid_t rid;	180	rid_t rid;
185	bool match;	181	bool match;
186		182
187	ASSERT(v);	183	ASSERT(v);
188		184
189	vrn = page >> VRN_SHIFT;	185	vrn = page >> VRN_SHIFT;
190	rid = ASID2RID(asid, vrn);	186	rid = ASID2RID(asid, vrn);
191		187
192	rr_save.word = rr_read(vrn);	188	rr_save.word = rr_read(vrn);
193	if (rr_save.map.rid == rid) {	189	if (rr_save.map.rid == rid) {
194	/*	190	/*
195	* The RID is already in place, compare ttag with t and return.	191	* The RID is already in place, compare ttag with t and return.
196	*/	192	*/
197	return ttag(page) == v->present.tag.tag_word;	193	return ttag(page) == v->present.tag.tag_word;
198	}	194	}
199		195
200	/*	196	/*
201	* The RID must be written to some region register.	197	* The RID must be written to some region register.
202	* To speed things up, register indexed by vrn is used.	198	* To speed things up, register indexed by vrn is used.
203	*/	199	*/
204	rr.word = rr_save.word;	200	rr.word = rr_save.word;
205	rr.map.rid = rid;	201	rr.map.rid = rid;
206	rr_write(vrn, rr.word);	202	rr_write(vrn, rr.word);
207	srlz_i();	203	srlz_i();
208	match = (ttag(page) == v->present.tag.tag_word);	204	match = (ttag(page) == v->present.tag.tag_word);
209	rr_write(vrn, rr_save.word);	205	rr_write(vrn, rr_save.word);
210	srlz_i();	206	srlz_i();
211	srlz_d();	207	srlz_d();
212		208
213	return match;	209	return match;
214	}	210	}
215		211
216	/** Set up one VHPT entry.	212	/** Set up one VHPT entry.
217	*	213	*
218	* @param v VHPT entry to be set up.	214	* @param v VHPT entry to be set up.
219	* @param page Virtual address of the page mapped by the entry.	215	* @param page Virtual address of the page mapped by the entry.
220	* @param asid Address space identifier of the address space to which	216	* @param asid Address space identifier of the address space to which
221	* page belongs.	217	* page belongs.
222	* @param frame Physical address of the frame to wich page is mapped.	218	* @param frame Physical address of the frame to wich page is mapped.
223	* @param flags Different flags for the mapping.	219	* @param flags Different flags for the mapping.
224	*/	220	*/
225	void	221	void
226	vhpt_set_record(vhpt_entry_t *v, uintptr_t page, asid_t asid, uintptr_t frame,	222	vhpt_set_record(vhpt_entry_t *v, uintptr_t page, asid_t asid, uintptr_t frame,
227	int flags)	223	int flags)
228	{	224	{
229	region_register rr_save, rr;	225	region_register rr_save, rr;
230	index_t vrn;	226	index_t vrn;
231	rid_t rid;	227	rid_t rid;
232	uint64_t tag;	228	uint64_t tag;
233		229
234	ASSERT(v);	230	ASSERT(v);
235		231
236	vrn = page >> VRN_SHIFT;	232	vrn = page >> VRN_SHIFT;
237	rid = ASID2RID(asid, vrn);	233	rid = ASID2RID(asid, vrn);
238		234
239	/*	235	/*
240	* Compute ttag.	236	* Compute ttag.
241	*/	237	*/
242	rr_save.word = rr_read(vrn);	238	rr_save.word = rr_read(vrn);
243	rr.word = rr_save.word;	239	rr.word = rr_save.word;
244	rr.map.rid = rid;	240	rr.map.rid = rid;
245	rr_write(vrn, rr.word);	241	rr_write(vrn, rr.word);
246	srlz_i();	242	srlz_i();
247	tag = ttag(page);	243	tag = ttag(page);
248	rr_write(vrn, rr_save.word);	244	rr_write(vrn, rr_save.word);
249	srlz_i();	245	srlz_i();
250	srlz_d();	246	srlz_d();
251		247
252	/*	248	/*
253	* Clear the entry.	249	* Clear the entry.
254	*/	250	*/
255	v->word[0] = 0;	251	v->word[0] = 0;
256	v->word[1] = 0;	252	v->word[1] = 0;
257	v->word[2] = 0;	253	v->word[2] = 0;
258	v->word[3] = 0;	254	v->word[3] = 0;
259		255
260	v->present.p = true;	256	v->present.p = true;
261	v->present.ma = (flags & PAGE_CACHEABLE) ?	257	v->present.ma = (flags & PAGE_CACHEABLE) ?
262	MA_WRITEBACK : MA_UNCACHEABLE;	258	MA_WRITEBACK : MA_UNCACHEABLE;
263	v->present.a = false; /* not accessed */	259	v->present.a = false; /* not accessed */
264	v->present.d = false; /* not dirty */	260	v->present.d = false; /* not dirty */
265	v->present.pl = (flags & PAGE_USER) ? PL_USER : PL_KERNEL;	261	v->present.pl = (flags & PAGE_USER) ? PL_USER : PL_KERNEL;
266	v->present.ar = (flags & PAGE_WRITE) ? AR_WRITE : AR_READ;	262	v->present.ar = (flags & PAGE_WRITE) ? AR_WRITE : AR_READ;
267	v->present.ar \|= (flags & PAGE_EXEC) ? AR_EXECUTE : 0;	263	v->present.ar \|= (flags & PAGE_EXEC) ? AR_EXECUTE : 0;
268	v->present.ppn = frame >> PPN_SHIFT;	264	v->present.ppn = frame >> PPN_SHIFT;
269	v->present.ed = false; /* exception not deffered */	265	v->present.ed = false; /* exception not deffered */
270	v->present.ps = PAGE_WIDTH;	266	v->present.ps = PAGE_WIDTH;
271	v->present.key = 0;	267	v->present.key = 0;
272	v->present.tag.tag_word = tag;	268	v->present.tag.tag_word = tag;
273	}	269	}
274		270
275	uintptr_t hw_map(uintptr_t physaddr, size_t size __attribute__ ((unused)))	271	uintptr_t hw_map(uintptr_t physaddr, size_t size __attribute__ ((unused)))
276	{	272	{
277	/* THIS is a dirty hack. */	273	/* THIS is a dirty hack. */
278	return (uintptr_t)((uint64_t)(PA2KA(physaddr)) + VIO_OFFSET);	274	return (uintptr_t)((uint64_t)(PA2KA(physaddr)) + VIO_OFFSET);
279	}	275	}
280		-
281	void hw_area(void)	-
282	{	-
283	dev_area.pbase = end_frame;	-
284	dev_area.frames = SIZE2FRAMES(0x7fffffffffffffffUL - end_frame);	-
285	ddi_parea_register(&dev_area);	-
286	}	-
287		276
288	/** @}	277	/** @}
289	*/	278	*/
290		279

Subversion Repositories HelenOS

(root)/trunk/kernel/arch/ia64/src/mm/page.c @ 2797 – Rev 3971 → 3973