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1 | /* |
1 | /* |
2 | * Copyright (c) 2005 Jakub Jermar |
2 | * Copyright (c) 2005 Jakub Jermar |
3 | * Copyright (c) 2005 Jakub Vana |
3 | * Copyright (c) 2005 Jakub Vana |
4 | * All rights reserved. |
4 | * All rights reserved. |
5 | * |
5 | * |
6 | * Redistribution and use in source and binary forms, with or without |
6 | * Redistribution and use in source and binary forms, with or without |
7 | * modification, are permitted provided that the following conditions |
7 | * modification, are permitted provided that the following conditions |
8 | * are met: |
8 | * are met: |
9 | * |
9 | * |
10 | * - Redistributions of source code must retain the above copyright |
10 | * - Redistributions of source code must retain the above copyright |
11 | * notice, this list of conditions and the following disclaimer. |
11 | * notice, this list of conditions and the following disclaimer. |
12 | * - Redistributions in binary form must reproduce the above copyright |
12 | * - Redistributions in binary form must reproduce the above copyright |
13 | * notice, this list of conditions and the following disclaimer in the |
13 | * notice, this list of conditions and the following disclaimer in the |
14 | * documentation and/or other materials provided with the distribution. |
14 | * documentation and/or other materials provided with the distribution. |
15 | * - The name of the author may not be used to endorse or promote products |
15 | * - The name of the author may not be used to endorse or promote products |
16 | * derived from this software without specific prior written permission. |
16 | * derived from this software without specific prior written permission. |
17 | * |
17 | * |
18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
28 | */ |
28 | */ |
29 | 29 | ||
30 | /** @addtogroup ia64interrupt |
30 | /** @addtogroup ia64interrupt |
31 | * @{ |
31 | * @{ |
32 | */ |
32 | */ |
33 | /** @file |
33 | /** @file |
34 | */ |
34 | */ |
35 | 35 | ||
36 | #include <arch/interrupt.h> |
36 | #include <arch/interrupt.h> |
37 | #include <interrupt.h> |
37 | #include <interrupt.h> |
38 | #include <ddi/irq.h> |
38 | #include <ddi/irq.h> |
39 | #include <panic.h> |
39 | #include <panic.h> |
40 | #include <print.h> |
40 | #include <print.h> |
41 | #include <debug.h> |
41 | #include <debug.h> |
42 | #include <console/console.h> |
42 | #include <console/console.h> |
43 | #include <arch/types.h> |
43 | #include <arch/types.h> |
44 | #include <arch/asm.h> |
44 | #include <arch/asm.h> |
45 | #include <arch/barrier.h> |
45 | #include <arch/barrier.h> |
46 | #include <arch/register.h> |
46 | #include <arch/register.h> |
47 | #include <arch.h> |
47 | #include <arch.h> |
48 | #include <syscall/syscall.h> |
48 | #include <syscall/syscall.h> |
49 | #include <print.h> |
49 | #include <print.h> |
50 | #include <proc/scheduler.h> |
50 | #include <proc/scheduler.h> |
51 | #include <ipc/sysipc.h> |
51 | #include <ipc/sysipc.h> |
52 | #include <ipc/irq.h> |
52 | #include <ipc/irq.h> |
53 | #include <ipc/ipc.h> |
53 | #include <ipc/ipc.h> |
54 | #include <synch/spinlock.h> |
54 | #include <synch/spinlock.h> |
55 | #include <mm/tlb.h> |
55 | #include <mm/tlb.h> |
56 | - | ||
57 | #ifdef CONFIG_SYMTAB |
- | |
58 | #include <symtab.h> |
56 | #include <symtab.h> |
59 | #endif |
- | |
60 | 57 | ||
61 | #define VECTORS_64_BUNDLE 20 |
58 | #define VECTORS_64_BUNDLE 20 |
62 | #define VECTORS_16_BUNDLE 48 |
59 | #define VECTORS_16_BUNDLE 48 |
63 | #define VECTORS_16_BUNDLE_START 0x5000 |
60 | #define VECTORS_16_BUNDLE_START 0x5000 |
64 | #define VECTOR_MAX 0x7f00 |
61 | #define VECTOR_MAX 0x7f00 |
65 | 62 | ||
66 | #define BUNDLE_SIZE 16 |
63 | #define BUNDLE_SIZE 16 |
67 | 64 | ||
68 | char *vector_names_64_bundle[VECTORS_64_BUNDLE] = { |
65 | char *vector_names_64_bundle[VECTORS_64_BUNDLE] = { |
69 | "VHPT Translation vector", |
66 | "VHPT Translation vector", |
70 | "Instruction TLB vector", |
67 | "Instruction TLB vector", |
71 | "Data TLB vector", |
68 | "Data TLB vector", |
72 | "Alternate Instruction TLB vector", |
69 | "Alternate Instruction TLB vector", |
73 | "Alternate Data TLB vector", |
70 | "Alternate Data TLB vector", |
74 | "Data Nested TLB vector", |
71 | "Data Nested TLB vector", |
75 | "Instruction Key Miss vector", |
72 | "Instruction Key Miss vector", |
76 | "Data Key Miss vector", |
73 | "Data Key Miss vector", |
77 | "Dirty-Bit vector", |
74 | "Dirty-Bit vector", |
78 | "Instruction Access-Bit vector", |
75 | "Instruction Access-Bit vector", |
79 | "Data Access-Bit vector" |
76 | "Data Access-Bit vector" |
80 | "Break Instruction vector", |
77 | "Break Instruction vector", |
81 | "External Interrupt vector" |
78 | "External Interrupt vector" |
82 | "Reserved", |
79 | "Reserved", |
83 | "Reserved", |
80 | "Reserved", |
84 | "Reserved", |
81 | "Reserved", |
85 | "Reserved", |
82 | "Reserved", |
86 | "Reserved", |
83 | "Reserved", |
87 | "Reserved", |
84 | "Reserved", |
88 | "Reserved" |
85 | "Reserved" |
89 | }; |
86 | }; |
90 | 87 | ||
91 | char *vector_names_16_bundle[VECTORS_16_BUNDLE] = { |
88 | char *vector_names_16_bundle[VECTORS_16_BUNDLE] = { |
92 | "Page Not Present vector", |
89 | "Page Not Present vector", |
93 | "Key Permission vector", |
90 | "Key Permission vector", |
94 | "Instruction Access rights vector", |
91 | "Instruction Access rights vector", |
95 | "Data Access Rights vector", |
92 | "Data Access Rights vector", |
96 | "General Exception vector", |
93 | "General Exception vector", |
97 | "Disabled FP-Register vector", |
94 | "Disabled FP-Register vector", |
98 | "NaT Consumption vector", |
95 | "NaT Consumption vector", |
99 | "Speculation vector", |
96 | "Speculation vector", |
100 | "Reserved", |
97 | "Reserved", |
101 | "Debug vector", |
98 | "Debug vector", |
102 | "Unaligned Reference vector", |
99 | "Unaligned Reference vector", |
103 | "Unsupported Data Reference vector", |
100 | "Unsupported Data Reference vector", |
104 | "Floating-point Fault vector", |
101 | "Floating-point Fault vector", |
105 | "Floating-point Trap vector", |
102 | "Floating-point Trap vector", |
106 | "Lower-Privilege Transfer Trap vector", |
103 | "Lower-Privilege Transfer Trap vector", |
107 | "Taken Branch Trap vector", |
104 | "Taken Branch Trap vector", |
108 | "Single Step Trap vector", |
105 | "Single Step Trap vector", |
109 | "Reserved", |
106 | "Reserved", |
110 | "Reserved", |
107 | "Reserved", |
111 | "Reserved", |
108 | "Reserved", |
112 | "Reserved", |
109 | "Reserved", |
113 | "Reserved", |
110 | "Reserved", |
114 | "Reserved", |
111 | "Reserved", |
115 | "Reserved", |
112 | "Reserved", |
116 | "Reserved", |
113 | "Reserved", |
117 | "IA-32 Exception vector", |
114 | "IA-32 Exception vector", |
118 | "IA-32 Intercept vector", |
115 | "IA-32 Intercept vector", |
119 | "IA-32 Interrupt vector", |
116 | "IA-32 Interrupt vector", |
120 | "Reserved", |
117 | "Reserved", |
121 | "Reserved", |
118 | "Reserved", |
122 | "Reserved" |
119 | "Reserved" |
123 | }; |
120 | }; |
124 | 121 | ||
125 | static char *vector_to_string(uint16_t vector); |
122 | static char *vector_to_string(uint16_t vector); |
126 | static void dump_interrupted_context(istate_t *istate); |
123 | static void dump_interrupted_context(istate_t *istate); |
127 | 124 | ||
128 | char *vector_to_string(uint16_t vector) |
125 | char *vector_to_string(uint16_t vector) |
129 | { |
126 | { |
130 | ASSERT(vector <= VECTOR_MAX); |
127 | ASSERT(vector <= VECTOR_MAX); |
131 | 128 | ||
132 | if (vector >= VECTORS_16_BUNDLE_START) |
129 | if (vector >= VECTORS_16_BUNDLE_START) |
133 | return vector_names_16_bundle[(vector - |
130 | return vector_names_16_bundle[(vector - |
134 | VECTORS_16_BUNDLE_START) / (16 * BUNDLE_SIZE)]; |
131 | VECTORS_16_BUNDLE_START) / (16 * BUNDLE_SIZE)]; |
135 | else |
132 | else |
136 | return vector_names_64_bundle[vector / (64 * BUNDLE_SIZE)]; |
133 | return vector_names_64_bundle[vector / (64 * BUNDLE_SIZE)]; |
137 | } |
134 | } |
138 | 135 | ||
139 | void dump_interrupted_context(istate_t *istate) |
136 | void dump_interrupted_context(istate_t *istate) |
140 | { |
137 | { |
141 | char *ifa, *iipa, *iip; |
138 | char *ifa, *iipa, *iip; |
142 | 139 | ||
143 | #ifdef CONFIG_SYMTAB |
- | |
144 | ifa = get_symtab_entry(istate->cr_ifa); |
140 | ifa = symtab_fmt_name_lookup(istate->cr_ifa); |
145 | iipa = get_symtab_entry(istate->cr_iipa); |
141 | iipa = symtab_fmt_name_lookup(istate->cr_iipa); |
146 | iip = get_symtab_entry(istate->cr_iip); |
142 | iip = symtab_fmt_name_lookup(istate->cr_iip); |
147 | #else |
- | |
148 | ifa = iipa = iip = "n/a"; |
- | |
149 | #endif |
- | |
150 | 143 | ||
151 | putchar('\n'); |
144 | putchar('\n'); |
152 | printf("Interrupted context dump:\n"); |
145 | printf("Interrupted context dump:\n"); |
153 | printf("ar.bsp=%p\tar.bspstore=%p\n", istate->ar_bsp, |
146 | printf("ar.bsp=%p\tar.bspstore=%p\n", istate->ar_bsp, |
154 | istate->ar_bspstore); |
147 | istate->ar_bspstore); |
155 | printf("ar.rnat=%#018llx\tar.rsc=%#018llx\n", istate->ar_rnat, |
148 | printf("ar.rnat=%#018llx\tar.rsc=%#018llx\n", istate->ar_rnat, |
156 | istate->ar_rsc); |
149 | istate->ar_rsc); |
157 | printf("ar.ifs=%#018llx\tar.pfs=%#018llx\n", istate->ar_ifs, |
150 | printf("ar.ifs=%#018llx\tar.pfs=%#018llx\n", istate->ar_ifs, |
158 | istate->ar_pfs); |
151 | istate->ar_pfs); |
159 | printf("cr.isr=%#018llx\tcr.ipsr=%#018llx\t\n", istate->cr_isr.value, |
152 | printf("cr.isr=%#018llx\tcr.ipsr=%#018llx\t\n", istate->cr_isr.value, |
160 | istate->cr_ipsr); |
153 | istate->cr_ipsr); |
161 | 154 | ||
162 | printf("cr.iip=%#018llx, #%d\t(%s)\n", istate->cr_iip, |
155 | printf("cr.iip=%#018llx, #%d\t(%s)\n", istate->cr_iip, |
163 | istate->cr_isr.ei, iip); |
156 | istate->cr_isr.ei, iip); |
164 | printf("cr.iipa=%#018llx\t(%s)\n", istate->cr_iipa, iipa); |
157 | printf("cr.iipa=%#018llx\t(%s)\n", istate->cr_iipa, iipa); |
165 | printf("cr.ifa=%#018llx\t(%s)\n", istate->cr_ifa, ifa); |
158 | printf("cr.ifa=%#018llx\t(%s)\n", istate->cr_ifa, ifa); |
166 | } |
159 | } |
167 | 160 | ||
168 | void general_exception(uint64_t vector, istate_t *istate) |
161 | void general_exception(uint64_t vector, istate_t *istate) |
169 | { |
162 | { |
170 | char *desc = ""; |
163 | char *desc = ""; |
171 | 164 | ||
172 | switch (istate->cr_isr.ge_code) { |
165 | switch (istate->cr_isr.ge_code) { |
173 | case GE_ILLEGALOP: |
166 | case GE_ILLEGALOP: |
174 | desc = "Illegal Operation fault"; |
167 | desc = "Illegal Operation fault"; |
175 | break; |
168 | break; |
176 | case GE_PRIVOP: |
169 | case GE_PRIVOP: |
177 | desc = "Privileged Operation fault"; |
170 | desc = "Privileged Operation fault"; |
178 | break; |
171 | break; |
179 | case GE_PRIVREG: |
172 | case GE_PRIVREG: |
180 | desc = "Privileged Register fault"; |
173 | desc = "Privileged Register fault"; |
181 | break; |
174 | break; |
182 | case GE_RESREGFLD: |
175 | case GE_RESREGFLD: |
183 | desc = "Reserved Register/Field fault"; |
176 | desc = "Reserved Register/Field fault"; |
184 | break; |
177 | break; |
185 | case GE_DISBLDISTRAN: |
178 | case GE_DISBLDISTRAN: |
186 | desc = "Disabled Instruction Set Transition fault"; |
179 | desc = "Disabled Instruction Set Transition fault"; |
187 | break; |
180 | break; |
188 | case GE_ILLEGALDEP: |
181 | case GE_ILLEGALDEP: |
189 | desc = "Illegal Dependency fault"; |
182 | desc = "Illegal Dependency fault"; |
190 | break; |
183 | break; |
191 | default: |
184 | default: |
192 | desc = "unknown"; |
185 | desc = "unknown"; |
193 | break; |
186 | break; |
194 | } |
187 | } |
195 | 188 | ||
196 | fault_if_from_uspace(istate, "General Exception (%s).", desc); |
189 | fault_if_from_uspace(istate, "General Exception (%s).", desc); |
197 | 190 | ||
198 | dump_interrupted_context(istate); |
191 | dump_interrupted_context(istate); |
199 | panic("General Exception (%s).", desc); |
192 | panic("General Exception (%s).", desc); |
200 | } |
193 | } |
201 | 194 | ||
202 | void disabled_fp_register(uint64_t vector, istate_t *istate) |
195 | void disabled_fp_register(uint64_t vector, istate_t *istate) |
203 | { |
196 | { |
204 | #ifdef CONFIG_FPU_LAZY |
197 | #ifdef CONFIG_FPU_LAZY |
205 | scheduler_fpu_lazy_request(); |
198 | scheduler_fpu_lazy_request(); |
206 | #else |
199 | #else |
207 | fault_if_from_uspace(istate, "Interruption: %#hx (%s).", |
200 | fault_if_from_uspace(istate, "Interruption: %#hx (%s).", |
208 | (uint16_t) vector, vector_to_string(vector)); |
201 | (uint16_t) vector, vector_to_string(vector)); |
209 | dump_interrupted_context(istate); |
202 | dump_interrupted_context(istate); |
210 | panic("Interruption: %#hx (%s).", (uint16_t) vector, |
203 | panic("Interruption: %#hx (%s).", (uint16_t) vector, |
211 | vector_to_string(vector)); |
204 | vector_to_string(vector)); |
212 | #endif |
205 | #endif |
213 | } |
206 | } |
214 | 207 | ||
215 | void nop_handler(uint64_t vector, istate_t *istate) |
208 | void nop_handler(uint64_t vector, istate_t *istate) |
216 | { |
209 | { |
217 | } |
210 | } |
218 | 211 | ||
219 | /** Handle syscall. */ |
212 | /** Handle syscall. */ |
220 | int break_instruction(uint64_t vector, istate_t *istate) |
213 | int break_instruction(uint64_t vector, istate_t *istate) |
221 | { |
214 | { |
222 | /* |
215 | /* |
223 | * Move to next instruction after BREAK. |
216 | * Move to next instruction after BREAK. |
224 | */ |
217 | */ |
225 | if (istate->cr_ipsr.ri == 2) { |
218 | if (istate->cr_ipsr.ri == 2) { |
226 | istate->cr_ipsr.ri = 0; |
219 | istate->cr_ipsr.ri = 0; |
227 | istate->cr_iip += 16; |
220 | istate->cr_iip += 16; |
228 | } else { |
221 | } else { |
229 | istate->cr_ipsr.ri++; |
222 | istate->cr_ipsr.ri++; |
230 | } |
223 | } |
231 | 224 | ||
232 | return syscall_handler(istate->in0, istate->in1, istate->in2, |
225 | return syscall_handler(istate->in0, istate->in1, istate->in2, |
233 | istate->in3, istate->in4, istate->in5, istate->in6); |
226 | istate->in3, istate->in4, istate->in5, istate->in6); |
234 | } |
227 | } |
235 | 228 | ||
236 | void universal_handler(uint64_t vector, istate_t *istate) |
229 | void universal_handler(uint64_t vector, istate_t *istate) |
237 | { |
230 | { |
238 | fault_if_from_uspace(istate, "Interruption: %#hx (%s).", |
231 | fault_if_from_uspace(istate, "Interruption: %#hx (%s).", |
239 | (uint16_t) vector, vector_to_string(vector)); |
232 | (uint16_t) vector, vector_to_string(vector)); |
240 | dump_interrupted_context(istate); |
233 | dump_interrupted_context(istate); |
241 | panic("Interruption: %#hx (%s).", (uint16_t) vector, |
234 | panic("Interruption: %#hx (%s).", (uint16_t) vector, |
242 | vector_to_string(vector)); |
235 | vector_to_string(vector)); |
243 | } |
236 | } |
244 | 237 | ||
245 | static void end_of_local_irq(void) |
238 | static void end_of_local_irq(void) |
246 | { |
239 | { |
247 | asm volatile ("mov cr.eoi=r0;;"); |
240 | asm volatile ("mov cr.eoi=r0;;"); |
248 | } |
241 | } |
249 | 242 | ||
250 | 243 | ||
251 | void external_interrupt(uint64_t vector, istate_t *istate) |
244 | void external_interrupt(uint64_t vector, istate_t *istate) |
252 | { |
245 | { |
253 | cr_ivr_t ivr; |
246 | cr_ivr_t ivr; |
254 | irq_t *irq; |
247 | irq_t *irq; |
255 | 248 | ||
256 | ivr.value = ivr_read(); |
249 | ivr.value = ivr_read(); |
257 | srlz_d(); |
250 | srlz_d(); |
258 | 251 | ||
259 | switch (ivr.vector) { |
252 | switch (ivr.vector) { |
260 | case INTERRUPT_SPURIOUS: |
253 | case INTERRUPT_SPURIOUS: |
261 | #ifdef CONFIG_DEBUG |
254 | #ifdef CONFIG_DEBUG |
262 | printf("cpu%d: spurious interrupt\n", CPU->id); |
255 | printf("cpu%d: spurious interrupt\n", CPU->id); |
263 | #endif |
256 | #endif |
264 | break; |
257 | break; |
265 | 258 | ||
266 | #ifdef CONFIG_SMP |
259 | #ifdef CONFIG_SMP |
267 | case VECTOR_TLB_SHOOTDOWN_IPI: |
260 | case VECTOR_TLB_SHOOTDOWN_IPI: |
268 | tlb_shootdown_ipi_recv(); |
261 | tlb_shootdown_ipi_recv(); |
269 | end_of_local_irq(); |
262 | end_of_local_irq(); |
270 | break; |
263 | break; |
271 | #endif |
264 | #endif |
272 | 265 | ||
273 | case INTERRUPT_TIMER: |
266 | case INTERRUPT_TIMER: |
274 | irq = irq_dispatch_and_lock(ivr.vector); |
267 | irq = irq_dispatch_and_lock(ivr.vector); |
275 | if (irq) { |
268 | if (irq) { |
276 | irq->handler(irq); |
269 | irq->handler(irq); |
277 | spinlock_unlock(&irq->lock); |
270 | spinlock_unlock(&irq->lock); |
278 | } else { |
271 | } else { |
279 | panic("Unhandled Internal Timer Interrupt (%d).", |
272 | panic("Unhandled Internal Timer Interrupt (%d).", |
280 | ivr.vector); |
273 | ivr.vector); |
281 | } |
274 | } |
282 | break; |
275 | break; |
283 | default: |
276 | default: |
284 | irq = irq_dispatch_and_lock(ivr.vector); |
277 | irq = irq_dispatch_and_lock(ivr.vector); |
285 | if (irq) { |
278 | if (irq) { |
286 | /* |
279 | /* |
287 | * The IRQ handler was found. |
280 | * The IRQ handler was found. |
288 | */ |
281 | */ |
289 | if (irq->preack) { |
282 | if (irq->preack) { |
290 | /* Send EOI before processing the interrupt */ |
283 | /* Send EOI before processing the interrupt */ |
291 | end_of_local_irq(); |
284 | end_of_local_irq(); |
292 | } |
285 | } |
293 | irq->handler(irq); |
286 | irq->handler(irq); |
294 | if (!irq->preack) |
287 | if (!irq->preack) |
295 | end_of_local_irq(); |
288 | end_of_local_irq(); |
296 | spinlock_unlock(&irq->lock); |
289 | spinlock_unlock(&irq->lock); |
297 | } else { |
290 | } else { |
298 | /* |
291 | /* |
299 | * Unhandled interrupt. |
292 | * Unhandled interrupt. |
300 | */ |
293 | */ |
301 | end_of_local_irq(); |
294 | end_of_local_irq(); |
302 | #ifdef CONFIG_DEBUG |
295 | #ifdef CONFIG_DEBUG |
303 | printf("\nUnhandled External Interrupt Vector %d\n", |
296 | printf("\nUnhandled External Interrupt Vector %d\n", |
304 | ivr.vector); |
297 | ivr.vector); |
305 | #endif |
298 | #endif |
306 | } |
299 | } |
307 | break; |
300 | break; |
308 | } |
301 | } |
309 | } |
302 | } |
310 | 303 | ||
311 | void trap_virtual_enable_irqs(uint16_t irqmask) |
304 | void trap_virtual_enable_irqs(uint16_t irqmask) |
312 | { |
305 | { |
313 | } |
306 | } |
314 | 307 | ||
315 | /** @} |
308 | /** @} |
316 | */ |
309 | */ |
317 | 310 |