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1
/*
1
/*
2
 * Copyright (c) 2005 Jakub Jermar
2
 * Copyright (c) 2005 Jakub Jermar
3
 * All rights reserved.
3
 * All rights reserved.
4
 *
4
 *
5
 * Redistribution and use in source and binary forms, with or without
5
 * Redistribution and use in source and binary forms, with or without
6
 * modification, are permitted provided that the following conditions
6
 * modification, are permitted provided that the following conditions
7
 * are met:
7
 * are met:
8
 *
8
 *
9
 * - Redistributions of source code must retain the above copyright
9
 * - Redistributions of source code must retain the above copyright
10
 *   notice, this list of conditions and the following disclaimer.
10
 *   notice, this list of conditions and the following disclaimer.
11
 * - Redistributions in binary form must reproduce the above copyright
11
 * - Redistributions in binary form must reproduce the above copyright
12
 *   notice, this list of conditions and the following disclaimer in the
12
 *   notice, this list of conditions and the following disclaimer in the
13
 *   documentation and/or other materials provided with the distribution.
13
 *   documentation and/or other materials provided with the distribution.
14
 * - The name of the author may not be used to endorse or promote products
14
 * - The name of the author may not be used to endorse or promote products
15
 *   derived from this software without specific prior written permission.
15
 *   derived from this software without specific prior written permission.
16
 *
16
 *
17
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
 */
27
 */
28
 
28
 
29
/** @addtogroup ia64
29
/** @addtogroup ia64
30
 * @{
30
 * @{
31
 */
31
 */
32
/** @file
32
/** @file
33
 */
33
 */
34
 
34
 
35
#include <arch.h>
35
#include <arch.h>
36
#include <arch/ski/ski.h>
36
#include <arch/ski/ski.h>
37
#include <arch/drivers/it.h>
37
#include <arch/drivers/it.h>
38
#include <arch/interrupt.h>
38
#include <arch/interrupt.h>
39
#include <arch/barrier.h>
39
#include <arch/barrier.h>
40
#include <arch/asm.h>
40
#include <arch/asm.h>
41
#include <arch/register.h>
41
#include <arch/register.h>
42
#include <arch/types.h>
42
#include <arch/types.h>
43
#include <arch/context.h>
43
#include <arch/context.h>
44
#include <arch/stack.h>
44
#include <arch/stack.h>
45
#include <arch/mm/page.h>
45
#include <arch/mm/page.h>
46
#include <mm/as.h>
46
#include <mm/as.h>
47
#include <config.h>
47
#include <config.h>
48
#include <userspace.h>
48
#include <userspace.h>
49
#include <console/console.h>
49
#include <console/console.h>
50
#include <proc/uarg.h>
50
#include <proc/uarg.h>
51
#include <syscall/syscall.h>
51
#include <syscall/syscall.h>
52
#include <ddi/irq.h>
52
#include <ddi/irq.h>
53
#include <ddi/device.h>
53
#include <ddi/device.h>
54
#include <arch/bootinfo.h>
54
#include <arch/bootinfo.h>
55
#include <genarch/drivers/legacy/ia32/io.h>
55
#include <genarch/drivers/legacy/ia32/io.h>
56
#include <genarch/drivers/ega/ega.h>
56
#include <genarch/drivers/ega/ega.h>
57
#include <genarch/kbrd/kbrd.h>
57
#include <genarch/kbrd/kbrd.h>
58
#include <genarch/srln/srln.h>
58
#include <genarch/srln/srln.h>
59
#include <genarch/drivers/i8042/i8042.h>
59
#include <genarch/drivers/i8042/i8042.h>
60
#include <genarch/drivers/ns16550/ns16550.h>
60
#include <genarch/drivers/ns16550/ns16550.h>
61
#include <arch/drivers/kbd.h>
61
#include <arch/drivers/kbd.h>
62
#include <smp/smp.h>
62
#include <smp/smp.h>
63
#include <smp/ipi.h>
63
#include <smp/ipi.h>
64
#include <arch/atomic.h>
64
#include <arch/atomic.h>
65
#include <panic.h>
65
#include <panic.h>
66
#include <print.h>
66
#include <print.h>
67
#include <sysinfo/sysinfo.h>
67
#include <sysinfo/sysinfo.h>
68
#include <string.h>
68
#include <string.h>
69
 
69
 
70
/* NS16550 as a COM 1 */
70
/* NS16550 as a COM 1 */
71
#define NS16550_IRQ (4 + LEGACY_INTERRUPT_BASE)
71
#define NS16550_IRQ (4 + LEGACY_INTERRUPT_BASE)
72
 
72
 
73
bootinfo_t *bootinfo;
73
bootinfo_t *bootinfo;
74
 
74
 
75
static uint64_t iosapic_base = 0xfec00000;
75
static uint64_t iosapic_base = 0xfec00000;
76
 
76
 
77
/** Performs ia64-specific initialization before main_bsp() is called. */
77
/** Performs ia64-specific initialization before main_bsp() is called. */
78
void arch_pre_main(void)
78
void arch_pre_main(void)
79
{
79
{
80
    /* Setup usermode init tasks. */
80
    /* Setup usermode init tasks. */
81
 
81
 
82
    unsigned int i;
82
    unsigned int i;
83
   
83
   
84
    init.cnt = bootinfo->taskmap.count;
84
    init.cnt = bootinfo->taskmap.count;
85
   
85
   
86
    for (i = 0; i < init.cnt; i++) {
86
    for (i = 0; i < init.cnt; i++) {
87
        init.tasks[i].addr =
87
        init.tasks[i].addr =
88
            ((unsigned long) bootinfo->taskmap.tasks[i].addr) |
88
            ((unsigned long) bootinfo->taskmap.tasks[i].addr) |
89
            VRN_MASK;
89
            VRN_MASK;
90
        init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
90
        init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
91
        strncpy(init.tasks[i].name, bootinfo->taskmap.tasks[i].name,
91
        strncpy(init.tasks[i].name, bootinfo->taskmap.tasks[i].name,
92
            CONFIG_TASK_NAME_BUFLEN);
92
            CONFIG_TASK_NAME_BUFLEN);
93
    }
93
    }
94
}
94
}
95
 
95
 
96
void arch_pre_mm_init(void)
96
void arch_pre_mm_init(void)
97
{
97
{
98
    /*
98
    /*
99
     * Set Interruption Vector Address (i.e. location of interruption vector
99
     * Set Interruption Vector Address (i.e. location of interruption vector
100
     * table).
100
     * table).
101
     */
101
     */
102
    iva_write((uintptr_t) &ivt);
102
    iva_write((uintptr_t) &ivt);
103
    srlz_d();
103
    srlz_d();
104
   
104
   
105
}
105
}
106
 
106
 
107
static void iosapic_init(void)
107
static void iosapic_init(void)
108
{
108
{
109
    uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base)) | FW_OFFSET;
109
    uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base)) | FW_OFFSET;
110
    int i;
110
    int i;
111
   
111
   
112
    int myid, myeid;
112
    int myid, myeid;
113
   
113
   
114
    myid = ia64_get_cpu_id();
114
    myid = ia64_get_cpu_id();
115
    myeid = ia64_get_cpu_eid();
115
    myeid = ia64_get_cpu_eid();
116
 
116
 
117
    for (i = 0; i < 16; i++) {
117
    for (i = 0; i < 16; i++) {
118
        if (i == 2)
118
        if (i == 2)
119
            continue;    /* Disable Cascade interrupt */
119
            continue;    /* Disable Cascade interrupt */
120
        ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i;
120
        ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i;
121
        srlz_d();
121
        srlz_d();
122
        ((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i;
122
        ((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i;
123
        srlz_d();
123
        srlz_d();
124
        ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i + 1;
124
        ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i + 1;
125
        srlz_d();
125
        srlz_d();
126
        ((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) |
126
        ((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) |
127
            myeid << (48 - 32);
127
            myeid << (48 - 32);
128
        srlz_d();
128
        srlz_d();
129
    }
129
    }
130
 
130
 
131
}
131
}
132
 
132
 
133
 
-
 
134
void arch_post_mm_init(void)
133
void arch_post_mm_init(void)
135
{
134
{
136
    if (config.cpu_active == 1) {
135
    if (config.cpu_active == 1) {
137
        iosapic_init();
136
        iosapic_init();
138
        irq_init(INR_COUNT, INR_COUNT);
137
        irq_init(INR_COUNT, INR_COUNT);
139
#ifdef SKI
-
 
140
        ski_init_console();
-
 
141
#else
-
 
142
        ega_init(EGA_BASE, EGA_VIDEORAM);
-
 
143
#endif
-
 
144
    }
138
    }
145
    it_init();
139
    it_init(); 
146
       
-
 
147
}
140
}
148
 
141
 
149
void arch_post_cpu_init(void)
142
void arch_post_cpu_init(void)
150
{
143
{
151
}
144
}
152
 
145
 
153
void arch_pre_smp_init(void)
146
void arch_pre_smp_init(void)
154
{
147
{
155
}
148
}
156
 
149
 
157
void arch_post_smp_init(void)
150
void arch_post_smp_init(void)
158
{
151
{
159
    /*
-
 
160
     * Create thread that polls keyboard.
-
 
161
     */
-
 
162
#ifdef SKI
152
#ifdef SKI
163
    thread_t *t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
-
 
164
    if (!t)
153
    srln_init(stdin);
165
        panic("Cannot create kkbdpoll.");
154
    ski_console_init(&srlnin);
166
    thread_ready(t);
-
 
167
#endif      
155
#endif      
168
 
156
 
169
#ifdef I460GX
157
#ifdef I460GX
-
 
158
#ifdef CONFIG_EGA
-
 
159
    ega_init(EGA_BASE, EGA_VIDEORAM);
-
 
160
#endif
-
 
161
 
170
    devno_t devno = device_assign_devno();
162
    devno_t devno = device_assign_devno();
171
    inr_t inr;
163
    inr_t inr;
172
 
164
 
173
#ifdef CONFIG_NS16550
165
#ifdef CONFIG_NS16550
174
    inr = NS16550_IRQ;
166
    inr = NS16550_IRQ;
175
    srln_init(stdin);
167
    srln_init(stdin);
176
    (void) ns16550_init((ns16550_t *)NS16550_BASE, devno, inr, NULL, NULL,
168
    (void) ns16550_init((ns16550_t *)NS16550_BASE, devno, inr, NULL, NULL,
177
        &srlnin);
169
        &srlnin);
178
    sysinfo_set_item_val("kbd.type", NULL, KBD_NS16550);
170
    sysinfo_set_item_val("kbd.type", NULL, KBD_NS16550);
179
    sysinfo_set_item_val("kbd.address.physical", NULL,
171
    sysinfo_set_item_val("kbd.address.physical", NULL,
180
        (uintptr_t) NS16550_BASE);
172
        (uintptr_t) NS16550_BASE);
181
    sysinfo_set_item_val("kbd.address.kernel", NULL,
173
    sysinfo_set_item_val("kbd.address.kernel", NULL,
182
        (uintptr_t) NS16550_BASE);
174
        (uintptr_t) NS16550_BASE);
183
#else
175
#else
184
    inr = IRQ_KBD;
176
    inr = IRQ_KBD;
185
    kbrd_init(stdin);
177
    kbrd_init(stdin);
186
    (void) i8042_init((i8042_t *)I8042_BASE, devno, inr, &kbrdin);
178
    (void) i8042_init((i8042_t *)I8042_BASE, devno, inr, &kbrdin);
187
    trap_virtual_enable_irqs(1 << inr);
179
    trap_virtual_enable_irqs(1 << inr);
188
    sysinfo_set_item_val("kbd.type", NULL, KBD_LEGACY);
180
    sysinfo_set_item_val("kbd.type", NULL, KBD_LEGACY);
189
    sysinfo_set_item_val("kbd.address.physical", NULL,
181
    sysinfo_set_item_val("kbd.address.physical", NULL,
190
        (uintptr_t) I8042_BASE);
182
        (uintptr_t) I8042_BASE);
191
    sysinfo_set_item_val("kbd.address.kernel", NULL,
183
    sysinfo_set_item_val("kbd.address.kernel", NULL,
192
        (uintptr_t) I8042_BASE);
184
        (uintptr_t) I8042_BASE);
193
#endif
185
#endif
194
    sysinfo_set_item_val("kbd", NULL, true);
186
    sysinfo_set_item_val("kbd", NULL, true);
195
    sysinfo_set_item_val("kbd.devno", NULL, devno);
187
    sysinfo_set_item_val("kbd.devno", NULL, devno);
196
    sysinfo_set_item_val("kbd.inr", NULL, inr);
188
    sysinfo_set_item_val("kbd.inr", NULL, inr);
197
#endif
189
#endif
198
 
190
 
199
    sysinfo_set_item_val("ia64_iospace", NULL, true);
191
    sysinfo_set_item_val("ia64_iospace", NULL, true);
200
    sysinfo_set_item_val("ia64_iospace.address", NULL, true);
192
    sysinfo_set_item_val("ia64_iospace.address", NULL, true);
201
    sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET);
193
    sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET);
202
}
194
}
203
 
195
 
204
 
196
 
205
/** Enter userspace and never return. */
197
/** Enter userspace and never return. */
206
void userspace(uspace_arg_t *kernel_uarg)
198
void userspace(uspace_arg_t *kernel_uarg)
207
{
199
{
208
    psr_t psr;
200
    psr_t psr;
209
    rsc_t rsc;
201
    rsc_t rsc;
210
 
202
 
211
    psr.value = psr_read();
203
    psr.value = psr_read();
212
    psr.cpl = PL_USER;
204
    psr.cpl = PL_USER;
213
    psr.i = true;           /* start with interrupts enabled */
205
    psr.i = true;           /* start with interrupts enabled */
214
    psr.ic = true;
206
    psr.ic = true;
215
    psr.ri = 0;         /* start with instruction #0 */
207
    psr.ri = 0;         /* start with instruction #0 */
216
    psr.bn = 1;         /* start in bank 0 */
208
    psr.bn = 1;         /* start in bank 0 */
217
 
209
 
218
    asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
210
    asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
219
    rsc.loadrs = 0;
211
    rsc.loadrs = 0;
220
    rsc.be = false;
212
    rsc.be = false;
221
    rsc.pl = PL_USER;
213
    rsc.pl = PL_USER;
222
    rsc.mode = 3;           /* eager mode */
214
    rsc.mode = 3;           /* eager mode */
223
 
215
 
224
    switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
216
    switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
225
        ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE -
217
        ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE -
226
        ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
218
        ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
227
        ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE,
219
        ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE,
228
        (uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value);
220
        (uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value);
229
 
221
 
230
    while (1)
222
    while (1)
231
        ;
223
        ;
232
}
224
}
233
 
225
 
234
/** Set thread-local-storage pointer.
226
/** Set thread-local-storage pointer.
235
 *
227
 *
236
 * We use r13 (a.k.a. tp) for this purpose.
228
 * We use r13 (a.k.a. tp) for this purpose.
237
 */
229
 */
238
unative_t sys_tls_set(unative_t addr)
230
unative_t sys_tls_set(unative_t addr)
239
{
231
{
240
        return 0;
232
        return 0;
241
}
233
}
242
 
234
 
243
/** Acquire console back for kernel
235
/** Acquire console back for kernel
244
 *
236
 *
245
 */
237
 */
246
void arch_grab_console(void)
238
void arch_grab_console(void)
247
{
239
{
248
#ifdef SKI
240
#ifdef SKI
249
    ski_kbd_grab();
241
    ski_kbd_grab();
250
#endif
242
#endif
251
}
243
}
252
 
244
 
253
/** Return console to userspace
245
/** Return console to userspace
254
 *
246
 *
255
 */
247
 */
256
void arch_release_console(void)
248
void arch_release_console(void)
257
{
249
{
258
#ifdef SKI
250
#ifdef SKI
259
    ski_kbd_release();
251
    ski_kbd_release();
260
#endif
252
#endif
261
}
253
}
262
 
254
 
263
void arch_reboot(void)
255
void arch_reboot(void)
264
{
256
{
265
    pio_write_8((ioport8_t *)0x64, 0xfe);
257
    pio_write_8((ioport8_t *)0x64, 0xfe);
266
    while (1)
258
    while (1)
267
        ;
259
        ;
268
}
260
}
269
 
261
 
270
/** Construct function pointer
262
/** Construct function pointer
271
 *
263
 *
272
 * @param fptr   function pointer structure
264
 * @param fptr   function pointer structure
273
 * @param addr   function address
265
 * @param addr   function address
274
 * @param caller calling function address
266
 * @param caller calling function address
275
 *
267
 *
276
 * @return address of the function pointer
268
 * @return address of the function pointer
277
 *
269
 *
278
 */
270
 */
279
void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
271
void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
280
{
272
{
281
    fptr->fnc = (unative_t) addr;
273
    fptr->fnc = (unative_t) addr;
282
    fptr->gp = ((unative_t *) caller)[1];
274
    fptr->gp = ((unative_t *) caller)[1];
283
   
275
   
284
    return (void *) fptr;
276
    return (void *) fptr;
285
}
277
}
286
 
278
 
287
/** @}
279
/** @}
288
 */
280
 */
289
 
281