WebSVN – HelenOS – Diff – /trunk/kernel/arch/ia64/src/ia64.c


/*
 * Copyright (c) 2005 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup ia64
 * @{
 */
/** @file
 */
 
#include <arch.h>
#include <arch/ski/ski.h>
#include <arch/drivers/it.h>
#include <arch/interrupt.h>
#include <arch/barrier.h>
#include <arch/asm.h>
#include <arch/register.h>
#include <arch/types.h>
#include <arch/context.h>
#include <arch/stack.h>
#include <arch/mm/page.h>
#include <mm/as.h>
#include <config.h>
#include <userspace.h>
#include <console/console.h>
#include <proc/uarg.h>
#include <syscall/syscall.h>
#include <ddi/irq.h>
#include <ddi/device.h>
#include <arch/bootinfo.h>
#include <genarch/drivers/legacy/ia32/io.h>
#include <genarch/drivers/ega/ega.h>
#include <genarch/kbrd/kbrd.h>
#include <genarch/srln/srln.h>
#include <genarch/drivers/i8042/i8042.h>
#include <genarch/drivers/ns16550/ns16550.h>
#include <arch/drivers/kbd.h>
#include <smp/smp.h>
#include <smp/ipi.h>
#include <arch/atomic.h>
#include <panic.h>
#include <print.h>
#include <sysinfo/sysinfo.h>
#include <string.h>
 
/* NS16550 as a COM 1 */
#define NS16550_IRQ (4 + LEGACY_INTERRUPT_BASE)
 
bootinfo_t *bootinfo;
 
static uint64_t iosapic_base = 0xfec00000;
 
/** Performs ia64-specific initialization before main_bsp() is called. */
void arch_pre_main(void)
{
    /* Setup usermode init tasks. */
 
    unsigned int i;
   
    init.cnt = bootinfo->taskmap.count;
   
    for (i = 0; i < init.cnt; i++) {
        init.tasks[i].addr =
            ((unsigned long) bootinfo->taskmap.tasks[i].addr) |
            VRN_MASK;
        init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
        strncpy(init.tasks[i].name, bootinfo->taskmap.tasks[i].name,
            CONFIG_TASK_NAME_BUFLEN);
    }
}
 
void arch_pre_mm_init(void)
{
    /*
     * Set Interruption Vector Address (i.e. location of interruption vector
     * table).
     */
    iva_write((uintptr_t) &ivt);
    srlz_d();
   
}
 
static void iosapic_init(void)
{
    uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base)) | FW_OFFSET;
    int i;
   
    int myid, myeid;
   
    myid = ia64_get_cpu_id();
    myeid = ia64_get_cpu_eid();
 
    for (i = 0; i < 16; i++) {
        if (i == 2)
            continue;    /* Disable Cascade interrupt */
        ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i;
        srlz_d();
        ((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i;
        srlz_d();
        ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i + 1;
        srlz_d();
        ((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) |
            myeid << (48 - 32);
        srlz_d();
    }
 
}
 
 
void arch_post_mm_init(void)
{
    if (config.cpu_active == 1) {
        iosapic_init();
        irq_init(INR_COUNT, INR_COUNT);
#ifdef SKI
        ski_init_console();
#else
        ega_init(EGA_BASE, EGA_VIDEORAM);
#endif
    }
    it_init();
       
}
 
void arch_post_cpu_init(void)
{
}
 
void arch_pre_smp_init(void)
{
}
 
void arch_post_smp_init(void)
{
    /*
     * Create thread that polls keyboard.
     */
#ifdef SKI
    thread_t *t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
    if (!t)
        panic("Cannot create kkbdpoll.");
    thread_ready(t);
#endif      
 
#ifdef I460GX
    devno_t devno = device_assign_devno();
    inr_t inr;
 
#ifdef CONFIG_NS16550
    inr = NS16550_IRQ;
    srln_init(stdin);
    (void) ns16550_init((ns16550_t *)NS16550_BASE, devno, inr, NULL, NULL,
        &srlnin);
    sysinfo_set_item_val("kbd.type", NULL, KBD_NS16550);
    sysinfo_set_item_val("kbd.address.physical", NULL,
        (uintptr_t) NS16550_BASE);
    sysinfo_set_item_val("kbd.address.kernel", NULL,
        (uintptr_t) NS16550_BASE);
#else
    inr = IRQ_KBD;
    kbrd_init(stdin);
    (void) i8042_init((i8042_t *)I8042_BASE, devno, inr, &kbrdin);
    trap_virtual_enable_irqs(1 << inr);
    sysinfo_set_item_val("kbd.type", NULL, KBD_LEGACY);
    sysinfo_set_item_val("kbd.address.physical", NULL,
        (uintptr_t) I8042_BASE);
    sysinfo_set_item_val("kbd.address.kernel", NULL,
        (uintptr_t) I8042_BASE);
#endif
    sysinfo_set_item_val("kbd", NULL, true);
    sysinfo_set_item_val("kbd.devno", NULL, devno);
    sysinfo_set_item_val("kbd.inr", NULL, inr);
#endif
 
    sysinfo_set_item_val("ia64_iospace", NULL, true);
    sysinfo_set_item_val("ia64_iospace.address", NULL, true);
    sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET);
}
 
 
/** Enter userspace and never return. */
void userspace(uspace_arg_t *kernel_uarg)
{
    psr_t psr;
    rsc_t rsc;
 
    psr.value = psr_read();
    psr.cpl = PL_USER;
    psr.i = true;           /* start with interrupts enabled */
    psr.ic = true;
    psr.ri = 0;         /* start with instruction #0 */
    psr.bn = 1;         /* start in bank 0 */
 
    asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
    rsc.loadrs = 0;
    rsc.be = false;
    rsc.pl = PL_USER;
    rsc.mode = 3;           /* eager mode */
 
    switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
        ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE -
        ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
        ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE,
        (uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value);
 
    while (1)
        ;
}
 
/** Set thread-local-storage pointer.
 *
 * We use r13 (a.k.a. tp) for this purpose.
 */
unative_t sys_tls_set(unative_t addr)
{
        return 0;
}
 
/** Acquire console back for kernel
 *
 */
void arch_grab_console(void)
{
#ifdef SKI
    ski_kbd_grab();
#endif
}
 
/** Return console to userspace
 *
 */
void arch_release_console(void)
{
#ifdef SKI
    ski_kbd_release();
#endif
}
 
void arch_reboot(void)
{
    pio_write_8((ioport8_t *)0x64, 0xfe);
    while (1)
        ;
}
 
/** Construct function pointer
 *
 * @param fptr   function pointer structure
 * @param addr   function address
 * @param caller calling function address
 *
 * @return address of the function pointer
 *
 */
void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
{
    fptr->fnc = (unative_t) addr;
    fptr->gp = ((unative_t *) caller)[1];
   
    return (void *) fptr;
}
 
/** @}
 */
 

Rev 4042	Rev 4043
1	/*	1	/*
2	* Copyright (c) 2005 Jakub Jermar	2	* Copyright (c) 2005 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup ia64	29	/** @addtogroup ia64
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35	#include <arch.h>	35	#include <arch.h>
36	#include <arch/ski/ski.h>	36	#include <arch/ski/ski.h>
37	#include <arch/drivers/it.h>	37	#include <arch/drivers/it.h>
38	#include <arch/interrupt.h>	38	#include <arch/interrupt.h>
39	#include <arch/barrier.h>	39	#include <arch/barrier.h>
40	#include <arch/asm.h>	40	#include <arch/asm.h>
41	#include <arch/register.h>	41	#include <arch/register.h>
42	#include <arch/types.h>	42	#include <arch/types.h>
43	#include <arch/context.h>	43	#include <arch/context.h>
44	#include <arch/stack.h>	44	#include <arch/stack.h>
45	#include <arch/mm/page.h>	45	#include <arch/mm/page.h>
46	#include <mm/as.h>	46	#include <mm/as.h>
47	#include <config.h>	47	#include <config.h>
48	#include <userspace.h>	48	#include <userspace.h>
49	#include <console/console.h>	49	#include <console/console.h>
50	#include <proc/uarg.h>	50	#include <proc/uarg.h>
51	#include <syscall/syscall.h>	51	#include <syscall/syscall.h>
52	#include <ddi/irq.h>	52	#include <ddi/irq.h>
53	#include <ddi/device.h>	53	#include <ddi/device.h>
54	#include <arch/bootinfo.h>	54	#include <arch/bootinfo.h>
55	#include <genarch/drivers/legacy/ia32/io.h>	55	#include <genarch/drivers/legacy/ia32/io.h>
56	#include <genarch/drivers/ega/ega.h>	56	#include <genarch/drivers/ega/ega.h>
57	#include <genarch/kbrd/kbrd.h>	57	#include <genarch/kbrd/kbrd.h>
-		58	#include <genarch/srln/srln.h>
58	#include <genarch/drivers/i8042/i8042.h>	59	#include <genarch/drivers/i8042/i8042.h>
59	#include <genarch/kbd/ns16550.h>	60	#include <genarch/drivers/ns16550/ns16550.h>
-		61	#include <arch/drivers/kbd.h>
60	#include <smp/smp.h>	62	#include <smp/smp.h>
61	#include <smp/ipi.h>	63	#include <smp/ipi.h>
62	#include <arch/atomic.h>	64	#include <arch/atomic.h>
63	#include <panic.h>	65	#include <panic.h>
64	#include <print.h>	66	#include <print.h>
65	#include <sysinfo/sysinfo.h>	67	#include <sysinfo/sysinfo.h>
66	#include <string.h>	68	#include <string.h>
67		69
68	/* NS16550 as a COM 1 */	70	/* NS16550 as a COM 1 */
69	#define NS16550_IRQ (4 + LEGACY_INTERRUPT_BASE)	71	#define NS16550_IRQ (4 + LEGACY_INTERRUPT_BASE)
70		72
71	bootinfo_t *bootinfo;	73	bootinfo_t *bootinfo;
72		74
73	static uint64_t iosapic_base = 0xfec00000;	75	static uint64_t iosapic_base = 0xfec00000;
74		76
75	/** Performs ia64-specific initialization before main_bsp() is called. */	77	/** Performs ia64-specific initialization before main_bsp() is called. */
76	void arch_pre_main(void)	78	void arch_pre_main(void)
77	{	79	{
78	/* Setup usermode init tasks. */	80	/* Setup usermode init tasks. */
79		81
80	unsigned int i;	82	unsigned int i;
81		83
82	init.cnt = bootinfo->taskmap.count;	84	init.cnt = bootinfo->taskmap.count;
83		85
84	for (i = 0; i < init.cnt; i++) {	86	for (i = 0; i < init.cnt; i++) {
85	init.tasks[i].addr =	87	init.tasks[i].addr =
86	((unsigned long) bootinfo->taskmap.tasks[i].addr) \|	88	((unsigned long) bootinfo->taskmap.tasks[i].addr) \|
87	VRN_MASK;	89	VRN_MASK;
88	init.tasks[i].size = bootinfo->taskmap.tasks[i].size;	90	init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
89	strncpy(init.tasks[i].name, bootinfo->taskmap.tasks[i].name,	91	strncpy(init.tasks[i].name, bootinfo->taskmap.tasks[i].name,
90	CONFIG_TASK_NAME_BUFLEN);	92	CONFIG_TASK_NAME_BUFLEN);
91	}	93	}
92	}	94	}
93		95
94	void arch_pre_mm_init(void)	96	void arch_pre_mm_init(void)
95	{	97	{
96	/*	98	/*
97	* Set Interruption Vector Address (i.e. location of interruption vector	99	* Set Interruption Vector Address (i.e. location of interruption vector
98	* table).	100	* table).
99	*/	101	*/
100	iva_write((uintptr_t) &ivt);	102	iva_write((uintptr_t) &ivt);
101	srlz_d();	103	srlz_d();
102		104
103	}	105	}
104		106
105	static void iosapic_init(void)	107	static void iosapic_init(void)
106	{	108	{
107	uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base)) \| FW_OFFSET;	109	uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base)) \| FW_OFFSET;
108	int i;	110	int i;
109		111
110	int myid, myeid;	112	int myid, myeid;
111		113
112	myid = ia64_get_cpu_id();	114	myid = ia64_get_cpu_id();
113	myeid = ia64_get_cpu_eid();	115	myeid = ia64_get_cpu_eid();
114		116
115	for (i = 0; i < 16; i++) {	117	for (i = 0; i < 16; i++) {
116	if (i == 2)	118	if (i == 2)
117	continue; /* Disable Cascade interrupt */	119	continue; /* Disable Cascade interrupt */
118	((uint32_t )(IOSAPIC + 0x00))[0] = 0x10 + 2 i;	120	((uint32_t )(IOSAPIC + 0x00))[0] = 0x10 + 2 i;
119	srlz_d();	121	srlz_d();
120	((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i;	122	((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i;
121	srlz_d();	123	srlz_d();
122	((uint32_t )(IOSAPIC + 0x00))[0] = 0x10 + 2 i + 1;	124	((uint32_t )(IOSAPIC + 0x00))[0] = 0x10 + 2 i + 1;
123	srlz_d();	125	srlz_d();
124	((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) \|	126	((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) \|
125	myeid << (48 - 32);	127	myeid << (48 - 32);
126	srlz_d();	128	srlz_d();
127	}	129	}
128		130
129	}	131	}
130		132
131		133
132	void arch_post_mm_init(void)	134	void arch_post_mm_init(void)
133	{	135	{
134	if (config.cpu_active == 1) {	136	if (config.cpu_active == 1) {
135	iosapic_init();	137	iosapic_init();
136	irq_init(INR_COUNT, INR_COUNT);	138	irq_init(INR_COUNT, INR_COUNT);
137	#ifdef SKI	139	#ifdef SKI
138	ski_init_console();	140	ski_init_console();
139	#else	141	#else
140	ega_init(EGA_BASE, EGA_VIDEORAM);	142	ega_init(EGA_BASE, EGA_VIDEORAM);
141	#endif	143	#endif
142	}	144	}
143	it_init();	145	it_init();
144		146
145	}	147	}
146		148
147	void arch_post_cpu_init(void)	149	void arch_post_cpu_init(void)
148	{	150	{
149	}	151	}
150		152
151	void arch_pre_smp_init(void)	153	void arch_pre_smp_init(void)
152	{	154	{
153	}	155	}
154		156
155	void arch_post_smp_init(void)	157	void arch_post_smp_init(void)
156	{	158	{
157	/*	159	/*
158	* Create thread that polls keyboard.	160	* Create thread that polls keyboard.
159	*/	161	*/
160	#ifdef SKI	162	#ifdef SKI
161	thread_t *t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);	163	thread_t *t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
162	if (!t)	164	if (!t)
163	panic("Cannot create kkbdpoll.");	165	panic("Cannot create kkbdpoll.");
164	thread_ready(t);	166	thread_ready(t);
165	#endif	167	#endif
166		168
167	#ifdef I460GX	169	#ifdef I460GX
168	devno_t devno = device_assign_devno();	170	devno_t devno = device_assign_devno();
169	inr_t inr;	171	inr_t inr;
170		172
171	#ifdef CONFIG_NS16550	173	#ifdef CONFIG_NS16550
172	inr = NS16550_IRQ;	174	inr = NS16550_IRQ;
-		175	srln_init(stdin);
173	(void) ns16550_init((ns16550_t *)NS16550_BASE, devno, inr, NULL, NULL);	176	(void) ns16550_init((ns16550_t *)NS16550_BASE, devno, inr, NULL, NULL,
-		177	&srlnin);
174	sysinfo_set_item_val("kbd.type", NULL, KBD_NS16550);	178	sysinfo_set_item_val("kbd.type", NULL, KBD_NS16550);
175	sysinfo_set_item_val("kbd.address.physical", NULL,	179	sysinfo_set_item_val("kbd.address.physical", NULL,
176	(uintptr_t) NS16550_BASE);	180	(uintptr_t) NS16550_BASE);
177	sysinfo_set_item_val("kbd.address.kernel", NULL,	181	sysinfo_set_item_val("kbd.address.kernel", NULL,
178	(uintptr_t) NS16550_BASE);	182	(uintptr_t) NS16550_BASE);
179	#else	183	#else
180	inr = IRQ_KBD;	184	inr = IRQ_KBD;
181	kbrd_init(stdin);	185	kbrd_init(stdin);
182	(void) i8042_init((i8042_t *)I8042_BASE, devno, inr, &kbrdin);	186	(void) i8042_init((i8042_t *)I8042_BASE, devno, inr, &kbrdin);
183	trap_virtual_enable_irqs(1 << inr);	187	trap_virtual_enable_irqs(1 << inr);
184	sysinfo_set_item_val("kbd.type", NULL, KBD_LEGACY);	188	sysinfo_set_item_val("kbd.type", NULL, KBD_LEGACY);
185	sysinfo_set_item_val("kbd.address.physical", NULL,	189	sysinfo_set_item_val("kbd.address.physical", NULL,
186	(uintptr_t) I8042_BASE);	190	(uintptr_t) I8042_BASE);
187	sysinfo_set_item_val("kbd.address.kernel", NULL,	191	sysinfo_set_item_val("kbd.address.kernel", NULL,
188	(uintptr_t) I8042_BASE);	192	(uintptr_t) I8042_BASE);
189	#endif	193	#endif
190	sysinfo_set_item_val("kbd", NULL, true);	194	sysinfo_set_item_val("kbd", NULL, true);
191	sysinfo_set_item_val("kbd.devno", NULL, devno);	195	sysinfo_set_item_val("kbd.devno", NULL, devno);
192	sysinfo_set_item_val("kbd.inr", NULL, inr);	196	sysinfo_set_item_val("kbd.inr", NULL, inr);
193	#endif	197	#endif
194		198
195	sysinfo_set_item_val("ia64_iospace", NULL, true);	199	sysinfo_set_item_val("ia64_iospace", NULL, true);
196	sysinfo_set_item_val("ia64_iospace.address", NULL, true);	200	sysinfo_set_item_val("ia64_iospace.address", NULL, true);
197	sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET);	201	sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET);
198	}	202	}
199		203
200		204
201	/** Enter userspace and never return. */	205	/** Enter userspace and never return. */
202	void userspace(uspace_arg_t *kernel_uarg)	206	void userspace(uspace_arg_t *kernel_uarg)
203	{	207	{
204	psr_t psr;	208	psr_t psr;
205	rsc_t rsc;	209	rsc_t rsc;
206		210
207	psr.value = psr_read();	211	psr.value = psr_read();
208	psr.cpl = PL_USER;	212	psr.cpl = PL_USER;
209	psr.i = true; /* start with interrupts enabled */	213	psr.i = true; /* start with interrupts enabled */
210	psr.ic = true;	214	psr.ic = true;
211	psr.ri = 0; /* start with instruction #0 */	215	psr.ri = 0; /* start with instruction #0 */
212	psr.bn = 1; /* start in bank 0 */	216	psr.bn = 1; /* start in bank 0 */
213		217
214	asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));	218	asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
215	rsc.loadrs = 0;	219	rsc.loadrs = 0;
216	rsc.be = false;	220	rsc.be = false;
217	rsc.pl = PL_USER;	221	rsc.pl = PL_USER;
218	rsc.mode = 3; /* eager mode */	222	rsc.mode = 3; /* eager mode */
219		223
220	switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,	224	switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
221	((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE -	225	((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE -
222	ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),	226	ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
223	((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE,	227	((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE,
224	(uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value);	228	(uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value);
225		229
226	while (1)	230	while (1)
227	;	231	;
228	}	232	}
229		233
230	/** Set thread-local-storage pointer.	234	/** Set thread-local-storage pointer.
231	*	235	*
232	* We use r13 (a.k.a. tp) for this purpose.	236	* We use r13 (a.k.a. tp) for this purpose.
233	*/	237	*/
234	unative_t sys_tls_set(unative_t addr)	238	unative_t sys_tls_set(unative_t addr)
235	{	239	{
236	return 0;	240	return 0;
237	}	241	}
238		242
239	/** Acquire console back for kernel	243	/** Acquire console back for kernel
240	*	244	*
241	*/	245	*/
242	void arch_grab_console(void)	246	void arch_grab_console(void)
243	{	247	{
244	#ifdef SKI	248	#ifdef SKI
245	ski_kbd_grab();	249	ski_kbd_grab();
246	#endif	250	#endif
247	}	251	}
248		252
249	/** Return console to userspace	253	/** Return console to userspace
250	*	254	*
251	*/	255	*/
252	void arch_release_console(void)	256	void arch_release_console(void)
253	{	257	{
254	#ifdef SKI	258	#ifdef SKI
255	ski_kbd_release();	259	ski_kbd_release();
256	#endif	260	#endif
257	}	261	}
258		262
259	void arch_reboot(void)	263	void arch_reboot(void)
260	{	264	{
261	pio_write_8((ioport8_t *)0x64, 0xfe);	265	pio_write_8((ioport8_t *)0x64, 0xfe);
262	while (1)	266	while (1)
263	;	267	;
264	}	268	}
265		269
266	/** Construct function pointer	270	/** Construct function pointer
267	*	271	*
268	* @param fptr function pointer structure	272	* @param fptr function pointer structure
269	* @param addr function address	273	* @param addr function address
270	* @param caller calling function address	274	* @param caller calling function address
271	*	275	*
272	* @return address of the function pointer	276	* @return address of the function pointer
273	*	277	*
274	*/	278	*/
275	void arch_construct_function(fncptr_t fptr, void addr, void caller)	279	void arch_construct_function(fncptr_t fptr, void addr, void caller)
276	{	280	{
277	fptr->fnc = (unative_t) addr;	281	fptr->fnc = (unative_t) addr;
278	fptr->gp = ((unative_t *) caller)[1];	282	fptr->gp = ((unative_t *) caller)[1];
279		283
280	return (void *) fptr;	284	return (void *) fptr;
281	}	285	}
282		286
283	/** @}	287	/** @}
284	*/	288	*/
285		289

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(root)/trunk/kernel/arch/ia64/src/ia64.c – Rev 4042 → 4043