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1
/*
1
/*
2
 * Copyright (c) 2005 Jakub Jermar
2
 * Copyright (c) 2005 Jakub Jermar
3
 * All rights reserved.
3
 * All rights reserved.
4
 *
4
 *
5
 * Redistribution and use in source and binary forms, with or without
5
 * Redistribution and use in source and binary forms, with or without
6
 * modification, are permitted provided that the following conditions
6
 * modification, are permitted provided that the following conditions
7
 * are met:
7
 * are met:
8
 *
8
 *
9
 * - Redistributions of source code must retain the above copyright
9
 * - Redistributions of source code must retain the above copyright
10
 *   notice, this list of conditions and the following disclaimer.
10
 *   notice, this list of conditions and the following disclaimer.
11
 * - Redistributions in binary form must reproduce the above copyright
11
 * - Redistributions in binary form must reproduce the above copyright
12
 *   notice, this list of conditions and the following disclaimer in the
12
 *   notice, this list of conditions and the following disclaimer in the
13
 *   documentation and/or other materials provided with the distribution.
13
 *   documentation and/or other materials provided with the distribution.
14
 * - The name of the author may not be used to endorse or promote products
14
 * - The name of the author may not be used to endorse or promote products
15
 *   derived from this software without specific prior written permission.
15
 *   derived from this software without specific prior written permission.
16
 *
16
 *
17
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
 */
27
 */
28
 
28
 
29
/** @addtogroup ia64
29
/** @addtogroup ia64
30
 * @{
30
 * @{
31
 */
31
 */
32
/** @file
32
/** @file
33
 */
33
 */
34
 
34
 
35
#include <arch.h>
35
#include <arch.h>
36
#include <arch/ski/ski.h>
36
#include <arch/ski/ski.h>
37
#include <arch/drivers/it.h>
37
#include <arch/drivers/it.h>
38
#include <arch/interrupt.h>
38
#include <arch/interrupt.h>
39
#include <arch/barrier.h>
39
#include <arch/barrier.h>
40
#include <arch/asm.h>
40
#include <arch/asm.h>
41
#include <arch/register.h>
41
#include <arch/register.h>
42
#include <arch/types.h>
42
#include <arch/types.h>
43
#include <arch/context.h>
43
#include <arch/context.h>
44
#include <arch/stack.h>
44
#include <arch/stack.h>
45
#include <arch/mm/page.h>
45
#include <arch/mm/page.h>
46
#include <mm/as.h>
46
#include <mm/as.h>
47
#include <config.h>
47
#include <config.h>
48
#include <userspace.h>
48
#include <userspace.h>
49
#include <console/console.h>
49
#include <console/console.h>
50
#include <proc/uarg.h>
50
#include <proc/uarg.h>
51
#include <syscall/syscall.h>
51
#include <syscall/syscall.h>
52
#include <ddi/irq.h>
52
#include <ddi/irq.h>
53
#include <ddi/device.h>
53
#include <ddi/device.h>
54
#include <arch/bootinfo.h>
54
#include <arch/bootinfo.h>
55
#include <genarch/drivers/legacy/ia32/io.h>
55
#include <genarch/drivers/legacy/ia32/io.h>
56
#include <genarch/drivers/ega/ega.h>
56
#include <genarch/drivers/ega/ega.h>
57
#include <genarch/kbd/i8042.h>
57
#include <genarch/kbrd/kbrd.h>
-
 
58
#include <genarch/drivers/i8042/i8042.h>
58
#include <genarch/kbd/ns16550.h>
59
#include <genarch/kbd/ns16550.h>
59
#include <smp/smp.h>
60
#include <smp/smp.h>
60
#include <smp/ipi.h>
61
#include <smp/ipi.h>
61
#include <arch/atomic.h>
62
#include <arch/atomic.h>
62
#include <panic.h>
63
#include <panic.h>
63
#include <print.h>
64
#include <print.h>
64
#include <sysinfo/sysinfo.h>
65
#include <sysinfo/sysinfo.h>
65
#include <string.h>
66
#include <string.h>
66
 
67
 
67
/* NS16550 as a COM 1 */
68
/* NS16550 as a COM 1 */
68
#define NS16550_IRQ (4 + LEGACY_INTERRUPT_BASE)
69
#define NS16550_IRQ (4 + LEGACY_INTERRUPT_BASE)
69
 
70
 
70
bootinfo_t *bootinfo;
71
bootinfo_t *bootinfo;
71
 
72
 
72
static uint64_t iosapic_base = 0xfec00000;
73
static uint64_t iosapic_base = 0xfec00000;
73
 
74
 
74
/** Performs ia64-specific initialization before main_bsp() is called. */
75
/** Performs ia64-specific initialization before main_bsp() is called. */
75
void arch_pre_main(void)
76
void arch_pre_main(void)
76
{
77
{
77
    /* Setup usermode init tasks. */
78
    /* Setup usermode init tasks. */
78
 
79
 
79
    unsigned int i;
80
    unsigned int i;
80
   
81
   
81
    init.cnt = bootinfo->taskmap.count;
82
    init.cnt = bootinfo->taskmap.count;
82
   
83
   
83
    for (i = 0; i < init.cnt; i++) {
84
    for (i = 0; i < init.cnt; i++) {
84
        init.tasks[i].addr =
85
        init.tasks[i].addr =
85
            ((unsigned long) bootinfo->taskmap.tasks[i].addr) |
86
            ((unsigned long) bootinfo->taskmap.tasks[i].addr) |
86
            VRN_MASK;
87
            VRN_MASK;
87
        init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
88
        init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
88
        strncpy(init.tasks[i].name, bootinfo->taskmap.tasks[i].name,
89
        strncpy(init.tasks[i].name, bootinfo->taskmap.tasks[i].name,
89
            CONFIG_TASK_NAME_BUFLEN);
90
            CONFIG_TASK_NAME_BUFLEN);
90
    }
91
    }
91
}
92
}
92
 
93
 
93
void arch_pre_mm_init(void)
94
void arch_pre_mm_init(void)
94
{
95
{
95
    /*
96
    /*
96
     * Set Interruption Vector Address (i.e. location of interruption vector
97
     * Set Interruption Vector Address (i.e. location of interruption vector
97
     * table).
98
     * table).
98
     */
99
     */
99
    iva_write((uintptr_t) &ivt);
100
    iva_write((uintptr_t) &ivt);
100
    srlz_d();
101
    srlz_d();
101
   
102
   
102
}
103
}
103
 
104
 
104
static void iosapic_init(void)
105
static void iosapic_init(void)
105
{
106
{
106
    uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base)) | FW_OFFSET;
107
    uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base)) | FW_OFFSET;
107
    int i;
108
    int i;
108
   
109
   
109
    int myid, myeid;
110
    int myid, myeid;
110
   
111
   
111
    myid = ia64_get_cpu_id();
112
    myid = ia64_get_cpu_id();
112
    myeid = ia64_get_cpu_eid();
113
    myeid = ia64_get_cpu_eid();
113
 
114
 
114
    for (i = 0; i < 16; i++) {
115
    for (i = 0; i < 16; i++) {
115
        if (i == 2)
116
        if (i == 2)
116
            continue;    /* Disable Cascade interrupt */
117
            continue;    /* Disable Cascade interrupt */
117
        ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i;
118
        ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i;
118
        srlz_d();
119
        srlz_d();
119
        ((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i;
120
        ((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i;
120
        srlz_d();
121
        srlz_d();
121
        ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i + 1;
122
        ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i + 1;
122
        srlz_d();
123
        srlz_d();
123
        ((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) |
124
        ((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) |
124
            myeid << (48 - 32);
125
            myeid << (48 - 32);
125
        srlz_d();
126
        srlz_d();
126
    }
127
    }
127
 
128
 
128
}
129
}
129
 
130
 
130
 
131
 
131
void arch_post_mm_init(void)
132
void arch_post_mm_init(void)
132
{
133
{
133
    if (config.cpu_active == 1) {
134
    if (config.cpu_active == 1) {
134
        iosapic_init();
135
        iosapic_init();
135
        irq_init(INR_COUNT, INR_COUNT);
136
        irq_init(INR_COUNT, INR_COUNT);
136
#ifdef SKI
137
#ifdef SKI
137
        ski_init_console();
138
        ski_init_console();
138
#else
139
#else
139
        ega_init(EGA_BASE, EGA_VIDEORAM);
140
        ega_init(EGA_BASE, EGA_VIDEORAM);
140
#endif
141
#endif
141
    }
142
    }
142
    it_init();
143
    it_init();
143
       
144
       
144
}
145
}
145
 
146
 
146
void arch_post_cpu_init(void)
147
void arch_post_cpu_init(void)
147
{
148
{
148
}
149
}
149
 
150
 
150
void arch_pre_smp_init(void)
151
void arch_pre_smp_init(void)
151
{
152
{
152
}
153
}
153
 
154
 
154
void arch_post_smp_init(void)
155
void arch_post_smp_init(void)
155
{
156
{
156
    /*
157
    /*
157
     * Create thread that polls keyboard.
158
     * Create thread that polls keyboard.
158
     */
159
     */
159
#ifdef SKI
160
#ifdef SKI
160
    thread_t *t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
161
    thread_t *t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
161
    if (!t)
162
    if (!t)
162
        panic("Cannot create kkbdpoll.");
163
        panic("Cannot create kkbdpoll.");
163
    thread_ready(t);
164
    thread_ready(t);
164
#endif      
165
#endif      
165
 
166
 
166
#ifdef I460GX
167
#ifdef I460GX
167
    devno_t devno = device_assign_devno();
168
    devno_t devno = device_assign_devno();
168
    inr_t inr;
169
    inr_t inr;
169
 
170
 
170
#ifdef CONFIG_NS16550
171
#ifdef CONFIG_NS16550
171
    inr = NS16550_IRQ;
172
    inr = NS16550_IRQ;
172
    (void) ns16550_init((ns16550_t *)NS16550_BASE, devno, inr, NULL, NULL);
173
    (void) ns16550_init((ns16550_t *)NS16550_BASE, devno, inr, NULL, NULL);
173
    sysinfo_set_item_val("kbd.type", NULL, KBD_NS16550);
174
    sysinfo_set_item_val("kbd.type", NULL, KBD_NS16550);
174
    sysinfo_set_item_val("kbd.address.physical", NULL,
175
    sysinfo_set_item_val("kbd.address.physical", NULL,
175
        (uintptr_t) NS16550_BASE);
176
        (uintptr_t) NS16550_BASE);
176
    sysinfo_set_item_val("kbd.address.kernel", NULL,
177
    sysinfo_set_item_val("kbd.address.kernel", NULL,
177
        (uintptr_t) NS16550_BASE);
178
        (uintptr_t) NS16550_BASE);
178
#else
179
#else
179
    inr = IRQ_KBD;
180
    inr = IRQ_KBD;
-
 
181
    kbrd_init(stdin);
180
    (void) i8042_init((i8042_t *)I8042_BASE, devno, inr);
182
    (void) i8042_init((i8042_t *)I8042_BASE, devno, inr, &kbrdin);
-
 
183
    trap_virtual_enable_irqs(1 << inr);
181
    sysinfo_set_item_val("kbd.type", NULL, KBD_LEGACY);
184
    sysinfo_set_item_val("kbd.type", NULL, KBD_LEGACY);
182
    sysinfo_set_item_val("kbd.address.physical", NULL,
185
    sysinfo_set_item_val("kbd.address.physical", NULL,
183
        (uintptr_t) I8042_BASE);
186
        (uintptr_t) I8042_BASE);
184
    sysinfo_set_item_val("kbd.address.kernel", NULL,
187
    sysinfo_set_item_val("kbd.address.kernel", NULL,
185
        (uintptr_t) I8042_BASE);
188
        (uintptr_t) I8042_BASE);
186
#endif
189
#endif
187
    sysinfo_set_item_val("kbd", NULL, true);
190
    sysinfo_set_item_val("kbd", NULL, true);
188
    sysinfo_set_item_val("kbd.devno", NULL, devno);
191
    sysinfo_set_item_val("kbd.devno", NULL, devno);
189
    sysinfo_set_item_val("kbd.inr", NULL, inr);
192
    sysinfo_set_item_val("kbd.inr", NULL, inr);
190
#endif
193
#endif
191
 
194
 
192
    sysinfo_set_item_val("ia64_iospace", NULL, true);
195
    sysinfo_set_item_val("ia64_iospace", NULL, true);
193
    sysinfo_set_item_val("ia64_iospace.address", NULL, true);
196
    sysinfo_set_item_val("ia64_iospace.address", NULL, true);
194
    sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET);
197
    sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET);
195
}
198
}
196
 
199
 
197
 
200
 
198
/** Enter userspace and never return. */
201
/** Enter userspace and never return. */
199
void userspace(uspace_arg_t *kernel_uarg)
202
void userspace(uspace_arg_t *kernel_uarg)
200
{
203
{
201
    psr_t psr;
204
    psr_t psr;
202
    rsc_t rsc;
205
    rsc_t rsc;
203
 
206
 
204
    psr.value = psr_read();
207
    psr.value = psr_read();
205
    psr.cpl = PL_USER;
208
    psr.cpl = PL_USER;
206
    psr.i = true;           /* start with interrupts enabled */
209
    psr.i = true;           /* start with interrupts enabled */
207
    psr.ic = true;
210
    psr.ic = true;
208
    psr.ri = 0;         /* start with instruction #0 */
211
    psr.ri = 0;         /* start with instruction #0 */
209
    psr.bn = 1;         /* start in bank 0 */
212
    psr.bn = 1;         /* start in bank 0 */
210
 
213
 
211
    asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
214
    asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
212
    rsc.loadrs = 0;
215
    rsc.loadrs = 0;
213
    rsc.be = false;
216
    rsc.be = false;
214
    rsc.pl = PL_USER;
217
    rsc.pl = PL_USER;
215
    rsc.mode = 3;           /* eager mode */
218
    rsc.mode = 3;           /* eager mode */
216
 
219
 
217
    switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
220
    switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
218
        ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE -
221
        ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE -
219
        ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
222
        ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
220
        ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE,
223
        ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE,
221
        (uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value);
224
        (uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value);
222
 
225
 
223
    while (1)
226
    while (1)
224
        ;
227
        ;
225
}
228
}
226
 
229
 
227
/** Set thread-local-storage pointer.
230
/** Set thread-local-storage pointer.
228
 *
231
 *
229
 * We use r13 (a.k.a. tp) for this purpose.
232
 * We use r13 (a.k.a. tp) for this purpose.
230
 */
233
 */
231
unative_t sys_tls_set(unative_t addr)
234
unative_t sys_tls_set(unative_t addr)
232
{
235
{
233
        return 0;
236
        return 0;
234
}
237
}
235
 
238
 
236
/** Acquire console back for kernel
239
/** Acquire console back for kernel
237
 *
240
 *
238
 */
241
 */
239
void arch_grab_console(void)
242
void arch_grab_console(void)
240
{
243
{
241
#ifdef SKI
244
#ifdef SKI
242
    ski_kbd_grab();
245
    ski_kbd_grab();
243
#endif
246
#endif
244
}
247
}
245
 
248
 
246
/** Return console to userspace
249
/** Return console to userspace
247
 *
250
 *
248
 */
251
 */
249
void arch_release_console(void)
252
void arch_release_console(void)
250
{
253
{
251
#ifdef SKI
254
#ifdef SKI
252
    ski_kbd_release();
255
    ski_kbd_release();
253
#endif
256
#endif
254
}
257
}
255
 
258
 
256
void arch_reboot(void)
259
void arch_reboot(void)
257
{
260
{
258
    pio_write_8((ioport8_t *)0x64, 0xfe);
261
    pio_write_8((ioport8_t *)0x64, 0xfe);
259
    while (1)
262
    while (1)
260
        ;
263
        ;
261
}
264
}
262
 
265
 
263
/** Construct function pointer
266
/** Construct function pointer
264
 *
267
 *
265
 * @param fptr   function pointer structure
268
 * @param fptr   function pointer structure
266
 * @param addr   function address
269
 * @param addr   function address
267
 * @param caller calling function address
270
 * @param caller calling function address
268
 *
271
 *
269
 * @return address of the function pointer
272
 * @return address of the function pointer
270
 *
273
 *
271
 */
274
 */
272
void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
275
void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
273
{
276
{
274
    fptr->fnc = (unative_t) addr;
277
    fptr->fnc = (unative_t) addr;
275
    fptr->gp = ((unative_t *) caller)[1];
278
    fptr->gp = ((unative_t *) caller)[1];
276
   
279
   
277
    return (void *) fptr;
280
    return (void *) fptr;
278
}
281
}
279
 
282
 
280
/** @}
283
/** @}
281
 */
284
 */
282
 
285