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1 | /* |
1 | /* |
2 | * Copyright (c) 2005 Jakub Jermar |
2 | * Copyright (c) 2005 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup ia64 |
29 | /** @addtogroup ia64 |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | */ |
33 | */ |
34 | 34 | ||
35 | #include <arch.h> |
35 | #include <arch.h> |
36 | #include <arch/ski/ski.h> |
36 | #include <arch/ski/ski.h> |
37 | #include <arch/drivers/it.h> |
37 | #include <arch/drivers/it.h> |
38 | #include <arch/interrupt.h> |
38 | #include <arch/interrupt.h> |
39 | #include <arch/barrier.h> |
39 | #include <arch/barrier.h> |
40 | #include <arch/asm.h> |
40 | #include <arch/asm.h> |
41 | #include <arch/register.h> |
41 | #include <arch/register.h> |
42 | #include <arch/types.h> |
42 | #include <arch/types.h> |
43 | #include <arch/context.h> |
43 | #include <arch/context.h> |
44 | #include <arch/stack.h> |
44 | #include <arch/stack.h> |
45 | #include <arch/mm/page.h> |
45 | #include <arch/mm/page.h> |
46 | #include <mm/as.h> |
46 | #include <mm/as.h> |
47 | #include <config.h> |
47 | #include <config.h> |
48 | #include <userspace.h> |
48 | #include <userspace.h> |
49 | #include <console/console.h> |
49 | #include <console/console.h> |
50 | #include <proc/uarg.h> |
50 | #include <proc/uarg.h> |
51 | #include <syscall/syscall.h> |
51 | #include <syscall/syscall.h> |
52 | #include <ddi/irq.h> |
52 | #include <ddi/irq.h> |
53 | #include <ddi/device.h> |
53 | #include <ddi/device.h> |
54 | #include <arch/bootinfo.h> |
54 | #include <arch/bootinfo.h> |
55 | #include <genarch/drivers/legacy/ia32/io.h> |
55 | #include <genarch/drivers/legacy/ia32/io.h> |
56 | #include <genarch/drivers/ega/ega.h> |
56 | #include <genarch/drivers/ega/ega.h> |
57 | #include <genarch/kbd/i8042.h> |
57 | #include <genarch/kbd/i8042.h> |
58 | #include <genarch/kbd/ns16550.h> |
58 | #include <genarch/kbd/ns16550.h> |
59 | #include <smp/smp.h> |
59 | #include <smp/smp.h> |
60 | #include <smp/ipi.h> |
60 | #include <smp/ipi.h> |
61 | #include <arch/atomic.h> |
61 | #include <arch/atomic.h> |
62 | #include <panic.h> |
62 | #include <panic.h> |
63 | #include <print.h> |
63 | #include <print.h> |
64 | #include <sysinfo/sysinfo.h> |
64 | #include <sysinfo/sysinfo.h> |
65 | 65 | ||
66 | /* NS16550 as a COM 1 */ |
66 | /* NS16550 as a COM 1 */ |
67 | #define NS16550_IRQ (4 + LEGACY_INTERRUPT_BASE) |
67 | #define NS16550_IRQ (4 + LEGACY_INTERRUPT_BASE) |
68 | 68 | ||
69 | bootinfo_t *bootinfo; |
69 | bootinfo_t *bootinfo; |
70 | 70 | ||
71 | static uint64_t iosapic_base = 0xfec00000; |
71 | static uint64_t iosapic_base = 0xfec00000; |
72 | 72 | ||
73 | void arch_pre_main(void) |
73 | void arch_pre_main(void) |
74 | { |
74 | { |
75 | /* Setup usermode init tasks. */ |
75 | /* Setup usermode init tasks. */ |
76 | 76 | ||
77 | unsigned int i; |
77 | unsigned int i; |
78 | 78 | ||
79 | init.cnt = bootinfo->taskmap.count; |
79 | init.cnt = bootinfo->taskmap.count; |
80 | 80 | ||
81 | for (i = 0; i < init.cnt; i++) { |
81 | for (i = 0; i < init.cnt; i++) { |
82 | init.tasks[i].addr = |
82 | init.tasks[i].addr = |
83 | ((unsigned long) bootinfo->taskmap.tasks[i].addr) | |
83 | ((unsigned long) bootinfo->taskmap.tasks[i].addr) | |
84 | VRN_MASK; |
84 | VRN_MASK; |
85 | init.tasks[i].size = bootinfo->taskmap.tasks[i].size; |
85 | init.tasks[i].size = bootinfo->taskmap.tasks[i].size; |
86 | } |
86 | } |
87 | } |
87 | } |
88 | 88 | ||
89 | void arch_pre_mm_init(void) |
89 | void arch_pre_mm_init(void) |
90 | { |
90 | { |
91 | /* |
91 | /* |
92 | * Set Interruption Vector Address (i.e. location of interruption vector |
92 | * Set Interruption Vector Address (i.e. location of interruption vector |
93 | * table). |
93 | * table). |
94 | */ |
94 | */ |
95 | iva_write((uintptr_t) &ivt); |
95 | iva_write((uintptr_t) &ivt); |
96 | srlz_d(); |
96 | srlz_d(); |
97 | 97 | ||
98 | } |
98 | } |
99 | 99 | ||
100 | static void iosapic_init(void) |
100 | static void iosapic_init(void) |
101 | { |
101 | { |
102 | uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base)) | FW_OFFSET; |
102 | uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base)) | FW_OFFSET; |
103 | int i; |
103 | int i; |
104 | 104 | ||
105 | int myid, myeid; |
105 | int myid, myeid; |
106 | 106 | ||
107 | myid = ia64_get_cpu_id(); |
107 | myid = ia64_get_cpu_id(); |
108 | myeid = ia64_get_cpu_eid(); |
108 | myeid = ia64_get_cpu_eid(); |
109 | 109 | ||
110 | for (i = 0; i < 16; i++) { |
110 | for (i = 0; i < 16; i++) { |
111 | if (i == 2) |
111 | if (i == 2) |
112 | continue; /* Disable Cascade interrupt */ |
112 | continue; /* Disable Cascade interrupt */ |
113 | ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i; |
113 | ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i; |
114 | srlz_d(); |
114 | srlz_d(); |
115 | ((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i; |
115 | ((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i; |
116 | srlz_d(); |
116 | srlz_d(); |
117 | ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i + 1; |
117 | ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i + 1; |
118 | srlz_d(); |
118 | srlz_d(); |
119 | ((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) | |
119 | ((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) | |
120 | myeid << (48 - 32); |
120 | myeid << (48 - 32); |
121 | srlz_d(); |
121 | srlz_d(); |
122 | } |
122 | } |
123 | 123 | ||
124 | } |
124 | } |
125 | 125 | ||
126 | 126 | ||
127 | void arch_post_mm_init(void) |
127 | void arch_post_mm_init(void) |
128 | { |
128 | { |
129 | if (config.cpu_active == 1) { |
129 | if (config.cpu_active == 1) { |
130 | iosapic_init(); |
130 | iosapic_init(); |
131 | irq_init(INR_COUNT, INR_COUNT); |
131 | irq_init(INR_COUNT, INR_COUNT); |
132 | #ifdef SKI |
132 | #ifdef SKI |
133 | ski_init_console(); |
133 | ski_init_console(); |
134 | #else |
134 | #else |
135 | ega_init(EGA_BASE, EGA_VIDEORAM); |
135 | ega_init(EGA_BASE, EGA_VIDEORAM); |
136 | #endif |
136 | #endif |
137 | } |
137 | } |
138 | it_init(); |
138 | it_init(); |
139 | 139 | ||
140 | } |
140 | } |
141 | 141 | ||
142 | void arch_post_cpu_init(void) |
142 | void arch_post_cpu_init(void) |
143 | { |
143 | { |
144 | } |
144 | } |
145 | 145 | ||
146 | void arch_pre_smp_init(void) |
146 | void arch_pre_smp_init(void) |
147 | { |
147 | { |
148 | } |
148 | } |
149 | 149 | ||
150 | void arch_post_smp_init(void) |
150 | void arch_post_smp_init(void) |
151 | { |
151 | { |
152 | /* |
152 | /* |
153 | * Create thread that polls keyboard. |
153 | * Create thread that polls keyboard. |
154 | */ |
154 | */ |
155 | #ifdef SKI |
155 | #ifdef SKI |
156 | thread_t *t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true); |
156 | thread_t *t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true); |
157 | if (!t) |
157 | if (!t) |
158 | panic("Cannot create kkbdpoll."); |
158 | panic("Cannot create kkbdpoll."); |
159 | thread_ready(t); |
159 | thread_ready(t); |
160 | #endif |
160 | #endif |
161 | 161 | ||
162 | #ifdef I460GX |
162 | #ifdef I460GX |
163 | devno_t kbd = device_assign_devno(); |
163 | devno_t kbd = device_assign_devno(); |
164 | 164 | ||
165 | #ifdef CONFIG_NS16550 |
165 | #ifdef CONFIG_NS16550 |
166 | (void) ns16550_init((ns16550_t *)NS16550_BASE, kbd, NS16550_IRQ, NULL, |
166 | (void) ns16550_init((ns16550_t *)NS16550_BASE, kbd, NS16550_IRQ, NULL, |
167 | NULL); |
167 | NULL); |
168 | #else |
168 | #else |
169 | devno_t mouse = device_assign_devno(); |
- | |
170 | i8042_init(kbd, IRQ_KBD, mouse, IRQ_MOUSE); |
169 | (void) i8042_init((i8042_t *)I8042_BASE, kbd, IRQ_KBD); |
171 | #endif |
170 | #endif |
172 | #endif |
171 | #endif |
173 | 172 | ||
174 | sysinfo_set_item_val("ia64_iospace", NULL, true); |
173 | sysinfo_set_item_val("ia64_iospace", NULL, true); |
175 | sysinfo_set_item_val("ia64_iospace.address", NULL, true); |
174 | sysinfo_set_item_val("ia64_iospace.address", NULL, true); |
176 | sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET); |
175 | sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET); |
177 | } |
176 | } |
178 | 177 | ||
179 | 178 | ||
180 | /** Enter userspace and never return. */ |
179 | /** Enter userspace and never return. */ |
181 | void userspace(uspace_arg_t *kernel_uarg) |
180 | void userspace(uspace_arg_t *kernel_uarg) |
182 | { |
181 | { |
183 | psr_t psr; |
182 | psr_t psr; |
184 | rsc_t rsc; |
183 | rsc_t rsc; |
185 | 184 | ||
186 | psr.value = psr_read(); |
185 | psr.value = psr_read(); |
187 | psr.cpl = PL_USER; |
186 | psr.cpl = PL_USER; |
188 | psr.i = true; /* start with interrupts enabled */ |
187 | psr.i = true; /* start with interrupts enabled */ |
189 | psr.ic = true; |
188 | psr.ic = true; |
190 | psr.ri = 0; /* start with instruction #0 */ |
189 | psr.ri = 0; /* start with instruction #0 */ |
191 | psr.bn = 1; /* start in bank 0 */ |
190 | psr.bn = 1; /* start in bank 0 */ |
192 | 191 | ||
193 | asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value)); |
192 | asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value)); |
194 | rsc.loadrs = 0; |
193 | rsc.loadrs = 0; |
195 | rsc.be = false; |
194 | rsc.be = false; |
196 | rsc.pl = PL_USER; |
195 | rsc.pl = PL_USER; |
197 | rsc.mode = 3; /* eager mode */ |
196 | rsc.mode = 3; /* eager mode */ |
198 | 197 | ||
199 | switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry, |
198 | switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry, |
200 | ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE - |
199 | ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE - |
201 | ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT), |
200 | ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT), |
202 | ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE, |
201 | ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE, |
203 | (uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value); |
202 | (uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value); |
204 | 203 | ||
205 | while (1) |
204 | while (1) |
206 | ; |
205 | ; |
207 | } |
206 | } |
208 | 207 | ||
209 | /** Set thread-local-storage pointer. |
208 | /** Set thread-local-storage pointer. |
210 | * |
209 | * |
211 | * We use r13 (a.k.a. tp) for this purpose. |
210 | * We use r13 (a.k.a. tp) for this purpose. |
212 | */ |
211 | */ |
213 | unative_t sys_tls_set(unative_t addr) |
212 | unative_t sys_tls_set(unative_t addr) |
214 | { |
213 | { |
215 | return 0; |
214 | return 0; |
216 | } |
215 | } |
217 | 216 | ||
218 | /** Acquire console back for kernel |
217 | /** Acquire console back for kernel |
219 | * |
218 | * |
220 | */ |
219 | */ |
221 | void arch_grab_console(void) |
220 | void arch_grab_console(void) |
222 | { |
221 | { |
223 | #ifdef SKI |
222 | #ifdef SKI |
224 | ski_kbd_grab(); |
223 | ski_kbd_grab(); |
225 | #else |
- | |
226 | #ifdef CONFIG_NS16550 |
- | |
227 | ns16550_grab(); |
- | |
228 | #else |
- | |
229 | i8042_grab(); |
- | |
230 | #endif |
- | |
231 | #endif |
224 | #endif |
232 | } |
225 | } |
233 | 226 | ||
234 | /** Return console to userspace |
227 | /** Return console to userspace |
235 | * |
228 | * |
236 | */ |
229 | */ |
237 | void arch_release_console(void) |
230 | void arch_release_console(void) |
238 | { |
231 | { |
239 | #ifdef SKI |
232 | #ifdef SKI |
240 | ski_kbd_release(); |
233 | ski_kbd_release(); |
241 | #else |
- | |
242 | #ifdef CONFIG_NS16550 |
- | |
243 | ns16550_release(); |
- | |
244 | #else |
- | |
245 | i8042_release(); |
- | |
246 | #endif |
- | |
247 | #endif |
234 | #endif |
248 | } |
235 | } |
249 | 236 | ||
250 | void arch_reboot(void) |
237 | void arch_reboot(void) |
251 | { |
238 | { |
252 | pio_write_8((ioport8_t *)0x64, 0xfe); |
239 | pio_write_8((ioport8_t *)0x64, 0xfe); |
253 | while (1) |
240 | while (1) |
254 | ; |
241 | ; |
255 | } |
242 | } |
256 | 243 | ||
257 | /** Construct function pointer |
244 | /** Construct function pointer |
258 | * |
245 | * |
259 | * @param fptr function pointer structure |
246 | * @param fptr function pointer structure |
260 | * @param addr function address |
247 | * @param addr function address |
261 | * @param caller calling function address |
248 | * @param caller calling function address |
262 | * |
249 | * |
263 | * @return address of the function pointer |
250 | * @return address of the function pointer |
264 | * |
251 | * |
265 | */ |
252 | */ |
266 | void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller) |
253 | void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller) |
267 | { |
254 | { |
268 | fptr->fnc = (unative_t) addr; |
255 | fptr->fnc = (unative_t) addr; |
269 | fptr->gp = ((unative_t *) caller)[1]; |
256 | fptr->gp = ((unative_t *) caller)[1]; |
270 | 257 | ||
271 | return (void *) fptr; |
258 | return (void *) fptr; |
272 | } |
259 | } |
273 | 260 | ||
274 | /** @} |
261 | /** @} |
275 | */ |
262 | */ |
276 | 263 |