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1 | /* |
1 | /* |
2 | * Copyright (c) 2005 Jakub Jermar |
2 | * Copyright (c) 2005 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup ia64 |
29 | /** @addtogroup ia64 |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | */ |
33 | */ |
34 | 34 | ||
35 | #include <arch.h> |
35 | #include <arch.h> |
36 | #include <arch/ski/ski.h> |
36 | #include <arch/ski/ski.h> |
37 | #include <arch/drivers/it.h> |
37 | #include <arch/drivers/it.h> |
38 | #include <arch/interrupt.h> |
38 | #include <arch/interrupt.h> |
39 | #include <arch/barrier.h> |
39 | #include <arch/barrier.h> |
40 | #include <arch/asm.h> |
40 | #include <arch/asm.h> |
41 | #include <arch/register.h> |
41 | #include <arch/register.h> |
42 | #include <arch/types.h> |
42 | #include <arch/types.h> |
43 | #include <arch/context.h> |
43 | #include <arch/context.h> |
44 | #include <arch/stack.h> |
44 | #include <arch/stack.h> |
45 | #include <arch/mm/page.h> |
45 | #include <arch/mm/page.h> |
46 | #include <mm/as.h> |
46 | #include <mm/as.h> |
47 | #include <config.h> |
47 | #include <config.h> |
48 | #include <userspace.h> |
48 | #include <userspace.h> |
49 | #include <console/console.h> |
49 | #include <console/console.h> |
50 | #include <proc/uarg.h> |
50 | #include <proc/uarg.h> |
51 | #include <syscall/syscall.h> |
51 | #include <syscall/syscall.h> |
52 | #include <ddi/irq.h> |
52 | #include <ddi/irq.h> |
53 | #include <ddi/device.h> |
53 | #include <ddi/device.h> |
54 | #include <arch/bootinfo.h> |
54 | #include <arch/bootinfo.h> |
55 | #include <arch/drivers/ega.h> |
55 | #include <genarch/drivers/legacy/ia32/io.h> |
56 | #include <genarch/drivers/ega/ega.h> |
56 | #include <genarch/drivers/ega/ega.h> |
57 | #include <genarch/kbd/i8042.h> |
57 | #include <genarch/kbd/i8042.h> |
58 | #include <genarch/kbd/ns16550.h> |
58 | #include <genarch/kbd/ns16550.h> |
59 | #include <smp/smp.h> |
59 | #include <smp/smp.h> |
60 | #include <smp/ipi.h> |
60 | #include <smp/ipi.h> |
61 | #include <arch/atomic.h> |
61 | #include <arch/atomic.h> |
62 | #include <panic.h> |
62 | #include <panic.h> |
63 | #include <print.h> |
63 | #include <print.h> |
64 | #include <sysinfo/sysinfo.h> |
64 | #include <sysinfo/sysinfo.h> |
65 | 65 | ||
66 | /* NS16550 as a COM 1 */ |
66 | /* NS16550 as a COM 1 */ |
67 | #define NS16550_IRQ (4 + LEGACY_INTERRUPT_BASE) |
67 | #define NS16550_IRQ (4 + LEGACY_INTERRUPT_BASE) |
68 | #define NS16550_PORT 0x3f8 |
68 | #define NS16550_PORT 0x3f8 |
69 | 69 | ||
70 | bootinfo_t *bootinfo; |
70 | bootinfo_t *bootinfo; |
71 | 71 | ||
72 | static uint64_t iosapic_base = 0xfec00000; |
72 | static uint64_t iosapic_base = 0xfec00000; |
73 | 73 | ||
74 | void arch_pre_main(void) |
74 | void arch_pre_main(void) |
75 | { |
75 | { |
76 | /* Setup usermode init tasks. */ |
76 | /* Setup usermode init tasks. */ |
77 | 77 | ||
78 | unsigned int i; |
78 | unsigned int i; |
79 | 79 | ||
80 | init.cnt = bootinfo->taskmap.count; |
80 | init.cnt = bootinfo->taskmap.count; |
81 | 81 | ||
82 | for (i = 0; i < init.cnt; i++) { |
82 | for (i = 0; i < init.cnt; i++) { |
83 | init.tasks[i].addr = |
83 | init.tasks[i].addr = |
84 | ((unsigned long) bootinfo->taskmap.tasks[i].addr) | |
84 | ((unsigned long) bootinfo->taskmap.tasks[i].addr) | |
85 | VRN_MASK; |
85 | VRN_MASK; |
86 | init.tasks[i].size = bootinfo->taskmap.tasks[i].size; |
86 | init.tasks[i].size = bootinfo->taskmap.tasks[i].size; |
87 | } |
87 | } |
88 | } |
88 | } |
89 | 89 | ||
90 | void arch_pre_mm_init(void) |
90 | void arch_pre_mm_init(void) |
91 | { |
91 | { |
92 | /* |
92 | /* |
93 | * Set Interruption Vector Address (i.e. location of interruption vector |
93 | * Set Interruption Vector Address (i.e. location of interruption vector |
94 | * table). |
94 | * table). |
95 | */ |
95 | */ |
96 | iva_write((uintptr_t) &ivt); |
96 | iva_write((uintptr_t) &ivt); |
97 | srlz_d(); |
97 | srlz_d(); |
98 | 98 | ||
99 | } |
99 | } |
100 | 100 | ||
101 | static void iosapic_init(void) |
101 | static void iosapic_init(void) |
102 | { |
102 | { |
103 | uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base)) | FW_OFFSET; |
103 | uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base)) | FW_OFFSET; |
104 | int i; |
104 | int i; |
105 | 105 | ||
106 | int myid, myeid; |
106 | int myid, myeid; |
107 | 107 | ||
108 | myid = ia64_get_cpu_id(); |
108 | myid = ia64_get_cpu_id(); |
109 | myeid = ia64_get_cpu_eid(); |
109 | myeid = ia64_get_cpu_eid(); |
110 | 110 | ||
111 | for (i = 0; i < 16; i++) { |
111 | for (i = 0; i < 16; i++) { |
112 | if (i == 2) |
112 | if (i == 2) |
113 | continue; /* Disable Cascade interrupt */ |
113 | continue; /* Disable Cascade interrupt */ |
114 | ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i; |
114 | ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i; |
115 | srlz_d(); |
115 | srlz_d(); |
116 | ((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i; |
116 | ((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i; |
117 | srlz_d(); |
117 | srlz_d(); |
118 | ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i + 1; |
118 | ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i + 1; |
119 | srlz_d(); |
119 | srlz_d(); |
120 | ((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) | |
120 | ((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) | |
121 | myeid << (48 - 32); |
121 | myeid << (48 - 32); |
122 | srlz_d(); |
122 | srlz_d(); |
123 | } |
123 | } |
124 | 124 | ||
125 | } |
125 | } |
126 | 126 | ||
127 | 127 | ||
128 | void arch_post_mm_init(void) |
128 | void arch_post_mm_init(void) |
129 | { |
129 | { |
130 | if (config.cpu_active == 1) { |
130 | if (config.cpu_active == 1) { |
131 | iosapic_init(); |
131 | iosapic_init(); |
132 | irq_init(INR_COUNT, INR_COUNT); |
132 | irq_init(INR_COUNT, INR_COUNT); |
133 | #ifdef SKI |
133 | #ifdef SKI |
134 | ski_init_console(); |
134 | ski_init_console(); |
135 | #else |
135 | #else |
136 | ega_init(EGA_BASE, EGA_VIDEORAM); |
136 | ega_init(EGA_BASE, EGA_VIDEORAM); |
137 | #endif |
137 | #endif |
138 | } |
138 | } |
139 | it_init(); |
139 | it_init(); |
140 | 140 | ||
141 | } |
141 | } |
142 | 142 | ||
143 | void arch_post_cpu_init(void) |
143 | void arch_post_cpu_init(void) |
144 | { |
144 | { |
145 | } |
145 | } |
146 | 146 | ||
147 | void arch_pre_smp_init(void) |
147 | void arch_pre_smp_init(void) |
148 | { |
148 | { |
149 | } |
149 | } |
150 | 150 | ||
151 | void arch_post_smp_init(void) |
151 | void arch_post_smp_init(void) |
152 | { |
152 | { |
153 | /* |
153 | /* |
154 | * Create thread that polls keyboard. |
154 | * Create thread that polls keyboard. |
155 | */ |
155 | */ |
156 | #ifdef SKI |
156 | #ifdef SKI |
157 | thread_t *t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true); |
157 | thread_t *t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true); |
158 | if (!t) |
158 | if (!t) |
159 | panic("Cannot create kkbdpoll."); |
159 | panic("Cannot create kkbdpoll."); |
160 | thread_ready(t); |
160 | thread_ready(t); |
161 | #endif |
161 | #endif |
162 | 162 | ||
163 | #ifdef I460GX |
163 | #ifdef I460GX |
164 | devno_t kbd = device_assign_devno(); |
164 | devno_t kbd = device_assign_devno(); |
165 | 165 | ||
166 | #ifdef CONFIG_NS16550 |
166 | #ifdef CONFIG_NS16550 |
167 | ns16550_init(kbd, NS16550_PORT, NS16550_IRQ, NULL, NULL); |
167 | ns16550_init(kbd, NS16550_PORT, NS16550_IRQ, NULL, NULL); |
168 | #else |
168 | #else |
169 | devno_t mouse = device_assign_devno(); |
169 | devno_t mouse = device_assign_devno(); |
170 | i8042_init(kbd, IRQ_KBD, mouse, IRQ_MOUSE); |
170 | i8042_init(kbd, IRQ_KBD, mouse, IRQ_MOUSE); |
171 | #endif |
171 | #endif |
172 | #endif |
172 | #endif |
173 | 173 | ||
174 | sysinfo_set_item_val("ia64_iospace", NULL, true); |
174 | sysinfo_set_item_val("ia64_iospace", NULL, true); |
175 | sysinfo_set_item_val("ia64_iospace.address", NULL, true); |
175 | sysinfo_set_item_val("ia64_iospace.address", NULL, true); |
176 | sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET); |
176 | sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET); |
177 | } |
177 | } |
178 | 178 | ||
179 | 179 | ||
180 | /** Enter userspace and never return. */ |
180 | /** Enter userspace and never return. */ |
181 | void userspace(uspace_arg_t *kernel_uarg) |
181 | void userspace(uspace_arg_t *kernel_uarg) |
182 | { |
182 | { |
183 | psr_t psr; |
183 | psr_t psr; |
184 | rsc_t rsc; |
184 | rsc_t rsc; |
185 | 185 | ||
186 | psr.value = psr_read(); |
186 | psr.value = psr_read(); |
187 | psr.cpl = PL_USER; |
187 | psr.cpl = PL_USER; |
188 | psr.i = true; /* start with interrupts enabled */ |
188 | psr.i = true; /* start with interrupts enabled */ |
189 | psr.ic = true; |
189 | psr.ic = true; |
190 | psr.ri = 0; /* start with instruction #0 */ |
190 | psr.ri = 0; /* start with instruction #0 */ |
191 | psr.bn = 1; /* start in bank 0 */ |
191 | psr.bn = 1; /* start in bank 0 */ |
192 | 192 | ||
193 | asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value)); |
193 | asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value)); |
194 | rsc.loadrs = 0; |
194 | rsc.loadrs = 0; |
195 | rsc.be = false; |
195 | rsc.be = false; |
196 | rsc.pl = PL_USER; |
196 | rsc.pl = PL_USER; |
197 | rsc.mode = 3; /* eager mode */ |
197 | rsc.mode = 3; /* eager mode */ |
198 | 198 | ||
199 | switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry, |
199 | switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry, |
200 | ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE - |
200 | ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE - |
201 | ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT), |
201 | ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT), |
202 | ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE, |
202 | ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE, |
203 | (uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value); |
203 | (uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value); |
204 | 204 | ||
205 | while (1) |
205 | while (1) |
206 | ; |
206 | ; |
207 | } |
207 | } |
208 | 208 | ||
209 | /** Set thread-local-storage pointer. |
209 | /** Set thread-local-storage pointer. |
210 | * |
210 | * |
211 | * We use r13 (a.k.a. tp) for this purpose. |
211 | * We use r13 (a.k.a. tp) for this purpose. |
212 | */ |
212 | */ |
213 | unative_t sys_tls_set(unative_t addr) |
213 | unative_t sys_tls_set(unative_t addr) |
214 | { |
214 | { |
215 | return 0; |
215 | return 0; |
216 | } |
216 | } |
217 | 217 | ||
218 | /** Acquire console back for kernel |
218 | /** Acquire console back for kernel |
219 | * |
219 | * |
220 | */ |
220 | */ |
221 | void arch_grab_console(void) |
221 | void arch_grab_console(void) |
222 | { |
222 | { |
223 | #ifdef SKI |
223 | #ifdef SKI |
224 | ski_kbd_grab(); |
224 | ski_kbd_grab(); |
225 | #else |
225 | #else |
226 | #ifdef CONFIG_NS16550 |
226 | #ifdef CONFIG_NS16550 |
227 | ns16550_grab(); |
227 | ns16550_grab(); |
228 | #else |
228 | #else |
229 | i8042_grab(); |
229 | i8042_grab(); |
230 | #endif |
230 | #endif |
231 | #endif |
231 | #endif |
232 | } |
232 | } |
233 | 233 | ||
234 | /** Return console to userspace |
234 | /** Return console to userspace |
235 | * |
235 | * |
236 | */ |
236 | */ |
237 | void arch_release_console(void) |
237 | void arch_release_console(void) |
238 | { |
238 | { |
239 | #ifdef SKI |
239 | #ifdef SKI |
240 | ski_kbd_release(); |
240 | ski_kbd_release(); |
241 | #else |
241 | #else |
242 | #ifdef CONFIG_NS16550 |
242 | #ifdef CONFIG_NS16550 |
243 | ns16550_release(); |
243 | ns16550_release(); |
244 | #else |
244 | #else |
245 | i8042_release(); |
245 | i8042_release(); |
246 | #endif |
246 | #endif |
247 | #endif |
247 | #endif |
248 | } |
248 | } |
249 | 249 | ||
250 | void arch_reboot(void) |
250 | void arch_reboot(void) |
251 | { |
251 | { |
252 | pio_write_8(0x64, 0xfe); |
252 | pio_write_8(0x64, 0xfe); |
253 | while (1) |
253 | while (1) |
254 | ; |
254 | ; |
255 | } |
255 | } |
256 | 256 | ||
257 | /** Construct function pointer |
257 | /** Construct function pointer |
258 | * |
258 | * |
259 | * @param fptr function pointer structure |
259 | * @param fptr function pointer structure |
260 | * @param addr function address |
260 | * @param addr function address |
261 | * @param caller calling function address |
261 | * @param caller calling function address |
262 | * |
262 | * |
263 | * @return address of the function pointer |
263 | * @return address of the function pointer |
264 | * |
264 | * |
265 | */ |
265 | */ |
266 | void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller) |
266 | void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller) |
267 | { |
267 | { |
268 | fptr->fnc = (unative_t) addr; |
268 | fptr->fnc = (unative_t) addr; |
269 | fptr->gp = ((unative_t *) caller)[1]; |
269 | fptr->gp = ((unative_t *) caller)[1]; |
270 | 270 | ||
271 | return (void *) fptr; |
271 | return (void *) fptr; |
272 | } |
272 | } |
273 | 273 | ||
274 | /** @} |
274 | /** @} |
275 | */ |
275 | */ |
276 | 276 |