WebSVN – HelenOS – Diff – /trunk/kernel/arch/ia64/src/ia64.c


/*
 * Copyright (c) 2005 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup ia64
 * @{
 */
/** @file
 */
 
#include <arch.h>
#include <arch/ski/ski.h>
#include <arch/drivers/it.h>
#include <arch/interrupt.h>
#include <arch/barrier.h>
#include <arch/asm.h>
#include <arch/register.h>
#include <arch/types.h>
#include <arch/context.h>
#include <arch/stack.h>
#include <arch/mm/page.h>
#include <mm/as.h>
#include <config.h>
#include <userspace.h>
#include <console/console.h>
#include <proc/uarg.h>
#include <syscall/syscall.h>
#include <ddi/irq.h>
#include <ddi/device.h>
#include <arch/bootinfo.h>
#include <genarch/drivers/legacy/ia32/io.h>
#include <genarch/drivers/ega/ega.h>
#include <genarch/kbd/i8042.h>
#include <genarch/kbd/ns16550.h>
#include <smp/smp.h>
#include <smp/ipi.h>
#include <arch/atomic.h>
#include <panic.h>
#include <print.h>
#include <sysinfo/sysinfo.h>
 
/* NS16550 as a COM 1 */
#define NS16550_IRQ (4 + LEGACY_INTERRUPT_BASE)
 
bootinfo_t *bootinfo;
 
static uint64_t iosapic_base = 0xfec00000;
 
/** Performs ia64-specific initialization before main_bsp() is called. */
void arch_pre_main(void)
{
    /* Setup usermode init tasks. */
 
    unsigned int i;
   
    init.cnt = bootinfo->taskmap.count;
   
    for (i = 0; i < init.cnt; i++) {
        init.tasks[i].addr =
            ((unsigned long) bootinfo->taskmap.tasks[i].addr) |
            VRN_MASK;
        init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
    }
}
 
void arch_pre_mm_init(void)
{
    /*
     * Set Interruption Vector Address (i.e. location of interruption vector
     * table).
     */
    iva_write((uintptr_t) &ivt);
    srlz_d();
   
}
 
static void iosapic_init(void)
{
    uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base)) | FW_OFFSET;
    int i;
   
    int myid, myeid;
   
    myid = ia64_get_cpu_id();
    myeid = ia64_get_cpu_eid();
 
    for (i = 0; i < 16; i++) {
        if (i == 2)
            continue;    /* Disable Cascade interrupt */
        ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i;
        srlz_d();
        ((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i;
        srlz_d();
        ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i + 1;
        srlz_d();
        ((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) |
            myeid << (48 - 32);
        srlz_d();
    }
 
}
 
 
void arch_post_mm_init(void)
{
    if (config.cpu_active == 1) {
        iosapic_init();
        irq_init(INR_COUNT, INR_COUNT);
#ifdef SKI
        ski_init_console();
#else
        ega_init(EGA_BASE, EGA_VIDEORAM);
#endif
    }
    it_init();
       
}
 
void arch_post_cpu_init(void)
{
}
 
void arch_pre_smp_init(void)
{
}
 
void arch_post_smp_init(void)
{
    /*
     * Create thread that polls keyboard.
     */
#ifdef SKI
    thread_t *t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
    if (!t)
        panic("Cannot create kkbdpoll.");
    thread_ready(t);
#endif      
 
#ifdef I460GX
    devno_t devno = device_assign_devno();
    inr_t inr;
 
#ifdef CONFIG_NS16550
    inr = NS16550_IRQ;
    (void) ns16550_init((ns16550_t *)NS16550_BASE, devno, inr, NULL, NULL);
    sysinfo_set_item_val("kbd.type", NULL, KBD_NS16550);
    sysinfo_set_item_val("kbd.address.physical", NULL,
        (uintptr_t) NS16550_BASE);
    sysinfo_set_item_val("kbd.address.kernel", NULL,
        (uintptr_t) NS16550_BASE);
#else
    inr = IRQ_KBD;
    (void) i8042_init((i8042_t *)I8042_BASE, devno, inr);
    sysinfo_set_item_val("kbd.type", NULL, KBD_LEGACY);
    sysinfo_set_item_val("kbd.address.physical", NULL,
        (uintptr_t) I8042_BASE);
    sysinfo_set_item_val("kbd.address.kernel", NULL,
        (uintptr_t) I8042_BASE);
#endif
    sysinfo_set_item_val("kbd", NULL, true);
    sysinfo_set_item_val("kbd.devno", NULL, devno);
    sysinfo_set_item_val("kbd.inr", NULL, inr);
#endif
 
    sysinfo_set_item_val("ia64_iospace", NULL, true);
    sysinfo_set_item_val("ia64_iospace.address", NULL, true);
    sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET);
}
 
 
/** Enter userspace and never return. */
void userspace(uspace_arg_t *kernel_uarg)
{
    psr_t psr;
    rsc_t rsc;
 
    psr.value = psr_read();
    psr.cpl = PL_USER;
    psr.i = true;           /* start with interrupts enabled */
    psr.ic = true;
    psr.ri = 0;         /* start with instruction #0 */
    psr.bn = 1;         /* start in bank 0 */
 
    asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
    rsc.loadrs = 0;
    rsc.be = false;
    rsc.pl = PL_USER;
    rsc.mode = 3;           /* eager mode */
 
    switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
        ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE -
        ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
        ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE,
        (uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value);
 
    while (1)
        ;
}
 
/** Set thread-local-storage pointer.
 *
 * We use r13 (a.k.a. tp) for this purpose.
 */
unative_t sys_tls_set(unative_t addr)
{
        return 0;
}
 
/** Acquire console back for kernel
 *
 */
void arch_grab_console(void)
{
#ifdef SKI
    ski_kbd_grab();
#endif
}
 
/** Return console to userspace
 *
 */
void arch_release_console(void)
{
#ifdef SKI
    ski_kbd_release();
#endif
}
 
void arch_reboot(void)
{
    pio_write_8((ioport8_t *)0x64, 0xfe);
    while (1)
        ;
}
 
/** Construct function pointer
 *
 * @param fptr   function pointer structure
 * @param addr   function address
 * @param caller calling function address
 *
 * @return address of the function pointer
 *
 */
void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
{
    fptr->fnc = (unative_t) addr;
    fptr->gp = ((unative_t *) caller)[1];
   
    return (void *) fptr;
}
 
/** @}
 */
 

Rev 4023	Rev 4026
1	/*	1	/*
2	* Copyright (c) 2005 Jakub Jermar	2	* Copyright (c) 2005 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup ia64	29	/** @addtogroup ia64
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35	#include <arch.h>	35	#include <arch.h>
36	#include <arch/ski/ski.h>	36	#include <arch/ski/ski.h>
37	#include <arch/drivers/it.h>	37	#include <arch/drivers/it.h>
38	#include <arch/interrupt.h>	38	#include <arch/interrupt.h>
39	#include <arch/barrier.h>	39	#include <arch/barrier.h>
40	#include <arch/asm.h>	40	#include <arch/asm.h>
41	#include <arch/register.h>	41	#include <arch/register.h>
42	#include <arch/types.h>	42	#include <arch/types.h>
43	#include <arch/context.h>	43	#include <arch/context.h>
44	#include <arch/stack.h>	44	#include <arch/stack.h>
45	#include <arch/mm/page.h>	45	#include <arch/mm/page.h>
46	#include <mm/as.h>	46	#include <mm/as.h>
47	#include <config.h>	47	#include <config.h>
48	#include <userspace.h>	48	#include <userspace.h>
49	#include <console/console.h>	49	#include <console/console.h>
50	#include <proc/uarg.h>	50	#include <proc/uarg.h>
51	#include <syscall/syscall.h>	51	#include <syscall/syscall.h>
52	#include <ddi/irq.h>	52	#include <ddi/irq.h>
53	#include <ddi/device.h>	53	#include <ddi/device.h>
54	#include <arch/bootinfo.h>	54	#include <arch/bootinfo.h>
55	#include <genarch/drivers/legacy/ia32/io.h>	55	#include <genarch/drivers/legacy/ia32/io.h>
56	#include <genarch/drivers/ega/ega.h>	56	#include <genarch/drivers/ega/ega.h>
57	#include <genarch/kbd/i8042.h>	57	#include <genarch/kbd/i8042.h>
58	#include <genarch/kbd/ns16550.h>	58	#include <genarch/kbd/ns16550.h>
59	#include <smp/smp.h>	59	#include <smp/smp.h>
60	#include <smp/ipi.h>	60	#include <smp/ipi.h>
61	#include <arch/atomic.h>	61	#include <arch/atomic.h>
62	#include <panic.h>	62	#include <panic.h>
63	#include <print.h>	63	#include <print.h>
64	#include <sysinfo/sysinfo.h>	64	#include <sysinfo/sysinfo.h>
65		65
66	/* NS16550 as a COM 1 */	66	/* NS16550 as a COM 1 */
67	#define NS16550_IRQ (4 + LEGACY_INTERRUPT_BASE)	67	#define NS16550_IRQ (4 + LEGACY_INTERRUPT_BASE)
68		68
69	bootinfo_t *bootinfo;	69	bootinfo_t *bootinfo;
70		70
71	static uint64_t iosapic_base = 0xfec00000;	71	static uint64_t iosapic_base = 0xfec00000;
72		72
73	/** Performs ia64-specific initialization before main_bsp() is called. */	73	/** Performs ia64-specific initialization before main_bsp() is called. */
74	void arch_pre_main(void)	74	void arch_pre_main(void)
75	{	75	{
76	/* Setup usermode init tasks. */	76	/* Setup usermode init tasks. */
77		77
78	unsigned int i;	78	unsigned int i;
79		79
80	init.cnt = bootinfo->taskmap.count;	80	init.cnt = bootinfo->taskmap.count;
81		81
82	for (i = 0; i < init.cnt; i++) {	82	for (i = 0; i < init.cnt; i++) {
83	init.tasks[i].addr =	83	init.tasks[i].addr =
84	((unsigned long) bootinfo->taskmap.tasks[i].addr) \|	84	((unsigned long) bootinfo->taskmap.tasks[i].addr) \|
85	VRN_MASK;	85	VRN_MASK;
86	init.tasks[i].size = bootinfo->taskmap.tasks[i].size;	86	init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
87	}	87	}
88	}	88	}
89		89
90	void arch_pre_mm_init(void)	90	void arch_pre_mm_init(void)
91	{	91	{
92	/*	92	/*
93	* Set Interruption Vector Address (i.e. location of interruption vector	93	* Set Interruption Vector Address (i.e. location of interruption vector
94	* table).	94	* table).
95	*/	95	*/
96	iva_write((uintptr_t) &ivt);	96	iva_write((uintptr_t) &ivt);
97	srlz_d();	97	srlz_d();
98		98
99	}	99	}
100		100
101	static void iosapic_init(void)	101	static void iosapic_init(void)
102	{	102	{
103	uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base)) \| FW_OFFSET;	103	uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base)) \| FW_OFFSET;
104	int i;	104	int i;
105		105
106	int myid, myeid;	106	int myid, myeid;
107		107
108	myid = ia64_get_cpu_id();	108	myid = ia64_get_cpu_id();
109	myeid = ia64_get_cpu_eid();	109	myeid = ia64_get_cpu_eid();
110		110
111	for (i = 0; i < 16; i++) {	111	for (i = 0; i < 16; i++) {
112	if (i == 2)	112	if (i == 2)
113	continue; /* Disable Cascade interrupt */	113	continue; /* Disable Cascade interrupt */
114	((uint32_t )(IOSAPIC + 0x00))[0] = 0x10 + 2 i;	114	((uint32_t )(IOSAPIC + 0x00))[0] = 0x10 + 2 i;
115	srlz_d();	115	srlz_d();
116	((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i;	116	((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i;
117	srlz_d();	117	srlz_d();
118	((uint32_t )(IOSAPIC + 0x00))[0] = 0x10 + 2 i + 1;	118	((uint32_t )(IOSAPIC + 0x00))[0] = 0x10 + 2 i + 1;
119	srlz_d();	119	srlz_d();
120	((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) \|	120	((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) \|
121	myeid << (48 - 32);	121	myeid << (48 - 32);
122	srlz_d();	122	srlz_d();
123	}	123	}
124		124
125	}	125	}
126		126
127		127
128	void arch_post_mm_init(void)	128	void arch_post_mm_init(void)
129	{	129	{
130	if (config.cpu_active == 1) {	130	if (config.cpu_active == 1) {
131	iosapic_init();	131	iosapic_init();
132	irq_init(INR_COUNT, INR_COUNT);	132	irq_init(INR_COUNT, INR_COUNT);
133	#ifdef SKI	133	#ifdef SKI
134	ski_init_console();	134	ski_init_console();
135	#else	135	#else
136	ega_init(EGA_BASE, EGA_VIDEORAM);	136	ega_init(EGA_BASE, EGA_VIDEORAM);
137	#endif	137	#endif
138	}	138	}
139	it_init();	139	it_init();
140		140
141	}	141	}
142		142
143	void arch_post_cpu_init(void)	143	void arch_post_cpu_init(void)
144	{	144	{
145	}	145	}
146		146
147	void arch_pre_smp_init(void)	147	void arch_pre_smp_init(void)
148	{	148	{
149	}	149	}
150		150
151	void arch_post_smp_init(void)	151	void arch_post_smp_init(void)
152	{	152	{
153	/*	153	/*
154	* Create thread that polls keyboard.	154	* Create thread that polls keyboard.
155	*/	155	*/
156	#ifdef SKI	156	#ifdef SKI
157	thread_t *t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);	157	thread_t *t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
158	if (!t)	158	if (!t)
159	panic("Cannot create kkbdpoll.");	159	panic("Cannot create kkbdpoll.");
160	thread_ready(t);	160	thread_ready(t);
161	#endif	161	#endif
162		162
163	#ifdef I460GX	163	#ifdef I460GX
164	devno_t devno = device_assign_devno();	164	devno_t devno = device_assign_devno();
165	inr_t inr;	165	inr_t inr;
166		166
167	#ifdef CONFIG_NS16550	167	#ifdef CONFIG_NS16550
168	inr = NS16550_IRQ;	168	inr = NS16550_IRQ;
169	(void) ns16550_init((ns16550_t *)NS16550_BASE, devno, inr, NULL, NULL);	169	(void) ns16550_init((ns16550_t *)NS16550_BASE, devno, inr, NULL, NULL);
170	sysinfo_set_item_val("kbd.type", NULL, KBD_NS16550);	170	sysinfo_set_item_val("kbd.type", NULL, KBD_NS16550);
171	sysinfo_set_item_val("kbd.port", NULL, (uintptr_t)NS16550_BASE);	171	sysinfo_set_item_val("kbd.address.physical", NULL,
-		172	(uintptr_t) NS16550_BASE);
-		173	sysinfo_set_item_val("kbd.address.kernel", NULL,
-		174	(uintptr_t) NS16550_BASE);
172	#else	175	#else
173	inr = IRQ_KBD;	176	inr = IRQ_KBD;
174	(void) i8042_init((i8042_t *)I8042_BASE, devno, inr);	177	(void) i8042_init((i8042_t *)I8042_BASE, devno, inr);
175	sysinfo_set_item_val("kbd.type", NULL, KBD_LEGACY);	178	sysinfo_set_item_val("kbd.type", NULL, KBD_LEGACY);
-		179	sysinfo_set_item_val("kbd.address.physical", NULL,
-		180	(uintptr_t) I8042_BASE);
-		181	sysinfo_set_item_val("kbd.address.kernel", NULL,
-		182	(uintptr_t) I8042_BASE);
176	#endif	183	#endif
177	sysinfo_set_item_val("kbd", NULL, true);	184	sysinfo_set_item_val("kbd", NULL, true);
178	sysinfo_set_item_val("kbd.devno", NULL, devno);	185	sysinfo_set_item_val("kbd.devno", NULL, devno);
179	sysinfo_set_item_val("kbd.inr", NULL, inr);	186	sysinfo_set_item_val("kbd.inr", NULL, inr);
180	#endif	187	#endif
181		188
182	sysinfo_set_item_val("ia64_iospace", NULL, true);	189	sysinfo_set_item_val("ia64_iospace", NULL, true);
183	sysinfo_set_item_val("ia64_iospace.address", NULL, true);	190	sysinfo_set_item_val("ia64_iospace.address", NULL, true);
184	sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET);	191	sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET);
185	}	192	}
186		193
187		194
188	/** Enter userspace and never return. */	195	/** Enter userspace and never return. */
189	void userspace(uspace_arg_t *kernel_uarg)	196	void userspace(uspace_arg_t *kernel_uarg)
190	{	197	{
191	psr_t psr;	198	psr_t psr;
192	rsc_t rsc;	199	rsc_t rsc;
193		200
194	psr.value = psr_read();	201	psr.value = psr_read();
195	psr.cpl = PL_USER;	202	psr.cpl = PL_USER;
196	psr.i = true; /* start with interrupts enabled */	203	psr.i = true; /* start with interrupts enabled */
197	psr.ic = true;	204	psr.ic = true;
198	psr.ri = 0; /* start with instruction #0 */	205	psr.ri = 0; /* start with instruction #0 */
199	psr.bn = 1; /* start in bank 0 */	206	psr.bn = 1; /* start in bank 0 */
200		207
201	asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));	208	asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
202	rsc.loadrs = 0;	209	rsc.loadrs = 0;
203	rsc.be = false;	210	rsc.be = false;
204	rsc.pl = PL_USER;	211	rsc.pl = PL_USER;
205	rsc.mode = 3; /* eager mode */	212	rsc.mode = 3; /* eager mode */
206		213
207	switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,	214	switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
208	((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE -	215	((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE -
209	ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),	216	ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
210	((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE,	217	((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE,
211	(uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value);	218	(uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value);
212		219
213	while (1)	220	while (1)
214	;	221	;
215	}	222	}
216		223
217	/** Set thread-local-storage pointer.	224	/** Set thread-local-storage pointer.
218	*	225	*
219	* We use r13 (a.k.a. tp) for this purpose.	226	* We use r13 (a.k.a. tp) for this purpose.
220	*/	227	*/
221	unative_t sys_tls_set(unative_t addr)	228	unative_t sys_tls_set(unative_t addr)
222	{	229	{
223	return 0;	230	return 0;
224	}	231	}
225		232
226	/** Acquire console back for kernel	233	/** Acquire console back for kernel
227	*	234	*
228	*/	235	*/
229	void arch_grab_console(void)	236	void arch_grab_console(void)
230	{	237	{
231	#ifdef SKI	238	#ifdef SKI
232	ski_kbd_grab();	239	ski_kbd_grab();
233	#endif	240	#endif
234	}	241	}
235		242
236	/** Return console to userspace	243	/** Return console to userspace
237	*	244	*
238	*/	245	*/
239	void arch_release_console(void)	246	void arch_release_console(void)
240	{	247	{
241	#ifdef SKI	248	#ifdef SKI
242	ski_kbd_release();	249	ski_kbd_release();
243	#endif	250	#endif
244	}	251	}
245		252
246	void arch_reboot(void)	253	void arch_reboot(void)
247	{	254	{
248	pio_write_8((ioport8_t *)0x64, 0xfe);	255	pio_write_8((ioport8_t *)0x64, 0xfe);
249	while (1)	256	while (1)
250	;	257	;
251	}	258	}
252		259
253	/** Construct function pointer	260	/** Construct function pointer
254	*	261	*
255	* @param fptr function pointer structure	262	* @param fptr function pointer structure
256	* @param addr function address	263	* @param addr function address
257	* @param caller calling function address	264	* @param caller calling function address
258	*	265	*
259	* @return address of the function pointer	266	* @return address of the function pointer
260	*	267	*
261	*/	268	*/
262	void arch_construct_function(fncptr_t fptr, void addr, void caller)	269	void arch_construct_function(fncptr_t fptr, void addr, void caller)
263	{	270	{
264	fptr->fnc = (unative_t) addr;	271	fptr->fnc = (unative_t) addr;
265	fptr->gp = ((unative_t *) caller)[1];	272	fptr->gp = ((unative_t *) caller)[1];
266		273
267	return (void *) fptr;	274	return (void *) fptr;
268	}	275	}
269		276
270	/** @}	277	/** @}
271	*/	278	*/
272		279

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(root)/trunk/kernel/arch/ia64/src/ia64.c @ 3900 – Rev 4023 → 4026