Subversion Repositories HelenOS

Rev

Rev 3657 | Rev 3661 | Go to most recent revision | Only display areas with differences | Ignore whitespace | Details | Blame | Last modification | View Log | RSS feed

Rev 3657 Rev 3659
1
/*
1
/*
2
 * Copyright (c) 2005 Jakub Jermar
2
 * Copyright (c) 2005 Jakub Jermar
3
 * All rights reserved.
3
 * All rights reserved.
4
 *
4
 *
5
 * Redistribution and use in source and binary forms, with or without
5
 * Redistribution and use in source and binary forms, with or without
6
 * modification, are permitted provided that the following conditions
6
 * modification, are permitted provided that the following conditions
7
 * are met:
7
 * are met:
8
 *
8
 *
9
 * - Redistributions of source code must retain the above copyright
9
 * - Redistributions of source code must retain the above copyright
10
 *   notice, this list of conditions and the following disclaimer.
10
 *   notice, this list of conditions and the following disclaimer.
11
 * - Redistributions in binary form must reproduce the above copyright
11
 * - Redistributions in binary form must reproduce the above copyright
12
 *   notice, this list of conditions and the following disclaimer in the
12
 *   notice, this list of conditions and the following disclaimer in the
13
 *   documentation and/or other materials provided with the distribution.
13
 *   documentation and/or other materials provided with the distribution.
14
 * - The name of the author may not be used to endorse or promote products
14
 * - The name of the author may not be used to endorse or promote products
15
 *   derived from this software without specific prior written permission.
15
 *   derived from this software without specific prior written permission.
16
 *
16
 *
17
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
 */
27
 */
28
 
28
 
29
/** @addtogroup ia64
29
/** @addtogroup ia64
30
 * @{
30
 * @{
31
 */
31
 */
32
/** @file
32
/** @file
33
 */
33
 */
34
 
34
 
35
#include <arch.h>
35
#include <arch.h>
36
#include <arch/ski/ski.h>
36
#include <arch/ski/ski.h>
37
#include <arch/drivers/it.h>
37
#include <arch/drivers/it.h>
38
#include <arch/interrupt.h>
38
#include <arch/interrupt.h>
39
#include <arch/barrier.h>
39
#include <arch/barrier.h>
40
#include <arch/asm.h>
40
#include <arch/asm.h>
41
#include <arch/register.h>
41
#include <arch/register.h>
42
#include <arch/types.h>
42
#include <arch/types.h>
43
#include <arch/context.h>
43
#include <arch/context.h>
44
#include <arch/stack.h>
44
#include <arch/stack.h>
45
#include <arch/mm/page.h>
45
#include <arch/mm/page.h>
46
#include <mm/as.h>
46
#include <mm/as.h>
47
#include <config.h>
47
#include <config.h>
48
#include <userspace.h>
48
#include <userspace.h>
49
#include <console/console.h>
49
#include <console/console.h>
50
#include <proc/uarg.h>
50
#include <proc/uarg.h>
51
#include <syscall/syscall.h>
51
#include <syscall/syscall.h>
52
#include <ddi/irq.h>
52
#include <ddi/irq.h>
53
#include <ddi/device.h>
53
#include <ddi/device.h>
54
#include <arch/drivers/ega.h>
54
#include <arch/drivers/ega.h>
55
#include <arch/bootinfo.h>
55
#include <arch/bootinfo.h>
56
#include <genarch/kbd/i8042.h>
56
#include <genarch/kbd/i8042.h>
57
#include <genarch/kbd/ns16550.h>
57
#include <genarch/kbd/ns16550.h>
58
#include <smp/smp.h>
58
#include <smp/smp.h>
59
#include <smp/ipi.h>
59
#include <smp/ipi.h>
60
#include <arch/atomic.h>
60
#include <arch/atomic.h>
61
#include <panic.h>
61
#include <panic.h>
62
#include <print.h>
62
#include <print.h>
63
#include <sysinfo/sysinfo.h>
63
#include <sysinfo/sysinfo.h>
64
 
64
 
65
/*NS16550 as a COM 1*/
65
/*NS16550 as a COM 1*/
66
#define NS16550_IRQ (4+LAGACY_INTERRUPT_BASE)
66
#define NS16550_IRQ (4+LAGACY_INTERRUPT_BASE)
67
#define NS16550_PORT 0x3f8
67
#define NS16550_PORT 0x3f8
68
 
68
 
69
bootinfo_t *bootinfo;
69
bootinfo_t *bootinfo;
70
 
70
 
71
static uint64_t iosapic_base=0xfec00000;
71
static uint64_t iosapic_base=0xfec00000;
72
 
72
 
73
void arch_pre_main(void)
73
void arch_pre_main(void)
74
{
74
{
75
    /* Setup usermode init tasks. */
75
    /* Setup usermode init tasks. */
76
 
76
 
77
//#ifdef I460GX
77
//#ifdef I460GX
78
    unsigned int i;
78
    unsigned int i;
79
   
79
   
80
    init.cnt = bootinfo->taskmap.count;
80
    init.cnt = bootinfo->taskmap.count;
81
   
81
   
82
    for (i = 0; i < init.cnt; i++) {
82
    for (i = 0; i < init.cnt; i++) {
83
        init.tasks[i].addr = ((unsigned long) bootinfo->taskmap.tasks[i].addr) | VRN_MASK;
83
        init.tasks[i].addr = ((unsigned long) bootinfo->taskmap.tasks[i].addr) | VRN_MASK;
84
        init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
84
        init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
85
    }
85
    }
86
/*
86
/*
87
#else  
87
#else  
88
    init.cnt = 8;
88
    init.cnt = 8;
89
    init.tasks[0].addr = INIT0_ADDRESS;
89
    init.tasks[0].addr = INIT0_ADDRESS;
90
    init.tasks[0].size = INIT0_SIZE;
90
    init.tasks[0].size = INIT0_SIZE;
91
    init.tasks[1].addr = INIT0_ADDRESS + 0x400000;
91
    init.tasks[1].addr = INIT0_ADDRESS + 0x400000;
92
    init.tasks[1].size = INIT0_SIZE;
92
    init.tasks[1].size = INIT0_SIZE;
93
    init.tasks[2].addr = INIT0_ADDRESS + 0x800000;
93
    init.tasks[2].addr = INIT0_ADDRESS + 0x800000;
94
    init.tasks[2].size = INIT0_SIZE;
94
    init.tasks[2].size = INIT0_SIZE;
95
    init.tasks[3].addr = INIT0_ADDRESS + 0xc00000;
95
    init.tasks[3].addr = INIT0_ADDRESS + 0xc00000;
96
    init.tasks[3].size = INIT0_SIZE;
96
    init.tasks[3].size = INIT0_SIZE;
97
    init.tasks[4].addr = INIT0_ADDRESS + 0x1000000;
97
    init.tasks[4].addr = INIT0_ADDRESS + 0x1000000;
98
    init.tasks[4].size = INIT0_SIZE;
98
    init.tasks[4].size = INIT0_SIZE;
99
    init.tasks[5].addr = INIT0_ADDRESS + 0x1400000;
99
    init.tasks[5].addr = INIT0_ADDRESS + 0x1400000;
100
    init.tasks[5].size = INIT0_SIZE;
100
    init.tasks[5].size = INIT0_SIZE;
101
    init.tasks[6].addr = INIT0_ADDRESS + 0x1800000;
101
    init.tasks[6].addr = INIT0_ADDRESS + 0x1800000;
102
    init.tasks[6].size = INIT0_SIZE;
102
    init.tasks[6].size = INIT0_SIZE;
103
    init.tasks[7].addr = INIT0_ADDRESS + 0x1c00000;
103
    init.tasks[7].addr = INIT0_ADDRESS + 0x1c00000;
104
    init.tasks[7].size = INIT0_SIZE;
104
    init.tasks[7].size = INIT0_SIZE;
105
#endif*/
105
#endif*/
106
}
106
}
107
 
107
 
108
void arch_pre_mm_init(void)
108
void arch_pre_mm_init(void)
109
{
109
{
110
    /* Set Interruption Vector Address (i.e. location of interruption vector table). */
110
    /* Set Interruption Vector Address (i.e. location of interruption vector table). */
111
    iva_write((uintptr_t) &ivt);
111
    iva_write((uintptr_t) &ivt);
112
    srlz_d();
112
    srlz_d();
113
   
113
   
114
}
114
}
115
 
115
 
116
static void iosapic_init(void)
116
static void iosapic_init(void)
117
{
117
{
118
 
118
 
119
    uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base))|FW_OFFSET;
119
    uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base))|FW_OFFSET;
120
    int i;
120
    int i;
121
   
121
   
122
   
122
   
123
    for(i=0;i<16;i++)
123
    for(i=0;i<16;i++)
124
    {
124
    {
125
   
125
   
126
        if(i==2) continue;   //Disable Cascade interrupt
126
        if(i==2) continue;   //Disable Cascade interrupt
127
        ((uint32_t*)(IOSAPIC+0x00))[0]=0x10+2*i;
127
        ((uint32_t*)(IOSAPIC+0x00))[0]=0x10+2*i;
128
        srlz_d();
128
        srlz_d();
129
        ((uint32_t*)(IOSAPIC+0x10))[0]=LAGACY_INTERRUPT_BASE+i;
129
        ((uint32_t*)(IOSAPIC+0x10))[0]=LAGACY_INTERRUPT_BASE+i;
130
        srlz_d();
130
        srlz_d();
131
        ((uint32_t*)(IOSAPIC+0x00))[0]=0x10+2*i+1;
131
        ((uint32_t*)(IOSAPIC+0x00))[0]=0x10+2*i+1;
132
        srlz_d();
132
        srlz_d();
133
        ((uint32_t*)(IOSAPIC+0x10))[0]=1<<(56-32);
133
        ((uint32_t*)(IOSAPIC+0x10))[0]=1<<(56-32);
134
        srlz_d();
134
        srlz_d();
135
    }
135
    }
136
 
136
 
137
}
137
}
138
 
138
 
139
 
139
 
140
void arch_post_mm_init(void)
140
void arch_post_mm_init(void)
141
{
141
{
142
    if(config.cpu_active==1)
142
    if(config.cpu_active==1)
143
    {
143
    {
144
        iosapic_init();
144
        iosapic_init();
145
   
145
   
146
        irq_init(INR_COUNT, INR_COUNT);
146
        irq_init(INR_COUNT, INR_COUNT);
147
#ifdef SKI
147
#ifdef SKI
148
        ski_init_console();
148
        ski_init_console();
149
#else   
149
#else   
150
        ega_init();
150
        ega_init();
151
#endif  
151
#endif  
152
    }
152
    }
153
    it_init();
153
    it_init();
154
       
154
       
155
}
155
}
156
 
156
 
157
void arch_post_cpu_init(void)
157
void arch_post_cpu_init(void)
158
{
158
{
159
}
159
}
160
 
160
 
161
void arch_pre_smp_init(void)
161
void arch_pre_smp_init(void)
162
{
162
{
163
}
163
}
164
 
164
 
165
 
165
 
166
#ifdef I460GX
166
#ifdef I460GX
167
#define POLL_INTERVAL       50000       /* 50 ms */
167
#define POLL_INTERVAL       50000       /* 50 ms */
168
/** Kernel thread for polling keyboard. */
168
/** Kernel thread for polling keyboard. */
169
static void i8042_kkbdpoll(void *arg)
169
static void i8042_kkbdpoll(void *arg)
170
{
170
{
171
    while (1) {
171
    while (1) {
172
        i8042_poll();
172
        i8042_poll();
173
#ifdef CONFIG_NS16550
173
#ifdef CONFIG_NS16550
174
    #ifndef CONFIG_NS16550_INTERRUPT_DRIVEN
174
    #ifndef CONFIG_NS16550_INTERRUPT_DRIVEN
175
        ns16550_poll();
175
        ns16550_poll();
176
    #endif  
176
    #endif  
177
#endif
177
#endif
178
        thread_usleep(POLL_INTERVAL);
178
        thread_usleep(POLL_INTERVAL);
179
    }
179
    }
180
}
180
}
181
#endif
181
#endif
182
 
182
 
183
 
183
 
184
static void end_of_irq_void(void *cir_arg __attribute__((unused)),inr_t inr __attribute__((unused)))
184
static void end_of_irq_void(void *cir_arg __attribute__((unused)),inr_t inr __attribute__((unused)))
185
{
185
{
186
    return;
186
    return;
187
}
187
}
188
 
188
 
189
 
189
 
190
void arch_post_smp_init(void)
190
void arch_post_smp_init(void)
191
{
191
{
192
 
192
 
193
    {
193
    {
194
        /*
194
        /*
195
         * Create thread that polls keyboard.
195
         * Create thread that polls keyboard.
196
         */
196
         */
197
#ifdef SKI
197
#ifdef SKI
198
        thread_t *t;
198
        thread_t *t;
199
        t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
199
        t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
200
        if (!t)
200
        if (!t)
201
            panic("cannot create kkbdpoll\n");
201
            panic("cannot create kkbdpoll\n");
202
        thread_ready(t);
202
        thread_ready(t);
203
#endif      
203
#endif      
204
 
204
 
205
#ifdef I460GX
205
#ifdef I460GX
206
        devno_t kbd = device_assign_devno();
206
        devno_t kbd = device_assign_devno();
207
        devno_t mouse = device_assign_devno();
207
        devno_t mouse = device_assign_devno();
208
        /* keyboard controller */
208
        /* keyboard controller */
209
        i8042_init(kbd, IRQ_KBD, mouse, IRQ_MOUSE);
209
        i8042_init(kbd, IRQ_KBD, mouse, IRQ_MOUSE);
210
 
210
 
211
#ifdef CONFIG_NS16550
211
#ifdef CONFIG_NS16550
212
        ns16550_init(kbd, NS16550_IRQ, NS16550_PORT,end_of_irq_void,NULL); // as a COM 1
212
        ns16550_init(kbd, NS16550_PORT, NS16550_IRQ,end_of_irq_void,NULL); // as a COM 1
213
#else
213
#else
214
#endif
214
#endif
215
        thread_t *t;
215
        thread_t *t;
216
        t = thread_create(i8042_kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
216
        t = thread_create(i8042_kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
217
        if (!t)
217
        if (!t)
218
            panic("cannot create kkbdpoll\n");
218
            panic("cannot create kkbdpoll\n");
219
        thread_ready(t);
219
        thread_ready(t);
220
 
220
 
221
#endif
221
#endif
222
 
222
 
223
    }
223
    }
224
   
224
   
225
    sysinfo_set_item_val("ia64_iospace", NULL, true);
225
    sysinfo_set_item_val("ia64_iospace", NULL, true);
226
    sysinfo_set_item_val("ia64_iospace.address", NULL, true);
226
    sysinfo_set_item_val("ia64_iospace.address", NULL, true);
227
    sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET);
227
    sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET);
228
 
228
 
229
 
229
 
230
 
230
 
231
 
231
 
232
 
232
 
233
}
233
}
234
 
234
 
235
 
235
 
236
/** Enter userspace and never return. */
236
/** Enter userspace and never return. */
237
void userspace(uspace_arg_t *kernel_uarg)
237
void userspace(uspace_arg_t *kernel_uarg)
238
{
238
{
239
    psr_t psr;
239
    psr_t psr;
240
    rsc_t rsc;
240
    rsc_t rsc;
241
 
241
 
242
    psr.value = psr_read();
242
    psr.value = psr_read();
243
    psr.cpl = PL_USER;
243
    psr.cpl = PL_USER;
244
    psr.i = true;               /* start with interrupts enabled */
244
    psr.i = true;               /* start with interrupts enabled */
245
    psr.ic = true;
245
    psr.ic = true;
246
    psr.ri = 0;             /* start with instruction #0 */
246
    psr.ri = 0;             /* start with instruction #0 */
247
    psr.bn = 1;             /* start in bank 0 */
247
    psr.bn = 1;             /* start in bank 0 */
248
 
248
 
249
    asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
249
    asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
250
    rsc.loadrs = 0;
250
    rsc.loadrs = 0;
251
    rsc.be = false;
251
    rsc.be = false;
252
    rsc.pl = PL_USER;
252
    rsc.pl = PL_USER;
253
    rsc.mode = 3;               /* eager mode */
253
    rsc.mode = 3;               /* eager mode */
254
 
254
 
255
    switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
255
    switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
256
                ((uintptr_t) kernel_uarg->uspace_stack)+PAGE_SIZE-ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
256
                ((uintptr_t) kernel_uarg->uspace_stack)+PAGE_SIZE-ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
257
                ((uintptr_t) kernel_uarg->uspace_stack)+PAGE_SIZE,
257
                ((uintptr_t) kernel_uarg->uspace_stack)+PAGE_SIZE,
258
                (uintptr_t) kernel_uarg->uspace_uarg,
258
                (uintptr_t) kernel_uarg->uspace_uarg,
259
                psr.value, rsc.value);
259
                psr.value, rsc.value);
260
 
260
 
261
    while (1) {
261
    while (1) {
262
        ;
262
        ;
263
    }
263
    }
264
}
264
}
265
 
265
 
266
/** Set thread-local-storage pointer.
266
/** Set thread-local-storage pointer.
267
 *
267
 *
268
 * We use r13 (a.k.a. tp) for this purpose.
268
 * We use r13 (a.k.a. tp) for this purpose.
269
 */
269
 */
270
unative_t sys_tls_set(unative_t addr)
270
unative_t sys_tls_set(unative_t addr)
271
{
271
{
272
        return 0;
272
        return 0;
273
}
273
}
274
 
274
 
275
/** Acquire console back for kernel
275
/** Acquire console back for kernel
276
 *
276
 *
277
 */
277
 */
278
void arch_grab_console(void)
278
void arch_grab_console(void)
279
{
279
{
280
#ifdef SKI
280
#ifdef SKI
281
    ski_kbd_grab();
281
    ski_kbd_grab();
282
#else
282
#else
283
    i8042_grab();
283
    i8042_grab();
284
    #ifdef CONFIG_NS16550
284
    #ifdef CONFIG_NS16550
285
        ns16550_grab();
285
        ns16550_grab();
286
    #endif  
286
    #endif  
287
       
287
       
288
#endif  
288
#endif  
289
}
289
}
290
/** Return console to userspace
290
/** Return console to userspace
291
 *
291
 *
292
 */
292
 */
293
void arch_release_console(void)
293
void arch_release_console(void)
294
{
294
{
295
#ifdef SKI
295
#ifdef SKI
296
    ski_kbd_release();
296
    ski_kbd_release();
297
    i8042_release();
297
    i8042_release();
298
#else   
298
#else   
299
    #ifdef CONFIG_NS16550
299
    #ifdef CONFIG_NS16550
300
        ns16550_release();
300
        ns16550_release();
301
    #endif  
301
    #endif  
302
 
302
 
303
#endif
303
#endif
304
}
304
}
305
 
305
 
306
void arch_reboot(void)
306
void arch_reboot(void)
307
{
307
{
308
    outb(0x64,0xfe);
308
    outb(0x64,0xfe);
309
    while (1);
309
    while (1);
310
}
310
}
311
 
311
 
312
/** @}
312
/** @}
313
 */
313
 */
314
 
314