WebSVN – HelenOS – Diff – /trunk/kernel/arch/ia64/src/ia64.c


/*
 * Copyright (c) 2005 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup ia64
 * @{
 */
/** @file
 */
 
#include <arch.h>
#include <arch/ski/ski.h>
#include <arch/drivers/it.h>
#include <arch/interrupt.h>
#include <arch/barrier.h>
#include <arch/asm.h>
#include <arch/register.h>
#include <arch/types.h>
#include <arch/context.h>
#include <arch/stack.h>
#include <arch/mm/page.h>
#include <mm/as.h>
#include <config.h>
#include <userspace.h>
#include <console/console.h>
#include <proc/uarg.h>
#include <syscall/syscall.h>
#include <ddi/irq.h>
#include <ddi/device.h>
#include <arch/drivers/ega.h>
#include <arch/bootinfo.h>
#include <genarch/kbd/i8042.h>
#include <genarch/kbd/ns16550.h>
#include <smp/smp.h>
#include <smp/ipi.h>
#include <arch/atomic.h>
#include <panic.h>
#include <print.h>
#include <sysinfo/sysinfo.h>
 
/* NS16550 as a COM 1 */
#define NS16550_IRQ (4 + LEGACY_INTERRUPT_BASE)
#define NS16550_PORT    0x3f8
 
bootinfo_t *bootinfo;
 
static uint64_t iosapic_base = 0xfec00000;
 
void arch_pre_main(void)
{
    /* Setup usermode init tasks. */
 
    unsigned int i;
   
    init.cnt = bootinfo->taskmap.count;
   
    for (i = 0; i < init.cnt; i++) {
        init.tasks[i].addr =
            ((unsigned long) bootinfo->taskmap.tasks[i].addr) |
            VRN_MASK;
        init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
    }
}
 
void arch_pre_mm_init(void)
{
    /*
     * Set Interruption Vector Address (i.e. location of interruption vector
     * table).
     */
    iva_write((uintptr_t) &ivt);
    srlz_d();
   
}
 
static void iosapic_init(void)
{
 
    uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base)) | FW_OFFSET;
    int i;
   
    int myid, myeid;
   
    myid = ia64_get_cpu_id();
    myeid = ia64_get_cpu_eid();
 
    for (i = 0; i < 16; i++) {
        if (i == 2)
            continue;    /* Disable Cascade interrupt */
        ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i;
        srlz_d();
        ((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i;
        srlz_d();
        ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i + 1;
        srlz_d();
        ((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) |
            myeid << (48 - 32);
        srlz_d();
    }
 
}
 
 
void arch_post_mm_init(void)
{
    if (config.cpu_active == 1) {
        iosapic_init();
        irq_init(INR_COUNT, INR_COUNT);
#ifdef SKI
        ski_init_console();
#else   
        ega_init();
#endif  
    }
    it_init();
       
}
 
void arch_post_cpu_init(void)
{
}
 
void arch_pre_smp_init(void)
{
}
 
 
#ifdef I460GX
#define POLL_INTERVAL       50000       /* 50 ms */
/** Kernel thread for polling keyboard. */
static void i8042_kkbdpoll(void *arg)
{
    while (1) {
#ifdef CONFIG_NS16550
    #ifndef CONFIG_NS16550_INTERRUPT_DRIVEN
        ns16550_poll();
    #endif  
#else
    #ifndef CONFIG_I8042_INTERRUPT_DRIVEN
        i8042_poll();
    #endif  
#endif
        thread_usleep(POLL_INTERVAL);
    }
}
#endif
 
void arch_post_smp_init(void)
{
    thread_t *t;
 
    /*
     * Create thread that polls keyboard.
     */
#ifdef SKI
    t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
    if (!t)
        panic("cannot create kkbdpoll\n");
    thread_ready(t);
#endif      
 
#ifdef I460GX
    devno_t kbd = device_assign_devno();
 
#ifdef CONFIG_NS16550
    ns16550_init(kbd, NS16550_PORT, NS16550_IRQ, NULL, NULL);
#else
    devno_t mouse = device_assign_devno();
    i8042_init(kbd, IRQ_KBD, mouse, IRQ_MOUSE);
#endif
    t = thread_create(i8042_kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
    if (!t)
        panic("cannot create kkbdpoll\n");
    thread_ready(t);
#endif
 
    sysinfo_set_item_val("ia64_iospace", NULL, true);
    sysinfo_set_item_val("ia64_iospace.address", NULL, true);
    sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET);
}
 
 
/** Enter userspace and never return. */
void userspace(uspace_arg_t *kernel_uarg)
{
    psr_t psr;
    rsc_t rsc;
 
    psr.value = psr_read();
    psr.cpl = PL_USER;
    psr.i = true;           /* start with interrupts enabled */
    psr.ic = true;
    psr.ri = 0;         /* start with instruction #0 */
    psr.bn = 1;         /* start in bank 0 */
 
    asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
    rsc.loadrs = 0;
    rsc.be = false;
    rsc.pl = PL_USER;
    rsc.mode = 3;           /* eager mode */
 
    switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
        ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE -
        ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
        ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE,
        (uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value);
 
    while (1)
        ;
}
 
/** Set thread-local-storage pointer.
 *
 * We use r13 (a.k.a. tp) for this purpose.
 */
unative_t sys_tls_set(unative_t addr)
{
        return 0;
}
 
/** Acquire console back for kernel
 *
 */
void arch_grab_console(void)
{
#ifdef SKI
    ski_kbd_grab();
#else
#ifdef CONFIG_NS16550
    ns16550_grab();
#else
    i8042_grab();
#endif  
#endif  
}
 
/** Return console to userspace
 *
 */
void arch_release_console(void)
{
#ifdef SKI
    ski_kbd_release();
#else   
#ifdef CONFIG_NS16550
    ns16550_release();
#else   
    i8042_release();
#endif  
#endif
}
 
void arch_reboot(void)
{
    outb(0x64, 0xfe);
    while (1)
        ;
}
 
/** @}
 */
 

Rev 3766	Rev 3775
1	/*	1	/*
2	* Copyright (c) 2005 Jakub Jermar	2	* Copyright (c) 2005 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup ia64	29	/** @addtogroup ia64
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35	#include <arch.h>	35	#include <arch.h>
36	#include <arch/ski/ski.h>	36	#include <arch/ski/ski.h>
37	#include <arch/drivers/it.h>	37	#include <arch/drivers/it.h>
38	#include <arch/interrupt.h>	38	#include <arch/interrupt.h>
39	#include <arch/barrier.h>	39	#include <arch/barrier.h>
40	#include <arch/asm.h>	40	#include <arch/asm.h>
41	#include <arch/register.h>	41	#include <arch/register.h>
42	#include <arch/types.h>	42	#include <arch/types.h>
43	#include <arch/context.h>	43	#include <arch/context.h>
44	#include <arch/stack.h>	44	#include <arch/stack.h>
45	#include <arch/mm/page.h>	45	#include <arch/mm/page.h>
46	#include <mm/as.h>	46	#include <mm/as.h>
47	#include <config.h>	47	#include <config.h>
48	#include <userspace.h>	48	#include <userspace.h>
49	#include <console/console.h>	49	#include <console/console.h>
50	#include <proc/uarg.h>	50	#include <proc/uarg.h>
51	#include <syscall/syscall.h>	51	#include <syscall/syscall.h>
52	#include <ddi/irq.h>	52	#include <ddi/irq.h>
53	#include <ddi/device.h>	53	#include <ddi/device.h>
54	#include <arch/drivers/ega.h>	54	#include <arch/drivers/ega.h>
55	#include <arch/bootinfo.h>	55	#include <arch/bootinfo.h>
56	#include <genarch/kbd/i8042.h>	56	#include <genarch/kbd/i8042.h>
57	#include <genarch/kbd/ns16550.h>	57	#include <genarch/kbd/ns16550.h>
58	#include <smp/smp.h>	58	#include <smp/smp.h>
59	#include <smp/ipi.h>	59	#include <smp/ipi.h>
60	#include <arch/atomic.h>	60	#include <arch/atomic.h>
61	#include <panic.h>	61	#include <panic.h>
62	#include <print.h>	62	#include <print.h>
63	#include <sysinfo/sysinfo.h>	63	#include <sysinfo/sysinfo.h>
64		64
65	/* NS16550 as a COM 1 */	65	/* NS16550 as a COM 1 */
66	#define NS16550_IRQ (4 + LEGACY_INTERRUPT_BASE)	66	#define NS16550_IRQ (4 + LEGACY_INTERRUPT_BASE)
67	#define NS16550_PORT 0x3f8	67	#define NS16550_PORT 0x3f8
68		68
69	bootinfo_t *bootinfo;	69	bootinfo_t *bootinfo;
70		70
71	static uint64_t iosapic_base = 0xfec00000;	71	static uint64_t iosapic_base = 0xfec00000;
72		72
73	void arch_pre_main(void)	73	void arch_pre_main(void)
74	{	74	{
75	/* Setup usermode init tasks. */	75	/* Setup usermode init tasks. */
76		76
77	unsigned int i;	77	unsigned int i;
78		78
79	init.cnt = bootinfo->taskmap.count;	79	init.cnt = bootinfo->taskmap.count;
80		80
81	for (i = 0; i < init.cnt; i++) {	81	for (i = 0; i < init.cnt; i++) {
82	init.tasks[i].addr =	82	init.tasks[i].addr =
83	((unsigned long) bootinfo->taskmap.tasks[i].addr) \|	83	((unsigned long) bootinfo->taskmap.tasks[i].addr) \|
84	VRN_MASK;	84	VRN_MASK;
85	init.tasks[i].size = bootinfo->taskmap.tasks[i].size;	85	init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
86	}	86	}
87	}	87	}
88		88
89	void arch_pre_mm_init(void)	89	void arch_pre_mm_init(void)
90	{	90	{
91	/*	91	/*
92	* Set Interruption Vector Address (i.e. location of interruption vector	92	* Set Interruption Vector Address (i.e. location of interruption vector
93	* table).	93	* table).
94	*/	94	*/
95	iva_write((uintptr_t) &ivt);	95	iva_write((uintptr_t) &ivt);
96	srlz_d();	96	srlz_d();
97		97
98	}	98	}
99		99
100	static void iosapic_init(void)	100	static void iosapic_init(void)
101	{	101	{
102		-
103	uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base)) \| FW_OFFSET;	102	uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base)) \| FW_OFFSET;
104	int i;	103	int i;
105		104
106	int myid,myeid;	105	int myid, myeid;
107		106
108	myid = ia64_get_cpu_id();	107	myid = ia64_get_cpu_id();
109	myeid = ia64_get_cpu_eid();	108	myeid = ia64_get_cpu_eid();
110		109
111	for (i = 0; i < 16; i++) {	110	for (i = 0; i < 16; i++) {
112	if (i == 2)	111	if (i == 2)
113	continue; /* Disable Cascade interrupt */	112	continue; /* Disable Cascade interrupt */
114	((uint32_t )(IOSAPIC + 0x00))[0] = 0x10 + 2 i;	113	((uint32_t )(IOSAPIC + 0x00))[0] = 0x10 + 2 i;
115	srlz_d();	114	srlz_d();
116	((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i;	115	((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i;
117	srlz_d();	116	srlz_d();
118	((uint32_t )(IOSAPIC + 0x00))[0] = 0x10 + 2 i + 1;	117	((uint32_t )(IOSAPIC + 0x00))[0] = 0x10 + 2 i + 1;
119	srlz_d();	118	srlz_d();
120	((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) \|	119	((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) \|
121	myeid << (48 - 32);	120	myeid << (48 - 32);
122	srlz_d();	121	srlz_d();
123	}	122	}
124		123
125	}	124	}
126		125
127		126
128	void arch_post_mm_init(void)	127	void arch_post_mm_init(void)
129	{	128	{
130	if (config.cpu_active == 1) {	129	if (config.cpu_active == 1) {
131	iosapic_init();	130	iosapic_init();
132	irq_init(INR_COUNT, INR_COUNT);	131	irq_init(INR_COUNT, INR_COUNT);
133	#ifdef SKI	132	#ifdef SKI
134	ski_init_console();	133	ski_init_console();
135	#else	134	#else
136	ega_init();	135	ega_init();
137	#endif	136	#endif
138	}	137	}
139	it_init();	138	it_init();
140		139
141	}	140	}
142		141
143	void arch_post_cpu_init(void)	142	void arch_post_cpu_init(void)
144	{	143	{
145	}	144	}
146		145
147	void arch_pre_smp_init(void)	146	void arch_pre_smp_init(void)
148	{	147	{
149	}	148	}
150		149
151		150
152	#ifdef I460GX	151	#ifdef I460GX
153	#define POLL_INTERVAL 50000 /* 50 ms */	152	#define POLL_INTERVAL 50000 /* 50 ms */
154	/** Kernel thread for polling keyboard. */	153	/** Kernel thread for polling keyboard. */
155	static void i8042_kkbdpoll(void *arg)	154	static void i8042_kkbdpoll(void *arg)
156	{	155	{
157	while (1) {	156	while (1) {
158	#ifdef CONFIG_NS16550	157	#ifdef CONFIG_NS16550
159	#ifndef CONFIG_NS16550_INTERRUPT_DRIVEN	158	#ifndef CONFIG_NS16550_INTERRUPT_DRIVEN
160	ns16550_poll();	159	ns16550_poll();
161	#endif	160	#endif
162	#else	161	#else
163	#ifndef CONFIG_I8042_INTERRUPT_DRIVEN	162	#ifndef CONFIG_I8042_INTERRUPT_DRIVEN
164	i8042_poll();	163	i8042_poll();
165	#endif	164	#endif
166	#endif	165	#endif
167	thread_usleep(POLL_INTERVAL);	166	thread_usleep(POLL_INTERVAL);
168	}	167	}
169	}	168	}
170	#endif	169	#endif
171		170
172	void arch_post_smp_init(void)	171	void arch_post_smp_init(void)
173	{	172	{
174	thread_t *t;	173	thread_t *t;
175		174
176	/*	175	/*
177	* Create thread that polls keyboard.	176	* Create thread that polls keyboard.
178	*/	177	*/
179	#ifdef SKI	178	#ifdef SKI
180	t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);	179	t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
181	if (!t)	180	if (!t)
182	panic("cannot create kkbdpoll\n");	181	panic("cannot create kkbdpoll\n");
183	thread_ready(t);	182	thread_ready(t);
184	#endif	183	#endif
185		184
186	#ifdef I460GX	185	#ifdef I460GX
187	devno_t kbd = device_assign_devno();	186	devno_t kbd = device_assign_devno();
188		187
189	#ifdef CONFIG_NS16550	188	#ifdef CONFIG_NS16550
190	ns16550_init(kbd, NS16550_PORT, NS16550_IRQ, NULL, NULL);	189	ns16550_init(kbd, NS16550_PORT, NS16550_IRQ, NULL, NULL);
191	#else	190	#else
192	devno_t mouse = device_assign_devno();	191	devno_t mouse = device_assign_devno();
193	i8042_init(kbd, IRQ_KBD, mouse, IRQ_MOUSE);	192	i8042_init(kbd, IRQ_KBD, mouse, IRQ_MOUSE);
194	#endif	193	#endif
195	t = thread_create(i8042_kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);	194	t = thread_create(i8042_kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
196	if (!t)	195	if (!t)
197	panic("cannot create kkbdpoll\n");	196	panic("cannot create kkbdpoll\n");
198	thread_ready(t);	197	thread_ready(t);
199	#endif	198	#endif
200		199
201	sysinfo_set_item_val("ia64_iospace", NULL, true);	200	sysinfo_set_item_val("ia64_iospace", NULL, true);
202	sysinfo_set_item_val("ia64_iospace.address", NULL, true);	201	sysinfo_set_item_val("ia64_iospace.address", NULL, true);
203	sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET);	202	sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET);
204	}	203	}
205		204
206		205
207	/** Enter userspace and never return. */	206	/** Enter userspace and never return. */
208	void userspace(uspace_arg_t *kernel_uarg)	207	void userspace(uspace_arg_t *kernel_uarg)
209	{	208	{
210	psr_t psr;	209	psr_t psr;
211	rsc_t rsc;	210	rsc_t rsc;
212		211
213	psr.value = psr_read();	212	psr.value = psr_read();
214	psr.cpl = PL_USER;	213	psr.cpl = PL_USER;
215	psr.i = true; /* start with interrupts enabled */	214	psr.i = true; /* start with interrupts enabled */
216	psr.ic = true;	215	psr.ic = true;
217	psr.ri = 0; /* start with instruction #0 */	216	psr.ri = 0; /* start with instruction #0 */
218	psr.bn = 1; /* start in bank 0 */	217	psr.bn = 1; /* start in bank 0 */
219		218
220	asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));	219	asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
221	rsc.loadrs = 0;	220	rsc.loadrs = 0;
222	rsc.be = false;	221	rsc.be = false;
223	rsc.pl = PL_USER;	222	rsc.pl = PL_USER;
224	rsc.mode = 3; /* eager mode */	223	rsc.mode = 3; /* eager mode */
225		224
226	switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,	225	switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
227	((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE -	226	((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE -
228	ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),	227	ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
229	((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE,	228	((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE,
230	(uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value);	229	(uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value);
231		230
232	while (1)	231	while (1)
233	;	232	;
234	}	233	}
235		234
236	/** Set thread-local-storage pointer.	235	/** Set thread-local-storage pointer.
237	*	236	*
238	* We use r13 (a.k.a. tp) for this purpose.	237	* We use r13 (a.k.a. tp) for this purpose.
239	*/	238	*/
240	unative_t sys_tls_set(unative_t addr)	239	unative_t sys_tls_set(unative_t addr)
241	{	240	{
242	return 0;	241	return 0;
243	}	242	}
244		243
245	/** Acquire console back for kernel	244	/** Acquire console back for kernel
246	*	245	*
247	*/	246	*/
248	void arch_grab_console(void)	247	void arch_grab_console(void)
249	{	248	{
250	#ifdef SKI	249	#ifdef SKI
251	ski_kbd_grab();	250	ski_kbd_grab();
252	#else	251	#else
253	#ifdef CONFIG_NS16550	252	#ifdef CONFIG_NS16550
254	ns16550_grab();	253	ns16550_grab();
255	#else	254	#else
256	i8042_grab();	255	i8042_grab();
257	#endif	256	#endif
258	#endif	257	#endif
259	}	258	}
260		259
261	/** Return console to userspace	260	/** Return console to userspace
262	*	261	*
263	*/	262	*/
264	void arch_release_console(void)	263	void arch_release_console(void)
265	{	264	{
266	#ifdef SKI	265	#ifdef SKI
267	ski_kbd_release();	266	ski_kbd_release();
268	#else	267	#else
269	#ifdef CONFIG_NS16550	268	#ifdef CONFIG_NS16550
270	ns16550_release();	269	ns16550_release();
271	#else	270	#else
272	i8042_release();	271	i8042_release();
273	#endif	272	#endif
274	#endif	273	#endif
275	}	274	}
276		275
277	void arch_reboot(void)	276	void arch_reboot(void)
278	{	277	{
279	outb(0x64, 0xfe);	278	outb(0x64, 0xfe);
280	while (1)	279	while (1)
281	;	280	;
282	}	281	}
283		282
284	/** @}	283	/** @}
285	*/	284	*/
286		285

Subversion Repositories HelenOS

(root)/trunk/kernel/arch/ia64/src/ia64.c – Rev 3766 → 3775