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1
/*
1
/*
2
 * Copyright (c) 2005 Jakub Jermar
2
 * Copyright (c) 2005 Jakub Jermar
3
 * All rights reserved.
3
 * All rights reserved.
4
 *
4
 *
5
 * Redistribution and use in source and binary forms, with or without
5
 * Redistribution and use in source and binary forms, with or without
6
 * modification, are permitted provided that the following conditions
6
 * modification, are permitted provided that the following conditions
7
 * are met:
7
 * are met:
8
 *
8
 *
9
 * - Redistributions of source code must retain the above copyright
9
 * - Redistributions of source code must retain the above copyright
10
 *   notice, this list of conditions and the following disclaimer.
10
 *   notice, this list of conditions and the following disclaimer.
11
 * - Redistributions in binary form must reproduce the above copyright
11
 * - Redistributions in binary form must reproduce the above copyright
12
 *   notice, this list of conditions and the following disclaimer in the
12
 *   notice, this list of conditions and the following disclaimer in the
13
 *   documentation and/or other materials provided with the distribution.
13
 *   documentation and/or other materials provided with the distribution.
14
 * - The name of the author may not be used to endorse or promote products
14
 * - The name of the author may not be used to endorse or promote products
15
 *   derived from this software without specific prior written permission.
15
 *   derived from this software without specific prior written permission.
16
 *
16
 *
17
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
 */
27
 */
28
 
28
 
29
/** @addtogroup ia64
29
/** @addtogroup ia64
30
 * @{
30
 * @{
31
 */
31
 */
32
/** @file
32
/** @file
33
 */
33
 */
34
 
34
 
35
#include <arch.h>
35
#include <arch.h>
36
#include <arch/ski/ski.h>
36
#include <arch/ski/ski.h>
37
#include <arch/drivers/it.h>
37
#include <arch/drivers/it.h>
38
#include <arch/interrupt.h>
38
#include <arch/interrupt.h>
39
#include <arch/barrier.h>
39
#include <arch/barrier.h>
40
#include <arch/asm.h>
40
#include <arch/asm.h>
41
#include <arch/register.h>
41
#include <arch/register.h>
42
#include <arch/types.h>
42
#include <arch/types.h>
43
#include <arch/context.h>
43
#include <arch/context.h>
44
#include <arch/stack.h>
44
#include <arch/stack.h>
45
#include <arch/mm/page.h>
45
#include <arch/mm/page.h>
46
#include <mm/as.h>
46
#include <mm/as.h>
47
#include <config.h>
47
#include <config.h>
48
#include <userspace.h>
48
#include <userspace.h>
49
#include <console/console.h>
49
#include <console/console.h>
50
#include <proc/uarg.h>
50
#include <proc/uarg.h>
51
#include <syscall/syscall.h>
51
#include <syscall/syscall.h>
52
#include <ddi/irq.h>
52
#include <ddi/irq.h>
53
#include <ddi/device.h>
53
#include <ddi/device.h>
54
#include <arch/drivers/ega.h>
54
#include <arch/drivers/ega.h>
55
#include <arch/bootinfo.h>
55
#include <arch/bootinfo.h>
56
#include <genarch/kbd/i8042.h>
56
#include <genarch/kbd/i8042.h>
57
#include <genarch/kbd/ns16550.h>
57
#include <genarch/kbd/ns16550.h>
58
#include <smp/smp.h>
58
#include <smp/smp.h>
59
#include <smp/ipi.h>
59
#include <smp/ipi.h>
60
#include <arch/atomic.h>
60
#include <arch/atomic.h>
61
#include <panic.h>
61
#include <panic.h>
62
#include <print.h>
62
#include <print.h>
63
#include <sysinfo/sysinfo.h>
63
#include <sysinfo/sysinfo.h>
64
 
64
 
65
/*NS16550 as a COM 1*/
65
/* NS16550 as a COM 1 */
66
#define NS16550_IRQ (4+LEGACY_INTERRUPT_BASE)
66
#define NS16550_IRQ (4 + LEGACY_INTERRUPT_BASE)
67
#define NS16550_PORT 0x3f8
67
#define NS16550_PORT    0x3f8
68
 
68
 
69
bootinfo_t *bootinfo;
69
bootinfo_t *bootinfo;
70
 
70
 
71
static uint64_t iosapic_base=0xfec00000;
71
static uint64_t iosapic_base = 0xfec00000;
72
 
72
 
73
void arch_pre_main(void)
73
void arch_pre_main(void)
74
{
74
{
75
    /* Setup usermode init tasks. */
75
    /* Setup usermode init tasks. */
76
 
76
 
77
    unsigned int i;
77
    unsigned int i;
78
   
78
   
79
    init.cnt = bootinfo->taskmap.count;
79
    init.cnt = bootinfo->taskmap.count;
80
   
80
   
81
    for (i = 0; i < init.cnt; i++) {
81
    for (i = 0; i < init.cnt; i++) {
-
 
82
        init.tasks[i].addr =
82
        init.tasks[i].addr = ((unsigned long) bootinfo->taskmap.tasks[i].addr) | VRN_MASK;
83
            ((unsigned long) bootinfo->taskmap.tasks[i].addr) |
-
 
84
            VRN_MASK;
83
        init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
85
        init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
84
    }
86
    }
85
}
87
}
86
 
88
 
87
void arch_pre_mm_init(void)
89
void arch_pre_mm_init(void)
88
{
90
{
-
 
91
    /*
89
    /* Set Interruption Vector Address (i.e. location of interruption vector table). */
92
     * Set Interruption Vector Address (i.e. location of interruption vector
-
 
93
     * table).
-
 
94
     */
90
    iva_write((uintptr_t) &ivt);
95
    iva_write((uintptr_t) &ivt);
91
    srlz_d();
96
    srlz_d();
92
   
97
   
93
}
98
}
94
 
99
 
95
static void iosapic_init(void)
100
static void iosapic_init(void)
96
{
101
{
97
 
102
 
98
    uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base))|FW_OFFSET;
103
    uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base)) | FW_OFFSET;
99
    int i;
104
    int i;
100
   
105
   
101
    int myid,myeid;
106
    int myid,myeid;
102
   
107
   
103
    myid=ia64_get_cpu_id();
108
    myid = ia64_get_cpu_id();
104
    myeid=ia64_get_cpu_eid();
109
    myeid = ia64_get_cpu_eid();
105
 
110
 
106
    for(i=0;i<16;i++)
111
    for (i = 0; i < 16; i++) {
107
    {
112
        if (i == 2)
108
   
-
 
109
        if(i==2) continue;   //Disable Cascade interrupt
113
            continue;    /* Disable Cascade interrupt */
110
        ((uint32_t*)(IOSAPIC+0x00))[0]=0x10+2*i;
114
        ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i;
111
        srlz_d();
115
        srlz_d();
112
        ((uint32_t*)(IOSAPIC+0x10))[0]=LEGACY_INTERRUPT_BASE+i;
116
        ((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i;
113
        srlz_d();
117
        srlz_d();
114
        ((uint32_t*)(IOSAPIC+0x00))[0]=0x10+2*i+1;
118
        ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i + 1;
115
        srlz_d();
119
        srlz_d();
116
        ((uint32_t*)(IOSAPIC+0x10))[0]=myid<<(56-32) | myeid<<(48-32);
120
        ((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) |
-
 
121
            myeid << (48 - 32);
117
        srlz_d();
122
        srlz_d();
118
    }
123
    }
119
 
124
 
120
}
125
}
121
 
126
 
122
 
127
 
123
void arch_post_mm_init(void)
128
void arch_post_mm_init(void)
124
{
129
{
125
    if(config.cpu_active==1)
130
    if (config.cpu_active == 1) {
126
    {
-
 
127
        iosapic_init();
131
        iosapic_init();
128
   
-
 
129
        irq_init(INR_COUNT, INR_COUNT);
132
        irq_init(INR_COUNT, INR_COUNT);
130
#ifdef SKI
133
#ifdef SKI
131
        ski_init_console();
134
        ski_init_console();
132
#else   
135
#else   
133
        ega_init();
136
        ega_init();
134
#endif  
137
#endif  
135
    }
138
    }
136
    it_init();
139
    it_init();
137
       
140
       
138
}
141
}
139
 
142
 
140
void arch_post_cpu_init(void)
143
void arch_post_cpu_init(void)
141
{
144
{
142
}
145
}
143
 
146
 
144
void arch_pre_smp_init(void)
147
void arch_pre_smp_init(void)
145
{
148
{
146
}
149
}
147
 
150
 
148
 
151
 
149
#ifdef I460GX
152
#ifdef I460GX
150
#define POLL_INTERVAL       50000       /* 50 ms */
153
#define POLL_INTERVAL       50000       /* 50 ms */
151
/** Kernel thread for polling keyboard. */
154
/** Kernel thread for polling keyboard. */
152
static void i8042_kkbdpoll(void *arg)
155
static void i8042_kkbdpoll(void *arg)
153
{
156
{
154
    while (1) {
157
    while (1) {
155
#ifdef CONFIG_NS16550
158
#ifdef CONFIG_NS16550
156
    #ifndef CONFIG_NS16550_INTERRUPT_DRIVEN
159
    #ifndef CONFIG_NS16550_INTERRUPT_DRIVEN
157
        ns16550_poll();
160
        ns16550_poll();
158
    #endif  
161
    #endif  
159
#else
162
#else
160
    #ifndef CONFIG_I8042_INTERRUPT_DRIVEN
163
    #ifndef CONFIG_I8042_INTERRUPT_DRIVEN
161
        i8042_poll();
164
        i8042_poll();
162
    #endif  
165
    #endif  
163
#endif
166
#endif
164
        thread_usleep(POLL_INTERVAL);
167
        thread_usleep(POLL_INTERVAL);
165
    }
168
    }
166
}
169
}
167
#endif
170
#endif
168
 
171
 
169
 
-
 
170
void end_of_irq_void(void *cir_arg __attribute__((unused)),inr_t inr __attribute__((unused)));
-
 
171
void end_of_irq_void(void *cir_arg __attribute__((unused)),inr_t inr __attribute__((unused)))
-
 
172
{
-
 
173
    return;
-
 
174
}
-
 
175
 
-
 
176
 
-
 
177
void arch_post_smp_init(void)
172
void arch_post_smp_init(void)
178
{
173
{
-
 
174
    thread_t *t;
179
 
175
 
180
    {
-
 
181
        /*
176
    /*
182
         * Create thread that polls keyboard.
177
     * Create thread that polls keyboard.
183
         */
178
     */
184
#ifdef SKI
179
#ifdef SKI
185
        thread_t *t;
-
 
186
        t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
180
    t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
187
        if (!t)
181
    if (!t)
188
            panic("cannot create kkbdpoll\n");
182
        panic("cannot create kkbdpoll\n");
189
        thread_ready(t);
183
    thread_ready(t);
190
#endif      
184
#endif      
191
 
185
 
192
#ifdef I460GX
186
#ifdef I460GX
193
        devno_t kbd = device_assign_devno();
187
    devno_t kbd = device_assign_devno();
194
        /* keyboard controller */
-
 
195
 
188
 
196
#ifdef CONFIG_NS16550
189
#ifdef CONFIG_NS16550
197
        ns16550_init(kbd, NS16550_PORT, NS16550_IRQ,end_of_irq_void,NULL); // as a COM 1
190
    ns16550_init(kbd, NS16550_PORT, NS16550_IRQ, NULL, NULL);
198
#else
191
#else
199
        devno_t mouse = device_assign_devno();
192
    devno_t mouse = device_assign_devno();
200
        i8042_init(kbd, IRQ_KBD, mouse, IRQ_MOUSE);
193
    i8042_init(kbd, IRQ_KBD, mouse, IRQ_MOUSE);
201
#endif
194
#endif
202
        thread_t *t;
-
 
203
        t = thread_create(i8042_kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
195
    t = thread_create(i8042_kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
204
        if (!t)
196
    if (!t)
205
            panic("cannot create kkbdpoll\n");
197
        panic("cannot create kkbdpoll\n");
206
        thread_ready(t);
198
    thread_ready(t);
207
 
-
 
208
#endif
199
#endif
209
 
200
 
210
    }
-
 
211
   
-
 
212
    sysinfo_set_item_val("ia64_iospace", NULL, true);
201
    sysinfo_set_item_val("ia64_iospace", NULL, true);
213
    sysinfo_set_item_val("ia64_iospace.address", NULL, true);
202
    sysinfo_set_item_val("ia64_iospace.address", NULL, true);
214
    sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET);
203
    sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET);
215
 
-
 
216
 
-
 
217
 
-
 
218
 
-
 
219
 
-
 
220
}
204
}
221
 
205
 
222
 
206
 
223
/** Enter userspace and never return. */
207
/** Enter userspace and never return. */
224
void userspace(uspace_arg_t *kernel_uarg)
208
void userspace(uspace_arg_t *kernel_uarg)
225
{
209
{
226
    psr_t psr;
210
    psr_t psr;
227
    rsc_t rsc;
211
    rsc_t rsc;
228
 
212
 
229
    psr.value = psr_read();
213
    psr.value = psr_read();
230
    psr.cpl = PL_USER;
214
    psr.cpl = PL_USER;
231
    psr.i = true;               /* start with interrupts enabled */
215
    psr.i = true;           /* start with interrupts enabled */
232
    psr.ic = true;
216
    psr.ic = true;
233
    psr.ri = 0;             /* start with instruction #0 */
217
    psr.ri = 0;         /* start with instruction #0 */
234
    psr.bn = 1;             /* start in bank 0 */
218
    psr.bn = 1;         /* start in bank 0 */
235
 
219
 
236
    asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
220
    asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
237
    rsc.loadrs = 0;
221
    rsc.loadrs = 0;
238
    rsc.be = false;
222
    rsc.be = false;
239
    rsc.pl = PL_USER;
223
    rsc.pl = PL_USER;
240
    rsc.mode = 3;               /* eager mode */
224
    rsc.mode = 3;           /* eager mode */
241
 
225
 
242
    switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
226
    switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
243
                ((uintptr_t) kernel_uarg->uspace_stack)+PAGE_SIZE-ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
227
        ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE -
244
                ((uintptr_t) kernel_uarg->uspace_stack)+PAGE_SIZE,
228
        ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
245
                (uintptr_t) kernel_uarg->uspace_uarg,
229
        ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE,
246
                psr.value, rsc.value);
230
        (uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value);
247
 
231
 
248
    while (1) {
232
    while (1)
249
        ;
233
        ;
250
    }
-
 
251
}
234
}
252
 
235
 
253
/** Set thread-local-storage pointer.
236
/** Set thread-local-storage pointer.
254
 *
237
 *
255
 * We use r13 (a.k.a. tp) for this purpose.
238
 * We use r13 (a.k.a. tp) for this purpose.
256
 */
239
 */
257
unative_t sys_tls_set(unative_t addr)
240
unative_t sys_tls_set(unative_t addr)
258
{
241
{
259
        return 0;
242
        return 0;
260
}
243
}
261
 
244
 
262
/** Acquire console back for kernel
245
/** Acquire console back for kernel
263
 *
246
 *
264
 */
247
 */
265
void arch_grab_console(void)
248
void arch_grab_console(void)
266
{
249
{
267
#ifdef SKI
250
#ifdef SKI
268
    ski_kbd_grab();
251
    ski_kbd_grab();
269
#else
252
#else
270
    #ifdef CONFIG_NS16550
253
#ifdef CONFIG_NS16550
271
        ns16550_grab();
254
    ns16550_grab();
272
    #else
255
#else
273
        i8042_grab();
256
    i8042_grab();
274
    #endif  
257
#endif  
275
#endif  
258
#endif  
276
}
259
}
-
 
260
 
277
/** Return console to userspace
261
/** Return console to userspace
278
 *
262
 *
279
 */
263
 */
280
void arch_release_console(void)
264
void arch_release_console(void)
281
{
265
{
282
#ifdef SKI
266
#ifdef SKI
283
    ski_kbd_release();
267
    ski_kbd_release();
284
#else   
268
#else   
285
    #ifdef CONFIG_NS16550
269
#ifdef CONFIG_NS16550
286
        ns16550_release();
270
    ns16550_release();
287
    #else   
271
#else   
288
        i8042_release();
272
    i8042_release();
289
    #endif  
273
#endif  
290
 
-
 
291
#endif
274
#endif
292
}
275
}
293
 
276
 
294
void arch_reboot(void)
277
void arch_reboot(void)
295
{
278
{
296
    outb(0x64,0xfe);
279
    outb(0x64, 0xfe);
297
    while (1);
280
    while (1)
-
 
281
        ;
298
}
282
}
299
 
283
 
300
/** @}
284
/** @}
301
 */
285
 */
302
 
286