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1 | /* |
1 | /* |
2 | * Copyright (c) 2005 Jakub Jermar |
2 | * Copyright (c) 2005 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup ia64 |
29 | /** @addtogroup ia64 |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | */ |
33 | */ |
34 | 34 | ||
35 | #include <arch.h> |
35 | #include <arch.h> |
36 | #include <arch/ski/ski.h> |
36 | #include <arch/ski/ski.h> |
37 | #include <arch/drivers/it.h> |
37 | #include <arch/drivers/it.h> |
38 | #include <arch/interrupt.h> |
38 | #include <arch/interrupt.h> |
39 | #include <arch/barrier.h> |
39 | #include <arch/barrier.h> |
40 | #include <arch/asm.h> |
40 | #include <arch/asm.h> |
41 | #include <arch/register.h> |
41 | #include <arch/register.h> |
42 | #include <arch/types.h> |
42 | #include <arch/types.h> |
43 | #include <arch/context.h> |
43 | #include <arch/context.h> |
44 | #include <arch/stack.h> |
44 | #include <arch/stack.h> |
45 | #include <arch/mm/page.h> |
45 | #include <arch/mm/page.h> |
46 | #include <mm/as.h> |
46 | #include <mm/as.h> |
47 | #include <config.h> |
47 | #include <config.h> |
48 | #include <userspace.h> |
48 | #include <userspace.h> |
49 | #include <console/console.h> |
49 | #include <console/console.h> |
50 | #include <proc/uarg.h> |
50 | #include <proc/uarg.h> |
51 | #include <syscall/syscall.h> |
51 | #include <syscall/syscall.h> |
52 | #include <ddi/irq.h> |
52 | #include <ddi/irq.h> |
53 | #include <ddi/device.h> |
53 | #include <ddi/device.h> |
54 | #include <arch/drivers/ega.h> |
54 | #include <arch/drivers/ega.h> |
55 | #include <arch/bootinfo.h> |
55 | #include <arch/bootinfo.h> |
56 | #include <genarch/kbd/i8042.h> |
56 | #include <genarch/kbd/i8042.h> |
57 | #include <genarch/kbd/ns16550.h> |
57 | #include <genarch/kbd/ns16550.h> |
58 | #include <smp/smp.h> |
58 | #include <smp/smp.h> |
59 | #include <smp/ipi.h> |
59 | #include <smp/ipi.h> |
60 | #include <arch/atomic.h> |
60 | #include <arch/atomic.h> |
61 | #include <panic.h> |
61 | #include <panic.h> |
62 | #include <print.h> |
62 | #include <print.h> |
63 | #include <sysinfo/sysinfo.h> |
63 | #include <sysinfo/sysinfo.h> |
64 | 64 | ||
65 | /*NS16550 as a COM 1*/ |
65 | /*NS16550 as a COM 1*/ |
66 | #define NS16550_IRQ (4+LAGACY_INTERRUPT_BASE) |
66 | #define NS16550_IRQ (4+LAGACY_INTERRUPT_BASE) |
67 | #define NS16550_PORT 0x3f8 |
67 | #define NS16550_PORT 0x3f8 |
68 | 68 | ||
69 | bootinfo_t *bootinfo; |
69 | bootinfo_t *bootinfo; |
70 | 70 | ||
71 | static uint64_t iosapic_base=0xfec00000; |
71 | static uint64_t iosapic_base=0xfec00000; |
72 | 72 | ||
73 | void arch_pre_main(void) |
73 | void arch_pre_main(void) |
74 | { |
74 | { |
75 | /* Setup usermode init tasks. */ |
75 | /* Setup usermode init tasks. */ |
76 | 76 | ||
77 | //#ifdef I460GX |
- | |
78 | unsigned int i; |
77 | unsigned int i; |
79 | 78 | ||
80 | init.cnt = bootinfo->taskmap.count; |
79 | init.cnt = bootinfo->taskmap.count; |
81 | 80 | ||
82 | for (i = 0; i < init.cnt; i++) { |
81 | for (i = 0; i < init.cnt; i++) { |
83 | init.tasks[i].addr = ((unsigned long) bootinfo->taskmap.tasks[i].addr) | VRN_MASK; |
82 | init.tasks[i].addr = ((unsigned long) bootinfo->taskmap.tasks[i].addr) | VRN_MASK; |
84 | init.tasks[i].size = bootinfo->taskmap.tasks[i].size; |
83 | init.tasks[i].size = bootinfo->taskmap.tasks[i].size; |
85 | } |
84 | } |
86 | /* |
- | |
87 | #else |
- | |
88 | init.cnt = 8; |
- | |
89 | init.tasks[0].addr = INIT0_ADDRESS; |
- | |
90 | init.tasks[0].size = INIT0_SIZE; |
- | |
91 | init.tasks[1].addr = INIT0_ADDRESS + 0x400000; |
- | |
92 | init.tasks[1].size = INIT0_SIZE; |
- | |
93 | init.tasks[2].addr = INIT0_ADDRESS + 0x800000; |
- | |
94 | init.tasks[2].size = INIT0_SIZE; |
- | |
95 | init.tasks[3].addr = INIT0_ADDRESS + 0xc00000; |
- | |
96 | init.tasks[3].size = INIT0_SIZE; |
- | |
97 | init.tasks[4].addr = INIT0_ADDRESS + 0x1000000; |
- | |
98 | init.tasks[4].size = INIT0_SIZE; |
- | |
99 | init.tasks[5].addr = INIT0_ADDRESS + 0x1400000; |
- | |
100 | init.tasks[5].size = INIT0_SIZE; |
- | |
101 | init.tasks[6].addr = INIT0_ADDRESS + 0x1800000; |
- | |
102 | init.tasks[6].size = INIT0_SIZE; |
- | |
103 | init.tasks[7].addr = INIT0_ADDRESS + 0x1c00000; |
- | |
104 | init.tasks[7].size = INIT0_SIZE; |
- | |
105 | #endif*/ |
- | |
106 | } |
85 | } |
107 | 86 | ||
108 | void arch_pre_mm_init(void) |
87 | void arch_pre_mm_init(void) |
109 | { |
88 | { |
110 | /* Set Interruption Vector Address (i.e. location of interruption vector table). */ |
89 | /* Set Interruption Vector Address (i.e. location of interruption vector table). */ |
111 | iva_write((uintptr_t) &ivt); |
90 | iva_write((uintptr_t) &ivt); |
112 | srlz_d(); |
91 | srlz_d(); |
113 | 92 | ||
114 | } |
93 | } |
115 | 94 | ||
116 | static void iosapic_init(void) |
95 | static void iosapic_init(void) |
117 | { |
96 | { |
118 | 97 | ||
119 | uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base))|FW_OFFSET; |
98 | uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base))|FW_OFFSET; |
120 | int i; |
99 | int i; |
121 | 100 | ||
122 | int myid,myeid; |
101 | int myid,myeid; |
123 | 102 | ||
124 | myid=ia64_get_cpu_id(); |
103 | myid=ia64_get_cpu_id(); |
125 | myeid=ia64_get_cpu_eid(); |
104 | myeid=ia64_get_cpu_eid(); |
126 | 105 | ||
127 | for(i=0;i<16;i++) |
106 | for(i=0;i<16;i++) |
128 | { |
107 | { |
129 | 108 | ||
130 | if(i==2) continue; //Disable Cascade interrupt |
109 | if(i==2) continue; //Disable Cascade interrupt |
131 | ((uint32_t*)(IOSAPIC+0x00))[0]=0x10+2*i; |
110 | ((uint32_t*)(IOSAPIC+0x00))[0]=0x10+2*i; |
132 | srlz_d(); |
111 | srlz_d(); |
133 | ((uint32_t*)(IOSAPIC+0x10))[0]=LAGACY_INTERRUPT_BASE+i; |
112 | ((uint32_t*)(IOSAPIC+0x10))[0]=LAGACY_INTERRUPT_BASE+i; |
134 | srlz_d(); |
113 | srlz_d(); |
135 | ((uint32_t*)(IOSAPIC+0x00))[0]=0x10+2*i+1; |
114 | ((uint32_t*)(IOSAPIC+0x00))[0]=0x10+2*i+1; |
136 | srlz_d(); |
115 | srlz_d(); |
137 | ((uint32_t*)(IOSAPIC+0x10))[0]=myid<<(56-32) | myeid<<(48-32); |
116 | ((uint32_t*)(IOSAPIC+0x10))[0]=myid<<(56-32) | myeid<<(48-32); |
138 | srlz_d(); |
117 | srlz_d(); |
139 | } |
118 | } |
140 | 119 | ||
141 | } |
120 | } |
142 | 121 | ||
143 | 122 | ||
144 | void arch_post_mm_init(void) |
123 | void arch_post_mm_init(void) |
145 | { |
124 | { |
146 | if(config.cpu_active==1) |
125 | if(config.cpu_active==1) |
147 | { |
126 | { |
148 | iosapic_init(); |
127 | iosapic_init(); |
149 | 128 | ||
150 | irq_init(INR_COUNT, INR_COUNT); |
129 | irq_init(INR_COUNT, INR_COUNT); |
151 | #ifdef SKI |
130 | #ifdef SKI |
152 | ski_init_console(); |
131 | ski_init_console(); |
153 | #else |
132 | #else |
154 | ega_init(); |
133 | ega_init(); |
155 | #endif |
134 | #endif |
156 | } |
135 | } |
157 | it_init(); |
136 | it_init(); |
158 | 137 | ||
159 | } |
138 | } |
160 | 139 | ||
161 | void arch_post_cpu_init(void) |
140 | void arch_post_cpu_init(void) |
162 | { |
141 | { |
163 | } |
142 | } |
164 | 143 | ||
165 | void arch_pre_smp_init(void) |
144 | void arch_pre_smp_init(void) |
166 | { |
145 | { |
167 | } |
146 | } |
168 | 147 | ||
169 | 148 | ||
170 | #ifdef I460GX |
149 | #ifdef I460GX |
171 | #define POLL_INTERVAL 50000 /* 50 ms */ |
150 | #define POLL_INTERVAL 50000 /* 50 ms */ |
172 | /** Kernel thread for polling keyboard. */ |
151 | /** Kernel thread for polling keyboard. */ |
173 | static void i8042_kkbdpoll(void *arg) |
152 | static void i8042_kkbdpoll(void *arg) |
174 | { |
153 | { |
175 | while (1) { |
154 | while (1) { |
176 | #ifdef CONFIG_NS16550 |
155 | #ifdef CONFIG_NS16550 |
177 | #ifndef CONFIG_NS16550_INTERRUPT_DRIVEN |
156 | #ifndef CONFIG_NS16550_INTERRUPT_DRIVEN |
178 | ns16550_poll(); |
157 | ns16550_poll(); |
179 | #endif |
158 | #endif |
180 | #else |
159 | #else |
181 | #ifndef CONFIG_I8042_INTERRUPT_DRIVEN |
160 | #ifndef CONFIG_I8042_INTERRUPT_DRIVEN |
182 | i8042_poll(); |
161 | i8042_poll(); |
183 | #endif |
162 | #endif |
184 | #endif |
163 | #endif |
185 | thread_usleep(POLL_INTERVAL); |
164 | thread_usleep(POLL_INTERVAL); |
186 | } |
165 | } |
187 | } |
166 | } |
188 | #endif |
167 | #endif |
189 | 168 | ||
190 | 169 | ||
191 | void end_of_irq_void(void *cir_arg __attribute__((unused)),inr_t inr __attribute__((unused))); |
170 | void end_of_irq_void(void *cir_arg __attribute__((unused)),inr_t inr __attribute__((unused))); |
192 | void end_of_irq_void(void *cir_arg __attribute__((unused)),inr_t inr __attribute__((unused))) |
171 | void end_of_irq_void(void *cir_arg __attribute__((unused)),inr_t inr __attribute__((unused))) |
193 | { |
172 | { |
194 | return; |
173 | return; |
195 | } |
174 | } |
196 | 175 | ||
197 | 176 | ||
198 | void arch_post_smp_init(void) |
177 | void arch_post_smp_init(void) |
199 | { |
178 | { |
200 | 179 | ||
201 | { |
180 | { |
202 | /* |
181 | /* |
203 | * Create thread that polls keyboard. |
182 | * Create thread that polls keyboard. |
204 | */ |
183 | */ |
205 | #ifdef SKI |
184 | #ifdef SKI |
206 | thread_t *t; |
185 | thread_t *t; |
207 | t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true); |
186 | t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true); |
208 | if (!t) |
187 | if (!t) |
209 | panic("cannot create kkbdpoll\n"); |
188 | panic("cannot create kkbdpoll\n"); |
210 | thread_ready(t); |
189 | thread_ready(t); |
211 | #endif |
190 | #endif |
212 | 191 | ||
213 | #ifdef I460GX |
192 | #ifdef I460GX |
214 | devno_t kbd = device_assign_devno(); |
193 | devno_t kbd = device_assign_devno(); |
215 | /* keyboard controller */ |
194 | /* keyboard controller */ |
216 | 195 | ||
217 | #ifdef CONFIG_NS16550 |
196 | #ifdef CONFIG_NS16550 |
218 | ns16550_init(kbd, NS16550_PORT, NS16550_IRQ,end_of_irq_void,NULL); // as a COM 1 |
197 | ns16550_init(kbd, NS16550_PORT, NS16550_IRQ,end_of_irq_void,NULL); // as a COM 1 |
219 | #else |
198 | #else |
220 | devno_t mouse = device_assign_devno(); |
199 | devno_t mouse = device_assign_devno(); |
221 | i8042_init(kbd, IRQ_KBD, mouse, IRQ_MOUSE); |
200 | i8042_init(kbd, IRQ_KBD, mouse, IRQ_MOUSE); |
222 | #endif |
201 | #endif |
223 | thread_t *t; |
202 | thread_t *t; |
224 | t = thread_create(i8042_kkbdpoll, NULL, TASK, 0, "kkbdpoll", true); |
203 | t = thread_create(i8042_kkbdpoll, NULL, TASK, 0, "kkbdpoll", true); |
225 | if (!t) |
204 | if (!t) |
226 | panic("cannot create kkbdpoll\n"); |
205 | panic("cannot create kkbdpoll\n"); |
227 | thread_ready(t); |
206 | thread_ready(t); |
228 | 207 | ||
229 | #endif |
208 | #endif |
230 | 209 | ||
231 | } |
210 | } |
232 | 211 | ||
233 | sysinfo_set_item_val("ia64_iospace", NULL, true); |
212 | sysinfo_set_item_val("ia64_iospace", NULL, true); |
234 | sysinfo_set_item_val("ia64_iospace.address", NULL, true); |
213 | sysinfo_set_item_val("ia64_iospace.address", NULL, true); |
235 | sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET); |
214 | sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET); |
236 | 215 | ||
237 | 216 | ||
238 | 217 | ||
239 | 218 | ||
240 | 219 | ||
241 | } |
220 | } |
242 | 221 | ||
243 | 222 | ||
244 | /** Enter userspace and never return. */ |
223 | /** Enter userspace and never return. */ |
245 | void userspace(uspace_arg_t *kernel_uarg) |
224 | void userspace(uspace_arg_t *kernel_uarg) |
246 | { |
225 | { |
247 | psr_t psr; |
226 | psr_t psr; |
248 | rsc_t rsc; |
227 | rsc_t rsc; |
249 | 228 | ||
250 | psr.value = psr_read(); |
229 | psr.value = psr_read(); |
251 | psr.cpl = PL_USER; |
230 | psr.cpl = PL_USER; |
252 | psr.i = true; /* start with interrupts enabled */ |
231 | psr.i = true; /* start with interrupts enabled */ |
253 | psr.ic = true; |
232 | psr.ic = true; |
254 | psr.ri = 0; /* start with instruction #0 */ |
233 | psr.ri = 0; /* start with instruction #0 */ |
255 | psr.bn = 1; /* start in bank 0 */ |
234 | psr.bn = 1; /* start in bank 0 */ |
256 | 235 | ||
257 | asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value)); |
236 | asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value)); |
258 | rsc.loadrs = 0; |
237 | rsc.loadrs = 0; |
259 | rsc.be = false; |
238 | rsc.be = false; |
260 | rsc.pl = PL_USER; |
239 | rsc.pl = PL_USER; |
261 | rsc.mode = 3; /* eager mode */ |
240 | rsc.mode = 3; /* eager mode */ |
262 | 241 | ||
263 | switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry, |
242 | switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry, |
264 | ((uintptr_t) kernel_uarg->uspace_stack)+PAGE_SIZE-ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT), |
243 | ((uintptr_t) kernel_uarg->uspace_stack)+PAGE_SIZE-ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT), |
265 | ((uintptr_t) kernel_uarg->uspace_stack)+PAGE_SIZE, |
244 | ((uintptr_t) kernel_uarg->uspace_stack)+PAGE_SIZE, |
266 | (uintptr_t) kernel_uarg->uspace_uarg, |
245 | (uintptr_t) kernel_uarg->uspace_uarg, |
267 | psr.value, rsc.value); |
246 | psr.value, rsc.value); |
268 | 247 | ||
269 | while (1) { |
248 | while (1) { |
270 | ; |
249 | ; |
271 | } |
250 | } |
272 | } |
251 | } |
273 | 252 | ||
274 | /** Set thread-local-storage pointer. |
253 | /** Set thread-local-storage pointer. |
275 | * |
254 | * |
276 | * We use r13 (a.k.a. tp) for this purpose. |
255 | * We use r13 (a.k.a. tp) for this purpose. |
277 | */ |
256 | */ |
278 | unative_t sys_tls_set(unative_t addr) |
257 | unative_t sys_tls_set(unative_t addr) |
279 | { |
258 | { |
280 | return 0; |
259 | return 0; |
281 | } |
260 | } |
282 | 261 | ||
283 | /** Acquire console back for kernel |
262 | /** Acquire console back for kernel |
284 | * |
263 | * |
285 | */ |
264 | */ |
286 | void arch_grab_console(void) |
265 | void arch_grab_console(void) |
287 | { |
266 | { |
288 | #ifdef SKI |
267 | #ifdef SKI |
289 | ski_kbd_grab(); |
268 | ski_kbd_grab(); |
290 | #else |
269 | #else |
291 | #ifdef CONFIG_NS16550 |
270 | #ifdef CONFIG_NS16550 |
292 | ns16550_grab(); |
271 | ns16550_grab(); |
293 | #else |
272 | #else |
294 | i8042_grab(); |
273 | i8042_grab(); |
295 | #endif |
274 | #endif |
296 | #endif |
275 | #endif |
297 | } |
276 | } |
298 | /** Return console to userspace |
277 | /** Return console to userspace |
299 | * |
278 | * |
300 | */ |
279 | */ |
301 | void arch_release_console(void) |
280 | void arch_release_console(void) |
302 | { |
281 | { |
303 | #ifdef SKI |
282 | #ifdef SKI |
304 | ski_kbd_release(); |
283 | ski_kbd_release(); |
305 | #else |
284 | #else |
306 | #ifdef CONFIG_NS16550 |
285 | #ifdef CONFIG_NS16550 |
307 | ns16550_release(); |
286 | ns16550_release(); |
308 | #else |
287 | #else |
309 | i8042_release(); |
288 | i8042_release(); |
310 | #endif |
289 | #endif |
311 | 290 | ||
312 | #endif |
291 | #endif |
313 | } |
292 | } |
314 | 293 | ||
315 | void arch_reboot(void) |
294 | void arch_reboot(void) |
316 | { |
295 | { |
317 | outb(0x64,0xfe); |
296 | outb(0x64,0xfe); |
318 | while (1); |
297 | while (1); |
319 | } |
298 | } |
320 | 299 | ||
321 | /** @} |
300 | /** @} |
322 | */ |
301 | */ |
323 | 302 |