WebSVN – HelenOS – Diff – /trunk/kernel/arch/ia64/src/ia64.c


/*
 * Copyright (c) 2005 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup ia64
 * @{
 */
/** @file
 */
 
#include <arch.h>
#include <arch/ski/ski.h>
#include <arch/drivers/it.h>
#include <arch/interrupt.h>
#include <arch/barrier.h>
#include <arch/asm.h>
#include <arch/register.h>
#include <arch/types.h>
#include <arch/context.h>
#include <arch/stack.h>
#include <arch/mm/page.h>
#include <mm/as.h>
#include <config.h>
#include <userspace.h>
#include <console/console.h>
#include <proc/uarg.h>
#include <syscall/syscall.h>
#include <ddi/irq.h>
#include <ddi/device.h>
#include <arch/drivers/ega.h>
#include <arch/bootinfo.h>
#include <genarch/kbd/i8042.h>
#include <genarch/kbd/ns16550.h>
#include <smp/smp.h>
#include <smp/ipi.h>
#include <arch/atomic.h>
#include <panic.h>
#include <print.h>
#include <sysinfo/sysinfo.h>
 
/*NS16550 as a COM 1*/
#define NS16550_IRQ (4+LAGACY_INTERRUPT_BASE)
#define NS16550_PORT 0x3f8
 
bootinfo_t *bootinfo;
 
static uint64_t iosapic_base=0xfec00000;
 
void arch_pre_main(void)
{
    /* Setup usermode init tasks. */
 
//#ifdef I460GX
    unsigned int i;
   
    init.cnt = bootinfo->taskmap.count;
   
    for (i = 0; i < init.cnt; i++) {
        init.tasks[i].addr = ((unsigned long) bootinfo->taskmap.tasks[i].addr) | VRN_MASK;
        init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
    }
/*
#else  
    init.cnt = 8;
    init.tasks[0].addr = INIT0_ADDRESS;
    init.tasks[0].size = INIT0_SIZE;
    init.tasks[1].addr = INIT0_ADDRESS + 0x400000;
    init.tasks[1].size = INIT0_SIZE;
    init.tasks[2].addr = INIT0_ADDRESS + 0x800000;
    init.tasks[2].size = INIT0_SIZE;
    init.tasks[3].addr = INIT0_ADDRESS + 0xc00000;
    init.tasks[3].size = INIT0_SIZE;
    init.tasks[4].addr = INIT0_ADDRESS + 0x1000000;
    init.tasks[4].size = INIT0_SIZE;
    init.tasks[5].addr = INIT0_ADDRESS + 0x1400000;
    init.tasks[5].size = INIT0_SIZE;
    init.tasks[6].addr = INIT0_ADDRESS + 0x1800000;
    init.tasks[6].size = INIT0_SIZE;
    init.tasks[7].addr = INIT0_ADDRESS + 0x1c00000;
    init.tasks[7].size = INIT0_SIZE;
#endif*/
}
 
void arch_pre_mm_init(void)
{
    /* Set Interruption Vector Address (i.e. location of interruption vector table). */
    iva_write((uintptr_t) &ivt);
    srlz_d();
   
}
 
static void iosapic_init(void)
{
 
    uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base))|FW_OFFSET;
    int i;
   
    int myid,myeid;
   
    myid=ia64_get_cpu_id();
    myeid=ia64_get_cpu_eid();
 
    for(i=0;i<16;i++)
    {
   
        if(i==2) continue;   //Disable Cascade interrupt
        ((uint32_t*)(IOSAPIC+0x00))[0]=0x10+2*i;
        srlz_d();
        ((uint32_t*)(IOSAPIC+0x10))[0]=LAGACY_INTERRUPT_BASE+i;
        srlz_d();
        ((uint32_t*)(IOSAPIC+0x00))[0]=0x10+2*i+1;
        srlz_d();
        ((uint32_t*)(IOSAPIC+0x10))[0]=myid<<(56-32) | myeid<<(48-32);
        srlz_d();
    }
 
}
 
 
void arch_post_mm_init(void)
{
    if(config.cpu_active==1)
    {
        iosapic_init();
   
        irq_init(INR_COUNT, INR_COUNT);
#ifdef SKI
        ski_init_console();
#else   
        ega_init();
#endif  
    }
    it_init();
       
}
 
void arch_post_cpu_init(void)
{
}
 
void arch_pre_smp_init(void)
{
}
 
 
#ifdef I460GX
#define POLL_INTERVAL       50000       /* 50 ms */
/** Kernel thread for polling keyboard. */
static void i8042_kkbdpoll(void *arg)
{
    while (1) {
 
#ifdef CONFIG_NS16550
    #ifndef CONFIG_NS16550_INTERRUPT_DRIVEN
        ns16550_poll();
    #endif  
#else
    #ifndef CONFIG_I8042_INTERRUPT_DRIVEN
        i8042_poll();
    #endif  
#endif
        thread_usleep(POLL_INTERVAL);
    }
}
#endif
 
 
void end_of_irq_void(void *cir_arg __attribute__((unused)),inr_t inr __attribute__((unused)));
void end_of_irq_void(void *cir_arg __attribute__((unused)),inr_t inr __attribute__((unused)))
{
    return;
}
 
 
void arch_post_smp_init(void)
{
 
    {
        /*
         * Create thread that polls keyboard.
         */
#ifdef SKI
        thread_t *t;
        t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
        if (!t)
            panic("cannot create kkbdpoll\n");
        thread_ready(t);
#endif      
 
#ifdef I460GX
        devno_t kbd = device_assign_devno();
 
        /* keyboard controller */
 
 
#ifdef CONFIG_NS16550
        ns16550_init(kbd, NS16550_PORT, NS16550_IRQ,end_of_irq_void,NULL); // as a COM 1
#else
        devno_t mouse = device_assign_devno();
        i8042_init(kbd, IRQ_KBD, mouse, IRQ_MOUSE);
#endif
        thread_t *t;
        t = thread_create(i8042_kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
        if (!t)
            panic("cannot create kkbdpoll\n");
        thread_ready(t);
 
#endif
 
    }
   
    sysinfo_set_item_val("ia64_iospace", NULL, true);
    sysinfo_set_item_val("ia64_iospace.address", NULL, true);
    sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET);
 
 
 
 
 
}
 
 
/** Enter userspace and never return. */
void userspace(uspace_arg_t *kernel_uarg)
{
    psr_t psr;
    rsc_t rsc;
 
    psr.value = psr_read();
    psr.cpl = PL_USER;
    psr.i = true;               /* start with interrupts enabled */
    psr.ic = true;
    psr.ri = 0;             /* start with instruction #0 */
    psr.bn = 1;             /* start in bank 0 */
 
    asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
    rsc.loadrs = 0;
    rsc.be = false;
    rsc.pl = PL_USER;
    rsc.mode = 3;               /* eager mode */
 
    switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
                ((uintptr_t) kernel_uarg->uspace_stack)+PAGE_SIZE-ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
                ((uintptr_t) kernel_uarg->uspace_stack)+PAGE_SIZE,
                (uintptr_t) kernel_uarg->uspace_uarg,
                psr.value, rsc.value);
 
    while (1) {
        ;
    }
}
 
/** Set thread-local-storage pointer.
 *
 * We use r13 (a.k.a. tp) for this purpose.
 */
unative_t sys_tls_set(unative_t addr)
{
        return 0;
}
 
/** Acquire console back for kernel
 *
 */
void arch_grab_console(void)
{
#ifdef SKI
    ski_kbd_grab();
#else
 
    #ifdef CONFIG_NS16550
        ns16550_grab();
    #else
        i8042_grab();
    #endif  
 
#endif  
}
/** Return console to userspace
 *
 */
void arch_release_console(void)
{
#ifdef SKI
    ski_kbd_release();
 
#else   
    #ifdef CONFIG_NS16550
        ns16550_release();
    #else   
        i8042_release();
    #endif  
 
#endif
}
 
void arch_reboot(void)
{
    outb(0x64,0xfe);
    while (1);
}
 
/** @}
 */
 

Rev 3659	Rev 3661
1	/*	1	/*
2	* Copyright (c) 2005 Jakub Jermar	2	* Copyright (c) 2005 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup ia64	29	/** @addtogroup ia64
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35	#include <arch.h>	35	#include <arch.h>
36	#include <arch/ski/ski.h>	36	#include <arch/ski/ski.h>
37	#include <arch/drivers/it.h>	37	#include <arch/drivers/it.h>
38	#include <arch/interrupt.h>	38	#include <arch/interrupt.h>
39	#include <arch/barrier.h>	39	#include <arch/barrier.h>
40	#include <arch/asm.h>	40	#include <arch/asm.h>
41	#include <arch/register.h>	41	#include <arch/register.h>
42	#include <arch/types.h>	42	#include <arch/types.h>
43	#include <arch/context.h>	43	#include <arch/context.h>
44	#include <arch/stack.h>	44	#include <arch/stack.h>
45	#include <arch/mm/page.h>	45	#include <arch/mm/page.h>
46	#include <mm/as.h>	46	#include <mm/as.h>
47	#include <config.h>	47	#include <config.h>
48	#include <userspace.h>	48	#include <userspace.h>
49	#include <console/console.h>	49	#include <console/console.h>
50	#include <proc/uarg.h>	50	#include <proc/uarg.h>
51	#include <syscall/syscall.h>	51	#include <syscall/syscall.h>
52	#include <ddi/irq.h>	52	#include <ddi/irq.h>
53	#include <ddi/device.h>	53	#include <ddi/device.h>
54	#include <arch/drivers/ega.h>	54	#include <arch/drivers/ega.h>
55	#include <arch/bootinfo.h>	55	#include <arch/bootinfo.h>
56	#include <genarch/kbd/i8042.h>	56	#include <genarch/kbd/i8042.h>
57	#include <genarch/kbd/ns16550.h>	57	#include <genarch/kbd/ns16550.h>
58	#include <smp/smp.h>	58	#include <smp/smp.h>
59	#include <smp/ipi.h>	59	#include <smp/ipi.h>
60	#include <arch/atomic.h>	60	#include <arch/atomic.h>
61	#include <panic.h>	61	#include <panic.h>
62	#include <print.h>	62	#include <print.h>
63	#include <sysinfo/sysinfo.h>	63	#include <sysinfo/sysinfo.h>
64		64
65	/NS16550 as a COM 1/	65	/NS16550 as a COM 1/
66	#define NS16550_IRQ (4+LAGACY_INTERRUPT_BASE)	66	#define NS16550_IRQ (4+LAGACY_INTERRUPT_BASE)
67	#define NS16550_PORT 0x3f8	67	#define NS16550_PORT 0x3f8
68		68
69	bootinfo_t *bootinfo;	69	bootinfo_t *bootinfo;
70		70
71	static uint64_t iosapic_base=0xfec00000;	71	static uint64_t iosapic_base=0xfec00000;
72		72
73	void arch_pre_main(void)	73	void arch_pre_main(void)
74	{	74	{
75	/* Setup usermode init tasks. */	75	/* Setup usermode init tasks. */
76		76
77	//#ifdef I460GX	77	//#ifdef I460GX
78	unsigned int i;	78	unsigned int i;
79		79
80	init.cnt = bootinfo->taskmap.count;	80	init.cnt = bootinfo->taskmap.count;
81		81
82	for (i = 0; i < init.cnt; i++) {	82	for (i = 0; i < init.cnt; i++) {
83	init.tasks[i].addr = ((unsigned long) bootinfo->taskmap.tasks[i].addr) \| VRN_MASK;	83	init.tasks[i].addr = ((unsigned long) bootinfo->taskmap.tasks[i].addr) \| VRN_MASK;
84	init.tasks[i].size = bootinfo->taskmap.tasks[i].size;	84	init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
85	}	85	}
86	/*	86	/*
87	#else	87	#else
88	init.cnt = 8;	88	init.cnt = 8;
89	init.tasks[0].addr = INIT0_ADDRESS;	89	init.tasks[0].addr = INIT0_ADDRESS;
90	init.tasks[0].size = INIT0_SIZE;	90	init.tasks[0].size = INIT0_SIZE;
91	init.tasks[1].addr = INIT0_ADDRESS + 0x400000;	91	init.tasks[1].addr = INIT0_ADDRESS + 0x400000;
92	init.tasks[1].size = INIT0_SIZE;	92	init.tasks[1].size = INIT0_SIZE;
93	init.tasks[2].addr = INIT0_ADDRESS + 0x800000;	93	init.tasks[2].addr = INIT0_ADDRESS + 0x800000;
94	init.tasks[2].size = INIT0_SIZE;	94	init.tasks[2].size = INIT0_SIZE;
95	init.tasks[3].addr = INIT0_ADDRESS + 0xc00000;	95	init.tasks[3].addr = INIT0_ADDRESS + 0xc00000;
96	init.tasks[3].size = INIT0_SIZE;	96	init.tasks[3].size = INIT0_SIZE;
97	init.tasks[4].addr = INIT0_ADDRESS + 0x1000000;	97	init.tasks[4].addr = INIT0_ADDRESS + 0x1000000;
98	init.tasks[4].size = INIT0_SIZE;	98	init.tasks[4].size = INIT0_SIZE;
99	init.tasks[5].addr = INIT0_ADDRESS + 0x1400000;	99	init.tasks[5].addr = INIT0_ADDRESS + 0x1400000;
100	init.tasks[5].size = INIT0_SIZE;	100	init.tasks[5].size = INIT0_SIZE;
101	init.tasks[6].addr = INIT0_ADDRESS + 0x1800000;	101	init.tasks[6].addr = INIT0_ADDRESS + 0x1800000;
102	init.tasks[6].size = INIT0_SIZE;	102	init.tasks[6].size = INIT0_SIZE;
103	init.tasks[7].addr = INIT0_ADDRESS + 0x1c00000;	103	init.tasks[7].addr = INIT0_ADDRESS + 0x1c00000;
104	init.tasks[7].size = INIT0_SIZE;	104	init.tasks[7].size = INIT0_SIZE;
105	#endif*/	105	#endif*/
106	}	106	}
107		107
108	void arch_pre_mm_init(void)	108	void arch_pre_mm_init(void)
109	{	109	{
110	/* Set Interruption Vector Address (i.e. location of interruption vector table). */	110	/* Set Interruption Vector Address (i.e. location of interruption vector table). */
111	iva_write((uintptr_t) &ivt);	111	iva_write((uintptr_t) &ivt);
112	srlz_d();	112	srlz_d();
113		113
114	}	114	}
115		115
116	static void iosapic_init(void)	116	static void iosapic_init(void)
117	{	117	{
118		118
119	uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base))\|FW_OFFSET;	119	uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base))\|FW_OFFSET;
120	int i;	120	int i;
121		121
-		122	int myid,myeid;
122		123
-		124	myid=ia64_get_cpu_id();
-		125	myeid=ia64_get_cpu_eid();
-		126
123	for(i=0;i<16;i++)	127	for(i=0;i<16;i++)
124	{	128	{
125		129
126	if(i==2) continue; //Disable Cascade interrupt	130	if(i==2) continue; //Disable Cascade interrupt
127	((uint32_t)(IOSAPIC+0x00))[0]=0x10+2i;	131	((uint32_t)(IOSAPIC+0x00))[0]=0x10+2i;
128	srlz_d();	132	srlz_d();
129	((uint32_t*)(IOSAPIC+0x10))[0]=LAGACY_INTERRUPT_BASE+i;	133	((uint32_t*)(IOSAPIC+0x10))[0]=LAGACY_INTERRUPT_BASE+i;
130	srlz_d();	134	srlz_d();
131	((uint32_t)(IOSAPIC+0x00))[0]=0x10+2i+1;	135	((uint32_t)(IOSAPIC+0x00))[0]=0x10+2i+1;
132	srlz_d();	136	srlz_d();
133	((uint32_t*)(IOSAPIC+0x10))[0]=1<<(56-32);	137	((uint32_t*)(IOSAPIC+0x10))[0]=myid<<(56-32) \| myeid<<(48-32);
134	srlz_d();	138	srlz_d();
135	}	139	}
136		140
137	}	141	}
138		142
139		143
140	void arch_post_mm_init(void)	144	void arch_post_mm_init(void)
141	{	145	{
142	if(config.cpu_active==1)	146	if(config.cpu_active==1)
143	{	147	{
144	iosapic_init();	148	iosapic_init();
145		149
146	irq_init(INR_COUNT, INR_COUNT);	150	irq_init(INR_COUNT, INR_COUNT);
147	#ifdef SKI	151	#ifdef SKI
148	ski_init_console();	152	ski_init_console();
149	#else	153	#else
150	ega_init();	154	ega_init();
151	#endif	155	#endif
152	}	156	}
153	it_init();	157	it_init();
154		158
155	}	159	}
156		160
157	void arch_post_cpu_init(void)	161	void arch_post_cpu_init(void)
158	{	162	{
159	}	163	}
160		164
161	void arch_pre_smp_init(void)	165	void arch_pre_smp_init(void)
162	{	166	{
163	}	167	}
164		168
165		169
166	#ifdef I460GX	170	#ifdef I460GX
167	#define POLL_INTERVAL 50000 /* 50 ms */	171	#define POLL_INTERVAL 50000 /* 50 ms */
168	/** Kernel thread for polling keyboard. */	172	/** Kernel thread for polling keyboard. */
169	static void i8042_kkbdpoll(void *arg)	173	static void i8042_kkbdpoll(void *arg)
170	{	174	{
171	while (1) {	175	while (1) {
172	i8042_poll();	-
173	#ifdef CONFIG_NS16550	176	#ifdef CONFIG_NS16550
174	#ifndef CONFIG_NS16550_INTERRUPT_DRIVEN	177	#ifndef CONFIG_NS16550_INTERRUPT_DRIVEN
175	ns16550_poll();	178	ns16550_poll();
176	#endif	179	#endif
-		180	#else
-		181	#ifndef CONFIG_I8042_INTERRUPT_DRIVEN
-		182	i8042_poll();
-		183	#endif
177	#endif	184	#endif
178	thread_usleep(POLL_INTERVAL);	185	thread_usleep(POLL_INTERVAL);
179	}	186	}
180	}	187	}
181	#endif	188	#endif
182		189
183		190
-		191	void end_of_irq_void(void *cir_arg __attribute__((unused)),inr_t inr __attribute__((unused)));
184	static void end_of_irq_void(void *cir_arg __attribute__((unused)),inr_t inr __attribute__((unused)))	192	void end_of_irq_void(void *cir_arg __attribute__((unused)),inr_t inr __attribute__((unused)))
185	{	193	{
186	return;	194	return;
187	}	195	}
188		196
189		197
190	void arch_post_smp_init(void)	198	void arch_post_smp_init(void)
191	{	199	{
192		200
193	{	201	{
194	/*	202	/*
195	* Create thread that polls keyboard.	203	* Create thread that polls keyboard.
196	*/	204	*/
197	#ifdef SKI	205	#ifdef SKI
198	thread_t *t;	206	thread_t *t;
199	t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);	207	t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
200	if (!t)	208	if (!t)
201	panic("cannot create kkbdpoll\n");	209	panic("cannot create kkbdpoll\n");
202	thread_ready(t);	210	thread_ready(t);
203	#endif	211	#endif
204		212
205	#ifdef I460GX	213	#ifdef I460GX
206	devno_t kbd = device_assign_devno();	214	devno_t kbd = device_assign_devno();
207	devno_t mouse = device_assign_devno();	-
208	/* keyboard controller */	215	/* keyboard controller */
209	i8042_init(kbd, IRQ_KBD, mouse, IRQ_MOUSE);	-
210		216
211	#ifdef CONFIG_NS16550	217	#ifdef CONFIG_NS16550
212	ns16550_init(kbd, NS16550_PORT, NS16550_IRQ,end_of_irq_void,NULL); // as a COM 1	218	ns16550_init(kbd, NS16550_PORT, NS16550_IRQ,end_of_irq_void,NULL); // as a COM 1
213	#else	219	#else
-		220	devno_t mouse = device_assign_devno();
-		221	i8042_init(kbd, IRQ_KBD, mouse, IRQ_MOUSE);
214	#endif	222	#endif
215	thread_t *t;	223	thread_t *t;
216	t = thread_create(i8042_kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);	224	t = thread_create(i8042_kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
217	if (!t)	225	if (!t)
218	panic("cannot create kkbdpoll\n");	226	panic("cannot create kkbdpoll\n");
219	thread_ready(t);	227	thread_ready(t);
220		228
221	#endif	229	#endif
222		230
223	}	231	}
224		232
225	sysinfo_set_item_val("ia64_iospace", NULL, true);	233	sysinfo_set_item_val("ia64_iospace", NULL, true);
226	sysinfo_set_item_val("ia64_iospace.address", NULL, true);	234	sysinfo_set_item_val("ia64_iospace.address", NULL, true);
227	sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET);	235	sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET);
228		236
229		237
230		238
231		239
232		240
233	}	241	}
234		242
235		243
236	/** Enter userspace and never return. */	244	/** Enter userspace and never return. */
237	void userspace(uspace_arg_t *kernel_uarg)	245	void userspace(uspace_arg_t *kernel_uarg)
238	{	246	{
239	psr_t psr;	247	psr_t psr;
240	rsc_t rsc;	248	rsc_t rsc;
241		249
242	psr.value = psr_read();	250	psr.value = psr_read();
243	psr.cpl = PL_USER;	251	psr.cpl = PL_USER;
244	psr.i = true; /* start with interrupts enabled */	252	psr.i = true; /* start with interrupts enabled */
245	psr.ic = true;	253	psr.ic = true;
246	psr.ri = 0; /* start with instruction #0 */	254	psr.ri = 0; /* start with instruction #0 */
247	psr.bn = 1; /* start in bank 0 */	255	psr.bn = 1; /* start in bank 0 */
248		256
249	asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));	257	asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
250	rsc.loadrs = 0;	258	rsc.loadrs = 0;
251	rsc.be = false;	259	rsc.be = false;
252	rsc.pl = PL_USER;	260	rsc.pl = PL_USER;
253	rsc.mode = 3; /* eager mode */	261	rsc.mode = 3; /* eager mode */
254		262
255	switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,	263	switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
256	((uintptr_t) kernel_uarg->uspace_stack)+PAGE_SIZE-ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),	264	((uintptr_t) kernel_uarg->uspace_stack)+PAGE_SIZE-ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
257	((uintptr_t) kernel_uarg->uspace_stack)+PAGE_SIZE,	265	((uintptr_t) kernel_uarg->uspace_stack)+PAGE_SIZE,
258	(uintptr_t) kernel_uarg->uspace_uarg,	266	(uintptr_t) kernel_uarg->uspace_uarg,
259	psr.value, rsc.value);	267	psr.value, rsc.value);
260		268
261	while (1) {	269	while (1) {
262	;	270	;
263	}	271	}
264	}	272	}
265		273
266	/** Set thread-local-storage pointer.	274	/** Set thread-local-storage pointer.
267	*	275	*
268	* We use r13 (a.k.a. tp) for this purpose.	276	* We use r13 (a.k.a. tp) for this purpose.
269	*/	277	*/
270	unative_t sys_tls_set(unative_t addr)	278	unative_t sys_tls_set(unative_t addr)
271	{	279	{
272	return 0;	280	return 0;
273	}	281	}
274		282
275	/** Acquire console back for kernel	283	/** Acquire console back for kernel
276	*	284	*
277	*/	285	*/
278	void arch_grab_console(void)	286	void arch_grab_console(void)
279	{	287	{
280	#ifdef SKI	288	#ifdef SKI
281	ski_kbd_grab();	289	ski_kbd_grab();
282	#else	290	#else
283	i8042_grab();	-
284	#ifdef CONFIG_NS16550	291	#ifdef CONFIG_NS16550
285	ns16550_grab();	292	ns16550_grab();
-		293	#else
-		294	i8042_grab();
286	#endif	295	#endif
287		-
288	#endif	296	#endif
289	}	297	}
290	/** Return console to userspace	298	/** Return console to userspace
291	*	299	*
292	*/	300	*/
293	void arch_release_console(void)	301	void arch_release_console(void)
294	{	302	{
295	#ifdef SKI	303	#ifdef SKI
296	ski_kbd_release();	304	ski_kbd_release();
297	i8042_release();	-
298	#else	305	#else
299	#ifdef CONFIG_NS16550	306	#ifdef CONFIG_NS16550
300	ns16550_release();	307	ns16550_release();
-		308	#else
-		309	i8042_release();
301	#endif	310	#endif
302		311
303	#endif	312	#endif
304	}	313	}
305		314
306	void arch_reboot(void)	315	void arch_reboot(void)
307	{	316	{
308	outb(0x64,0xfe);	317	outb(0x64,0xfe);
309	while (1);	318	while (1);
310	}	319	}
311		320
312	/** @}	321	/** @}
313	*/	322	*/
314		323

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(root)/trunk/kernel/arch/ia64/src/ia64.c – Rev 3659 → 3661