WebSVN – HelenOS – Diff – /trunk/kernel/arch/ia64/src/ia64.c


/*
 * Copyright (c) 2005 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup ia64
 * @{
 */
/** @file
 */
 
#include <arch.h>
#include <arch/ski/ski.h>
#include <arch/drivers/it.h>
#include <arch/interrupt.h>
#include <arch/barrier.h>
#include <arch/asm.h>
#include <arch/register.h>
#include <arch/types.h>
#include <arch/context.h>
#include <arch/stack.h>
#include <arch/mm/page.h>
#include <mm/as.h>
#include <config.h>
#include <userspace.h>
#include <console/console.h>
#include <proc/uarg.h>
#include <syscall/syscall.h>
#include <ddi/irq.h>
#include <ddi/device.h>
#include <arch/drivers/ega.h>
#include <arch/bootinfo.h>
#include <genarch/kbd/i8042.h>
#include <genarch/kbd/ns16550.h>
#include <smp/smp.h>
#include <smp/ipi.h>
#include <arch/atomic.h>
#include <panic.h>
#include <print.h>
#include <sysinfo/sysinfo.h>
 
/*NS16550 as a COM 1*/
#define NS16550_IRQ (4+LAGACY_INTERRUPT_BASE)
#define NS16550_PORT 0x3f8
 
bootinfo_t *bootinfo;
 
static uint64_t iosapic_base=0xfec00000;
 
void arch_pre_main(void)
{
    /* Setup usermode init tasks. */
 
//#ifdef I460GX
    unsigned int i;
   
    init.cnt = bootinfo->taskmap.count;
   
    for (i = 0; i < init.cnt; i++) {
        init.tasks[i].addr = ((unsigned long) bootinfo->taskmap.tasks[i].addr) | VRN_MASK;
        init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
    }
/*
#else  
    init.cnt = 8;
    init.tasks[0].addr = INIT0_ADDRESS;
    init.tasks[0].size = INIT0_SIZE;
    init.tasks[1].addr = INIT0_ADDRESS + 0x400000;
    init.tasks[1].size = INIT0_SIZE;
    init.tasks[2].addr = INIT0_ADDRESS + 0x800000;
    init.tasks[2].size = INIT0_SIZE;
    init.tasks[3].addr = INIT0_ADDRESS + 0xc00000;
    init.tasks[3].size = INIT0_SIZE;
    init.tasks[4].addr = INIT0_ADDRESS + 0x1000000;
    init.tasks[4].size = INIT0_SIZE;
    init.tasks[5].addr = INIT0_ADDRESS + 0x1400000;
    init.tasks[5].size = INIT0_SIZE;
    init.tasks[6].addr = INIT0_ADDRESS + 0x1800000;
    init.tasks[6].size = INIT0_SIZE;
    init.tasks[7].addr = INIT0_ADDRESS + 0x1c00000;
    init.tasks[7].size = INIT0_SIZE;
#endif*/
}
 
void arch_pre_mm_init(void)
{
    /* Set Interruption Vector Address (i.e. location of interruption vector table). */
    iva_write((uintptr_t) &ivt);
    srlz_d();
   
}
 
static void iosapic_init(void)
{
 
    uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base))|FW_OFFSET;
    int i;
   
   
    for(i=0;i<16;i++)
    {
   
        if(i==2) continue;   //Disable Cascade interrupt
        ((uint32_t*)(IOSAPIC+0x00))[0]=0x10+2*i;
        srlz_d();
        ((uint32_t*)(IOSAPIC+0x10))[0]=LAGACY_INTERRUPT_BASE+i;
        srlz_d();
        ((uint32_t*)(IOSAPIC+0x00))[0]=0x10+2*i+1;
        srlz_d();
        ((uint32_t*)(IOSAPIC+0x10))[0]=1<<(56-32);
        srlz_d();
    }
 
}
 
 
void arch_post_mm_init(void)
{
    if(config.cpu_active==1)
    {
        iosapic_init();
   
        irq_init(INR_COUNT, INR_COUNT);
#ifdef SKI
        ski_init_console();
#else   
        ega_init();
#endif  
    }
    it_init();
       
}
 
void arch_post_cpu_init(void)
{
}
 
void arch_pre_smp_init(void)
{
}
 
 
#ifdef I460GX
#define POLL_INTERVAL       50000       /* 50 ms */
/** Kernel thread for polling keyboard. */
static void i8042_kkbdpoll(void *arg)
{
    while (1) {
        i8042_poll();
#ifdef CONFIG_NS16550
    #ifndef CONFIG_NS16550_INTERRUPT_DRIVEN
        ns16550_poll();
    #endif  
#endif
        thread_usleep(POLL_INTERVAL);
    }
}
#endif
 
 
static void end_of_irq_void(void *cir_arg __attribute__((unused)),inr_t inr __attribute__((unused)))
{
    return;
}
 
 
void arch_post_smp_init(void)
{
 
    {
        /*
         * Create thread that polls keyboard.
         */
#ifdef SKI
        thread_t *t;
        t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
        if (!t)
            panic("cannot create kkbdpoll\n");
        thread_ready(t);
#endif      
 
#ifdef I460GX
        devno_t kbd = device_assign_devno();
        devno_t mouse = device_assign_devno();
        /* keyboard controller */
        i8042_init(kbd, IRQ_KBD, mouse, IRQ_MOUSE);
 
#ifdef CONFIG_NS16550
        ns16550_init(kbd, NS16550_IRQ, NS16550_PORT,end_of_irq_void,NULL); // as a COM 1
#else
#endif
        thread_t *t;
        t = thread_create(i8042_kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
        if (!t)
            panic("cannot create kkbdpoll\n");
        thread_ready(t);
 
#endif
 
    }
   
    sysinfo_set_item_val("ia64_iospace", NULL, true);
    sysinfo_set_item_val("ia64_iospace.address", NULL, true);
    sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET);
 
 
 
 
 
}
 
 
/** Enter userspace and never return. */
void userspace(uspace_arg_t *kernel_uarg)
{
    psr_t psr;
    rsc_t rsc;
 
    psr.value = psr_read();
    psr.cpl = PL_USER;
    psr.i = true;               /* start with interrupts enabled */
    psr.ic = true;
    psr.ri = 0;             /* start with instruction #0 */
    psr.bn = 1;             /* start in bank 0 */
 
    asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
    rsc.loadrs = 0;
    rsc.be = false;
    rsc.pl = PL_USER;
    rsc.mode = 3;               /* eager mode */
 
    switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
                ((uintptr_t) kernel_uarg->uspace_stack)+PAGE_SIZE-ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
                ((uintptr_t) kernel_uarg->uspace_stack)+PAGE_SIZE,
                (uintptr_t) kernel_uarg->uspace_uarg,
                psr.value, rsc.value);
 
    while (1) {
        ;
    }
}
 
/** Set thread-local-storage pointer.
 *
 * We use r13 (a.k.a. tp) for this purpose.
 */
unative_t sys_tls_set(unative_t addr)
{
        return 0;
}
 
/** Acquire console back for kernel
 *
 */
void arch_grab_console(void)
{
#ifdef SKI
    ski_kbd_grab();
#else
    i8042_grab();
    #ifdef CONFIG_NS16550
        ns16550_grab();
    #endif  
       
#endif  
}
/** Return console to userspace
 *
 */
void arch_release_console(void)
{
#ifdef SKI
    ski_kbd_release();
    i8042_release();
#else   
    #ifdef CONFIG_NS16550
        ns16550_release();
    #endif  
 
#endif
}
 
void arch_reboot(void)
{
    outb(0x64,0xfe);
    while (1);
}
 
/** @}
 */
 

Rev 3635	Rev 3657
1	/*	1	/*
2	* Copyright (c) 2005 Jakub Jermar	2	* Copyright (c) 2005 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup ia64	29	/** @addtogroup ia64
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35	#include <arch.h>	35	#include <arch.h>
36	#include <arch/ski/ski.h>	36	#include <arch/ski/ski.h>
37	#include <arch/drivers/it.h>	37	#include <arch/drivers/it.h>
38	#include <arch/interrupt.h>	38	#include <arch/interrupt.h>
39	#include <arch/barrier.h>	39	#include <arch/barrier.h>
40	#include <arch/asm.h>	40	#include <arch/asm.h>
41	#include <arch/register.h>	41	#include <arch/register.h>
42	#include <arch/types.h>	42	#include <arch/types.h>
43	#include <arch/context.h>	43	#include <arch/context.h>
44	#include <arch/stack.h>	44	#include <arch/stack.h>
45	#include <arch/mm/page.h>	45	#include <arch/mm/page.h>
46	#include <mm/as.h>	46	#include <mm/as.h>
47	#include <config.h>	47	#include <config.h>
48	#include <userspace.h>	48	#include <userspace.h>
49	#include <console/console.h>	49	#include <console/console.h>
50	#include <proc/uarg.h>	50	#include <proc/uarg.h>
51	#include <syscall/syscall.h>	51	#include <syscall/syscall.h>
52	#include <ddi/irq.h>	52	#include <ddi/irq.h>
53	#include <ddi/device.h>	53	#include <ddi/device.h>
54	#include <arch/drivers/ega.h>	54	#include <arch/drivers/ega.h>
55	#include <arch/bootinfo.h>	55	#include <arch/bootinfo.h>
56	#include <genarch/kbd/i8042.h>	56	#include <genarch/kbd/i8042.h>
57	#include <genarch/kbd/ns16550.h>	57	#include <genarch/kbd/ns16550.h>
58	#include <smp/smp.h>	58	#include <smp/smp.h>
59	#include <smp/ipi.h>	59	#include <smp/ipi.h>
60	#include <arch/atomic.h>	60	#include <arch/atomic.h>
61	#include <panic.h>	61	#include <panic.h>
62	#include <print.h>	62	#include <print.h>
63	#include <sysinfo/sysinfo.h>	63	#include <sysinfo/sysinfo.h>
64		64
65	/NS16550 as a COM 1/	65	/NS16550 as a COM 1/
66	#define NS16550_IRQ 4	66	#define NS16550_IRQ (4+LAGACY_INTERRUPT_BASE)
67	#define NS16550_PORT 0x3f8	67	#define NS16550_PORT 0x3f8
68		68
69	bootinfo_t *bootinfo;	69	bootinfo_t *bootinfo;
70		70
-		71	static uint64_t iosapic_base=0xfec00000;
-		72
71	void arch_pre_main(void)	73	void arch_pre_main(void)
72	{	74	{
73	/* Setup usermode init tasks. */	75	/* Setup usermode init tasks. */
74		76
75	//#ifdef I460GX	77	//#ifdef I460GX
76	unsigned int i;	78	unsigned int i;
77		79
78	init.cnt = bootinfo->taskmap.count;	80	init.cnt = bootinfo->taskmap.count;
79		81
80	for (i = 0; i < init.cnt; i++) {	82	for (i = 0; i < init.cnt; i++) {
81	init.tasks[i].addr = ((unsigned long) bootinfo->taskmap.tasks[i].addr) \| VRN_MASK;	83	init.tasks[i].addr = ((unsigned long) bootinfo->taskmap.tasks[i].addr) \| VRN_MASK;
82	init.tasks[i].size = bootinfo->taskmap.tasks[i].size;	84	init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
83	}	85	}
84	/*	86	/*
85	#else	87	#else
86	init.cnt = 8;	88	init.cnt = 8;
87	init.tasks[0].addr = INIT0_ADDRESS;	89	init.tasks[0].addr = INIT0_ADDRESS;
88	init.tasks[0].size = INIT0_SIZE;	90	init.tasks[0].size = INIT0_SIZE;
89	init.tasks[1].addr = INIT0_ADDRESS + 0x400000;	91	init.tasks[1].addr = INIT0_ADDRESS + 0x400000;
90	init.tasks[1].size = INIT0_SIZE;	92	init.tasks[1].size = INIT0_SIZE;
91	init.tasks[2].addr = INIT0_ADDRESS + 0x800000;	93	init.tasks[2].addr = INIT0_ADDRESS + 0x800000;
92	init.tasks[2].size = INIT0_SIZE;	94	init.tasks[2].size = INIT0_SIZE;
93	init.tasks[3].addr = INIT0_ADDRESS + 0xc00000;	95	init.tasks[3].addr = INIT0_ADDRESS + 0xc00000;
94	init.tasks[3].size = INIT0_SIZE;	96	init.tasks[3].size = INIT0_SIZE;
95	init.tasks[4].addr = INIT0_ADDRESS + 0x1000000;	97	init.tasks[4].addr = INIT0_ADDRESS + 0x1000000;
96	init.tasks[4].size = INIT0_SIZE;	98	init.tasks[4].size = INIT0_SIZE;
97	init.tasks[5].addr = INIT0_ADDRESS + 0x1400000;	99	init.tasks[5].addr = INIT0_ADDRESS + 0x1400000;
98	init.tasks[5].size = INIT0_SIZE;	100	init.tasks[5].size = INIT0_SIZE;
99	init.tasks[6].addr = INIT0_ADDRESS + 0x1800000;	101	init.tasks[6].addr = INIT0_ADDRESS + 0x1800000;
100	init.tasks[6].size = INIT0_SIZE;	102	init.tasks[6].size = INIT0_SIZE;
101	init.tasks[7].addr = INIT0_ADDRESS + 0x1c00000;	103	init.tasks[7].addr = INIT0_ADDRESS + 0x1c00000;
102	init.tasks[7].size = INIT0_SIZE;	104	init.tasks[7].size = INIT0_SIZE;
103	#endif*/	105	#endif*/
104	}	106	}
105		107
106	void arch_pre_mm_init(void)	108	void arch_pre_mm_init(void)
107	{	109	{
108	/* Set Interruption Vector Address (i.e. location of interruption vector table). */	110	/* Set Interruption Vector Address (i.e. location of interruption vector table). */
109	iva_write((uintptr_t) &ivt);	111	iva_write((uintptr_t) &ivt);
110	srlz_d();	112	srlz_d();
111		113
112	}	114	}
113		115
-		116	static void iosapic_init(void)
-		117	{
-		118
-		119	uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base))\|FW_OFFSET;
-		120	int i;
-		121
-		122
-		123	for(i=0;i<16;i++)
-		124	{
-		125
-		126	if(i==2) continue; //Disable Cascade interrupt
-		127	((uint32_t)(IOSAPIC+0x00))[0]=0x10+2i;
-		128	srlz_d();
-		129	((uint32_t*)(IOSAPIC+0x10))[0]=LAGACY_INTERRUPT_BASE+i;
-		130	srlz_d();
-		131	((uint32_t)(IOSAPIC+0x00))[0]=0x10+2i+1;
-		132	srlz_d();
-		133	((uint32_t*)(IOSAPIC+0x10))[0]=1<<(56-32);
-		134	srlz_d();
-		135	}
-		136
-		137	}
-		138
-		139
114	void arch_post_mm_init(void)	140	void arch_post_mm_init(void)
115	{	141	{
116	if(config.cpu_active==1)	142	if(config.cpu_active==1)
117	{	143	{
-		144	iosapic_init();
-		145
118	irq_init(INR_COUNT, INR_COUNT);	146	irq_init(INR_COUNT, INR_COUNT);
119	#ifdef SKI	147	#ifdef SKI
120	ski_init_console();	148	ski_init_console();
121	#else	149	#else
122	ega_init();	150	ega_init();
123	#endif	151	#endif
124	}	152	}
125	it_init();	153	it_init();
-		154
126	}	155	}
127		156
128	void arch_post_cpu_init(void)	157	void arch_post_cpu_init(void)
129	{	158	{
130	}	159	}
131		160
132	void arch_pre_smp_init(void)	161	void arch_pre_smp_init(void)
133	{	162	{
134	}	163	}
135		164
136		165
137	#ifdef I460GX	166	#ifdef I460GX
138	#define POLL_INTERVAL 50000 /* 50 ms */	167	#define POLL_INTERVAL 50000 /* 50 ms */
139	/** Kernel thread for polling keyboard. */	168	/** Kernel thread for polling keyboard. */
140	static void i8042_kkbdpoll(void *arg)	169	static void i8042_kkbdpoll(void *arg)
141	{	170	{
142	while (1) {	171	while (1) {
143	i8042_poll();	172	i8042_poll();
144	#ifdef CONFIG_NS16550	173	#ifdef CONFIG_NS16550
-		174	#ifndef CONFIG_NS16550_INTERRUPT_DRIVEN
145	ns16550_poll();	175	ns16550_poll();
-		176	#endif
146	#endif	177	#endif
147	thread_usleep(POLL_INTERVAL);	178	thread_usleep(POLL_INTERVAL);
148	}	179	}
149	}	180	}
150	#endif	181	#endif
151		182
-		183
-		184	static void end_of_irq_void(void *cir_arg __attribute__((unused)),inr_t inr __attribute__((unused)))
-		185	{
-		186	return;
-		187	}
-		188
-		189
152	void arch_post_smp_init(void)	190	void arch_post_smp_init(void)
153	{	191	{
154		192
155	{	193	{
156	/*	194	/*
157	* Create thread that polls keyboard.	195	* Create thread that polls keyboard.
158	*/	196	*/
159	#ifdef SKI	197	#ifdef SKI
160	thread_t *t;	198	thread_t *t;
161	t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);	199	t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
162	if (!t)	200	if (!t)
163	panic("cannot create kkbdpoll\n");	201	panic("cannot create kkbdpoll\n");
164	thread_ready(t);	202	thread_ready(t);
165	#endif	203	#endif
166		204
167	#ifdef I460GX	205	#ifdef I460GX
168	devno_t kbd = device_assign_devno();	206	devno_t kbd = device_assign_devno();
169	devno_t mouse = device_assign_devno();	207	devno_t mouse = device_assign_devno();
170	/* keyboard controller */	208	/* keyboard controller */
171	i8042_init(kbd, IRQ_KBD, mouse, IRQ_MOUSE);	209	i8042_init(kbd, IRQ_KBD, mouse, IRQ_MOUSE);
172		210
173	#ifdef CONFIG_NS16550	211	#ifdef CONFIG_NS16550
174	ns16550_init(kbd, NS16550_IRQ, NS16550_PORT); // as a COM 1	212	ns16550_init(kbd, NS16550_IRQ, NS16550_PORT,end_of_irq_void,NULL); // as a COM 1
175	#else	213	#else
176	#endif	214	#endif
177	thread_t *t;	215	thread_t *t;
178	t = thread_create(i8042_kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);	216	t = thread_create(i8042_kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
179	if (!t)	217	if (!t)
180	panic("cannot create kkbdpoll\n");	218	panic("cannot create kkbdpoll\n");
181	thread_ready(t);	219	thread_ready(t);
182		220
183	#endif	221	#endif
184		222
185	}	223	}
186		224
187	sysinfo_set_item_val("ia64_iospace", NULL, true);	225	sysinfo_set_item_val("ia64_iospace", NULL, true);
188	sysinfo_set_item_val("ia64_iospace.address", NULL, true);	226	sysinfo_set_item_val("ia64_iospace.address", NULL, true);
189	sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET);	227	sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET);
190		228
-		229
-		230
-		231
-		232
191	}	233	}
192		234
193		235
194	/** Enter userspace and never return. */	236	/** Enter userspace and never return. */
195	void userspace(uspace_arg_t *kernel_uarg)	237	void userspace(uspace_arg_t *kernel_uarg)
196	{	238	{
197	psr_t psr;	239	psr_t psr;
198	rsc_t rsc;	240	rsc_t rsc;
199		241
200	psr.value = psr_read();	242	psr.value = psr_read();
201	psr.cpl = PL_USER;	243	psr.cpl = PL_USER;
202	psr.i = true; /* start with interrupts enabled */	244	psr.i = true; /* start with interrupts enabled */
203	psr.ic = true;	245	psr.ic = true;
204	psr.ri = 0; /* start with instruction #0 */	246	psr.ri = 0; /* start with instruction #0 */
205	psr.bn = 1; /* start in bank 0 */	247	psr.bn = 1; /* start in bank 0 */
206		248
207	asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));	249	asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
208	rsc.loadrs = 0;	250	rsc.loadrs = 0;
209	rsc.be = false;	251	rsc.be = false;
210	rsc.pl = PL_USER;	252	rsc.pl = PL_USER;
211	rsc.mode = 3; /* eager mode */	253	rsc.mode = 3; /* eager mode */
212		254
213	switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,	255	switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
214	((uintptr_t) kernel_uarg->uspace_stack)+PAGE_SIZE-ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),	256	((uintptr_t) kernel_uarg->uspace_stack)+PAGE_SIZE-ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
215	((uintptr_t) kernel_uarg->uspace_stack)+PAGE_SIZE,	257	((uintptr_t) kernel_uarg->uspace_stack)+PAGE_SIZE,
216	(uintptr_t) kernel_uarg->uspace_uarg,	258	(uintptr_t) kernel_uarg->uspace_uarg,
217	psr.value, rsc.value);	259	psr.value, rsc.value);
218		260
219	while (1) {	261	while (1) {
220	;	262	;
221	}	263	}
222	}	264	}
223		265
224	/** Set thread-local-storage pointer.	266	/** Set thread-local-storage pointer.
225	*	267	*
226	* We use r13 (a.k.a. tp) for this purpose.	268	* We use r13 (a.k.a. tp) for this purpose.
227	*/	269	*/
228	unative_t sys_tls_set(unative_t addr)	270	unative_t sys_tls_set(unative_t addr)
229	{	271	{
230	return 0;	272	return 0;
231	}	273	}
232		274
233	/** Acquire console back for kernel	275	/** Acquire console back for kernel
234	*	276	*
235	*/	277	*/
236	void arch_grab_console(void)	278	void arch_grab_console(void)
237	{	279	{
238	#ifdef SKI	280	#ifdef SKI
239	ski_kbd_grab();	281	ski_kbd_grab();
-		282	#else
-		283	i8042_grab();
-		284	#ifdef CONFIG_NS16550
-		285	ns16550_grab();
-		286	#endif
-		287
240	#endif	288	#endif
241	}	289	}
242	/** Return console to userspace	290	/** Return console to userspace
243	*	291	*
244	*/	292	*/
245	void arch_release_console(void)	293	void arch_release_console(void)
246	{	294	{
247	#ifdef SKI	295	#ifdef SKI
248	ski_kbd_release();	296	ski_kbd_release();
-		297	i8042_release();
-		298	#else
-		299	#ifdef CONFIG_NS16550
-		300	ns16550_release();
-		301	#endif
-		302
249	#endif	303	#endif
250	}	304	}
251		305
252	void arch_reboot(void)	306	void arch_reboot(void)
253	{	307	{
254	outb(0x64,0xfe);	308	outb(0x64,0xfe);
255	while (1);	309	while (1);
256	}	310	}
257		311
258	/** @}	312	/** @}
259	*/	313	*/
260		314

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(root)/trunk/kernel/arch/ia64/src/ia64.c – Rev 3635 → 3657