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1 | /* |
1 | /* |
2 | * Copyright (c) 2005 Jakub Jermar |
2 | * Copyright (c) 2005 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup ia64 |
29 | /** @addtogroup ia64 |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | */ |
33 | */ |
34 | 34 | ||
35 | #include <arch.h> |
35 | #include <arch.h> |
36 | #include <arch/ski/ski.h> |
36 | #include <arch/ski/ski.h> |
37 | #include <arch/drivers/it.h> |
37 | #include <arch/drivers/it.h> |
38 | #include <arch/interrupt.h> |
38 | #include <arch/interrupt.h> |
39 | #include <arch/barrier.h> |
39 | #include <arch/barrier.h> |
40 | #include <arch/asm.h> |
40 | #include <arch/asm.h> |
41 | #include <arch/register.h> |
41 | #include <arch/register.h> |
42 | #include <arch/types.h> |
42 | #include <arch/types.h> |
43 | #include <arch/context.h> |
43 | #include <arch/context.h> |
44 | #include <arch/stack.h> |
44 | #include <arch/stack.h> |
45 | #include <arch/mm/page.h> |
45 | #include <arch/mm/page.h> |
46 | #include <mm/as.h> |
46 | #include <mm/as.h> |
47 | #include <config.h> |
47 | #include <config.h> |
48 | #include <userspace.h> |
48 | #include <userspace.h> |
49 | #include <console/console.h> |
49 | #include <console/console.h> |
50 | #include <proc/uarg.h> |
50 | #include <proc/uarg.h> |
51 | #include <syscall/syscall.h> |
51 | #include <syscall/syscall.h> |
52 | #include <ddi/irq.h> |
52 | #include <ddi/irq.h> |
53 | #include <ddi/device.h> |
53 | #include <ddi/device.h> |
54 | #include <arch/drivers/ega.h> |
- | |
55 | #include <arch/bootinfo.h> |
54 | #include <arch/bootinfo.h> |
- | 55 | #include <arch/drivers/ega.h> |
|
- | 56 | #include <genarch/drivers/ega/ega.h> |
|
56 | #include <genarch/kbd/i8042.h> |
57 | #include <genarch/kbd/i8042.h> |
57 | #include <genarch/kbd/ns16550.h> |
58 | #include <genarch/kbd/ns16550.h> |
58 | #include <smp/smp.h> |
59 | #include <smp/smp.h> |
59 | #include <smp/ipi.h> |
60 | #include <smp/ipi.h> |
60 | #include <arch/atomic.h> |
61 | #include <arch/atomic.h> |
61 | #include <panic.h> |
62 | #include <panic.h> |
62 | #include <print.h> |
63 | #include <print.h> |
63 | #include <sysinfo/sysinfo.h> |
64 | #include <sysinfo/sysinfo.h> |
64 | 65 | ||
65 | /* NS16550 as a COM 1 */ |
66 | /* NS16550 as a COM 1 */ |
66 | #define NS16550_IRQ (4 + LEGACY_INTERRUPT_BASE) |
67 | #define NS16550_IRQ (4 + LEGACY_INTERRUPT_BASE) |
67 | #define NS16550_PORT 0x3f8 |
68 | #define NS16550_PORT 0x3f8 |
68 | 69 | ||
69 | bootinfo_t *bootinfo; |
70 | bootinfo_t *bootinfo; |
70 | 71 | ||
71 | static uint64_t iosapic_base = 0xfec00000; |
72 | static uint64_t iosapic_base = 0xfec00000; |
72 | 73 | ||
73 | void arch_pre_main(void) |
74 | void arch_pre_main(void) |
74 | { |
75 | { |
75 | /* Setup usermode init tasks. */ |
76 | /* Setup usermode init tasks. */ |
76 | 77 | ||
77 | unsigned int i; |
78 | unsigned int i; |
78 | 79 | ||
79 | init.cnt = bootinfo->taskmap.count; |
80 | init.cnt = bootinfo->taskmap.count; |
80 | 81 | ||
81 | for (i = 0; i < init.cnt; i++) { |
82 | for (i = 0; i < init.cnt; i++) { |
82 | init.tasks[i].addr = |
83 | init.tasks[i].addr = |
83 | ((unsigned long) bootinfo->taskmap.tasks[i].addr) | |
84 | ((unsigned long) bootinfo->taskmap.tasks[i].addr) | |
84 | VRN_MASK; |
85 | VRN_MASK; |
85 | init.tasks[i].size = bootinfo->taskmap.tasks[i].size; |
86 | init.tasks[i].size = bootinfo->taskmap.tasks[i].size; |
86 | } |
87 | } |
87 | } |
88 | } |
88 | 89 | ||
89 | void arch_pre_mm_init(void) |
90 | void arch_pre_mm_init(void) |
90 | { |
91 | { |
91 | /* |
92 | /* |
92 | * Set Interruption Vector Address (i.e. location of interruption vector |
93 | * Set Interruption Vector Address (i.e. location of interruption vector |
93 | * table). |
94 | * table). |
94 | */ |
95 | */ |
95 | iva_write((uintptr_t) &ivt); |
96 | iva_write((uintptr_t) &ivt); |
96 | srlz_d(); |
97 | srlz_d(); |
97 | 98 | ||
98 | } |
99 | } |
99 | 100 | ||
100 | static void iosapic_init(void) |
101 | static void iosapic_init(void) |
101 | { |
102 | { |
102 | uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base)) | FW_OFFSET; |
103 | uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base)) | FW_OFFSET; |
103 | int i; |
104 | int i; |
104 | 105 | ||
105 | int myid, myeid; |
106 | int myid, myeid; |
106 | 107 | ||
107 | myid = ia64_get_cpu_id(); |
108 | myid = ia64_get_cpu_id(); |
108 | myeid = ia64_get_cpu_eid(); |
109 | myeid = ia64_get_cpu_eid(); |
109 | 110 | ||
110 | for (i = 0; i < 16; i++) { |
111 | for (i = 0; i < 16; i++) { |
111 | if (i == 2) |
112 | if (i == 2) |
112 | continue; /* Disable Cascade interrupt */ |
113 | continue; /* Disable Cascade interrupt */ |
113 | ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i; |
114 | ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i; |
114 | srlz_d(); |
115 | srlz_d(); |
115 | ((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i; |
116 | ((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i; |
116 | srlz_d(); |
117 | srlz_d(); |
117 | ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i + 1; |
118 | ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i + 1; |
118 | srlz_d(); |
119 | srlz_d(); |
119 | ((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) | |
120 | ((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) | |
120 | myeid << (48 - 32); |
121 | myeid << (48 - 32); |
121 | srlz_d(); |
122 | srlz_d(); |
122 | } |
123 | } |
123 | 124 | ||
124 | } |
125 | } |
125 | 126 | ||
126 | 127 | ||
127 | void arch_post_mm_init(void) |
128 | void arch_post_mm_init(void) |
128 | { |
129 | { |
129 | if (config.cpu_active == 1) { |
130 | if (config.cpu_active == 1) { |
130 | iosapic_init(); |
131 | iosapic_init(); |
131 | irq_init(INR_COUNT, INR_COUNT); |
132 | irq_init(INR_COUNT, INR_COUNT); |
132 | #ifdef SKI |
133 | #ifdef SKI |
133 | ski_init_console(); |
134 | ski_init_console(); |
134 | #else |
135 | #else |
135 | ega_init(); |
136 | ega_init(EGA_BASE, EGA_VIDEORAM); |
136 | #endif |
137 | #endif |
137 | } |
138 | } |
138 | it_init(); |
139 | it_init(); |
139 | 140 | ||
140 | } |
141 | } |
141 | 142 | ||
142 | void arch_post_cpu_init(void) |
143 | void arch_post_cpu_init(void) |
143 | { |
144 | { |
144 | } |
145 | } |
145 | 146 | ||
146 | void arch_pre_smp_init(void) |
147 | void arch_pre_smp_init(void) |
147 | { |
148 | { |
148 | } |
149 | } |
149 | 150 | ||
150 | 151 | ||
151 | #ifdef I460GX |
152 | #ifdef I460GX |
152 | #define POLL_INTERVAL 50000 /* 50 ms */ |
153 | #define POLL_INTERVAL 50000 /* 50 ms */ |
153 | /** Kernel thread for polling keyboard. */ |
154 | /** Kernel thread for polling keyboard. */ |
154 | static void i8042_kkbdpoll(void *arg) |
155 | static void i8042_kkbdpoll(void *arg) |
155 | { |
156 | { |
156 | while (1) { |
157 | while (1) { |
157 | #ifdef CONFIG_NS16550 |
158 | #ifdef CONFIG_NS16550 |
158 | #ifndef CONFIG_NS16550_INTERRUPT_DRIVEN |
159 | #ifndef CONFIG_NS16550_INTERRUPT_DRIVEN |
159 | ns16550_poll(); |
160 | ns16550_poll(); |
160 | #endif |
161 | #endif |
161 | #else |
162 | #else |
162 | #ifndef CONFIG_I8042_INTERRUPT_DRIVEN |
163 | #ifndef CONFIG_I8042_INTERRUPT_DRIVEN |
163 | i8042_poll(); |
164 | i8042_poll(); |
164 | #endif |
165 | #endif |
165 | #endif |
166 | #endif |
166 | thread_usleep(POLL_INTERVAL); |
167 | thread_usleep(POLL_INTERVAL); |
167 | } |
168 | } |
168 | } |
169 | } |
169 | #endif |
170 | #endif |
170 | 171 | ||
171 | void arch_post_smp_init(void) |
172 | void arch_post_smp_init(void) |
172 | { |
173 | { |
173 | thread_t *t; |
174 | thread_t *t; |
174 | 175 | ||
175 | /* |
176 | /* |
176 | * Create thread that polls keyboard. |
177 | * Create thread that polls keyboard. |
177 | */ |
178 | */ |
178 | #ifdef SKI |
179 | #ifdef SKI |
179 | t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true); |
180 | t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true); |
180 | if (!t) |
181 | if (!t) |
181 | panic("cannot create kkbdpoll\n"); |
182 | panic("cannot create kkbdpoll\n"); |
182 | thread_ready(t); |
183 | thread_ready(t); |
183 | #endif |
184 | #endif |
184 | 185 | ||
185 | #ifdef I460GX |
186 | #ifdef I460GX |
186 | devno_t kbd = device_assign_devno(); |
187 | devno_t kbd = device_assign_devno(); |
187 | 188 | ||
188 | #ifdef CONFIG_NS16550 |
189 | #ifdef CONFIG_NS16550 |
189 | ns16550_init(kbd, NS16550_PORT, NS16550_IRQ, NULL, NULL); |
190 | ns16550_init(kbd, NS16550_PORT, NS16550_IRQ, NULL, NULL); |
190 | #else |
191 | #else |
191 | devno_t mouse = device_assign_devno(); |
192 | devno_t mouse = device_assign_devno(); |
192 | i8042_init(kbd, IRQ_KBD, mouse, IRQ_MOUSE); |
193 | i8042_init(kbd, IRQ_KBD, mouse, IRQ_MOUSE); |
193 | #endif |
194 | #endif |
194 | t = thread_create(i8042_kkbdpoll, NULL, TASK, 0, "kkbdpoll", true); |
195 | t = thread_create(i8042_kkbdpoll, NULL, TASK, 0, "kkbdpoll", true); |
195 | if (!t) |
196 | if (!t) |
196 | panic("cannot create kkbdpoll\n"); |
197 | panic("cannot create kkbdpoll\n"); |
197 | thread_ready(t); |
198 | thread_ready(t); |
198 | #endif |
199 | #endif |
199 | 200 | ||
200 | sysinfo_set_item_val("ia64_iospace", NULL, true); |
201 | sysinfo_set_item_val("ia64_iospace", NULL, true); |
201 | sysinfo_set_item_val("ia64_iospace.address", NULL, true); |
202 | sysinfo_set_item_val("ia64_iospace.address", NULL, true); |
202 | sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET); |
203 | sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET); |
203 | } |
204 | } |
204 | 205 | ||
205 | 206 | ||
206 | /** Enter userspace and never return. */ |
207 | /** Enter userspace and never return. */ |
207 | void userspace(uspace_arg_t *kernel_uarg) |
208 | void userspace(uspace_arg_t *kernel_uarg) |
208 | { |
209 | { |
209 | psr_t psr; |
210 | psr_t psr; |
210 | rsc_t rsc; |
211 | rsc_t rsc; |
211 | 212 | ||
212 | psr.value = psr_read(); |
213 | psr.value = psr_read(); |
213 | psr.cpl = PL_USER; |
214 | psr.cpl = PL_USER; |
214 | psr.i = true; /* start with interrupts enabled */ |
215 | psr.i = true; /* start with interrupts enabled */ |
215 | psr.ic = true; |
216 | psr.ic = true; |
216 | psr.ri = 0; /* start with instruction #0 */ |
217 | psr.ri = 0; /* start with instruction #0 */ |
217 | psr.bn = 1; /* start in bank 0 */ |
218 | psr.bn = 1; /* start in bank 0 */ |
218 | 219 | ||
219 | asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value)); |
220 | asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value)); |
220 | rsc.loadrs = 0; |
221 | rsc.loadrs = 0; |
221 | rsc.be = false; |
222 | rsc.be = false; |
222 | rsc.pl = PL_USER; |
223 | rsc.pl = PL_USER; |
223 | rsc.mode = 3; /* eager mode */ |
224 | rsc.mode = 3; /* eager mode */ |
224 | 225 | ||
225 | switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry, |
226 | switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry, |
226 | ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE - |
227 | ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE - |
227 | ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT), |
228 | ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT), |
228 | ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE, |
229 | ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE, |
229 | (uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value); |
230 | (uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value); |
230 | 231 | ||
231 | while (1) |
232 | while (1) |
232 | ; |
233 | ; |
233 | } |
234 | } |
234 | 235 | ||
235 | /** Set thread-local-storage pointer. |
236 | /** Set thread-local-storage pointer. |
236 | * |
237 | * |
237 | * We use r13 (a.k.a. tp) for this purpose. |
238 | * We use r13 (a.k.a. tp) for this purpose. |
238 | */ |
239 | */ |
239 | unative_t sys_tls_set(unative_t addr) |
240 | unative_t sys_tls_set(unative_t addr) |
240 | { |
241 | { |
241 | return 0; |
242 | return 0; |
242 | } |
243 | } |
243 | 244 | ||
244 | /** Acquire console back for kernel |
245 | /** Acquire console back for kernel |
245 | * |
246 | * |
246 | */ |
247 | */ |
247 | void arch_grab_console(void) |
248 | void arch_grab_console(void) |
248 | { |
249 | { |
249 | #ifdef SKI |
250 | #ifdef SKI |
250 | ski_kbd_grab(); |
251 | ski_kbd_grab(); |
251 | #else |
252 | #else |
252 | #ifdef CONFIG_NS16550 |
253 | #ifdef CONFIG_NS16550 |
253 | ns16550_grab(); |
254 | ns16550_grab(); |
254 | #else |
255 | #else |
255 | i8042_grab(); |
256 | i8042_grab(); |
256 | #endif |
257 | #endif |
257 | #endif |
258 | #endif |
258 | } |
259 | } |
259 | 260 | ||
260 | /** Return console to userspace |
261 | /** Return console to userspace |
261 | * |
262 | * |
262 | */ |
263 | */ |
263 | void arch_release_console(void) |
264 | void arch_release_console(void) |
264 | { |
265 | { |
265 | #ifdef SKI |
266 | #ifdef SKI |
266 | ski_kbd_release(); |
267 | ski_kbd_release(); |
267 | #else |
268 | #else |
268 | #ifdef CONFIG_NS16550 |
269 | #ifdef CONFIG_NS16550 |
269 | ns16550_release(); |
270 | ns16550_release(); |
270 | #else |
271 | #else |
271 | i8042_release(); |
272 | i8042_release(); |
272 | #endif |
273 | #endif |
273 | #endif |
274 | #endif |
274 | } |
275 | } |
275 | 276 | ||
276 | void arch_reboot(void) |
277 | void arch_reboot(void) |
277 | { |
278 | { |
278 | outb(0x64, 0xfe); |
279 | outb(0x64, 0xfe); |
279 | while (1) |
280 | while (1) |
280 | ; |
281 | ; |
281 | } |
282 | } |
282 | 283 | ||
283 | /** @} |
284 | /** @} |
284 | */ |
285 | */ |
285 | 286 |