WebSVN – HelenOS – Diff – /trunk/kernel/arch/ia64/src/drivers/it.c


/*
 * Copyright (c) 2005 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup ia64
 * @{
 */
/** @file
 */
 
/** Interval Timer driver. */
 
#include <arch/drivers/it.h>
#include <arch/interrupt.h>
#include <arch/register.h>
#include <arch/asm.h>
#include <arch/barrier.h>
#include <time/clock.h>
#include <ddi/irq.h>
#include <ddi/device.h>
#include <arch.h>
 
#define IT_SERVICE_CLOCKS   64
 
#define FREQ_NUMERATOR_SHIFT    32
#define FREQ_NUMERATOR_MASK 0xffffffff00000000ULL
 
#define FREQ_DENOMINATOR_SHIFT  0
#define FREQ_DENOMINATOR_MASK   0xffffffffULL
 
uint64_t it_delta;
 
static irq_t it_irq;
 
static irq_ownership_t it_claim(irq_t *);
static void it_interrupt(irq_t *);
 
/** Initialize Interval Timer. */
void it_init(void)
{
    cr_itv_t itv;
   
    if (config.cpu_active == 1) {
        irq_initialize(&it_irq);
        it_irq.inr = INTERRUPT_TIMER;
        it_irq.devno = device_assign_devno();
        it_irq.claim = it_claim;
        it_irq.handler = it_interrupt;
        irq_register(&it_irq);
       
        uint64_t base_freq;
        base_freq  = ((bootinfo->freq_scale) & FREQ_NUMERATOR_MASK) >>
            FREQ_NUMERATOR_SHIFT;
        base_freq *= bootinfo->sys_freq;
        base_freq /= ((bootinfo->freq_scale) & FREQ_DENOMINATOR_MASK) >>
            FREQ_DENOMINATOR_SHIFT;
       
        it_delta = base_freq / HZ;
    }
   
    /* initialize Interval Timer external interrupt vector */
    itv.value = itv_read();
    itv.vector = INTERRUPT_TIMER;
    itv.m = 0;
    itv_write(itv.value);
 
    /* set Interval Timer Counter to zero */
    itc_write(0);
   
    /* generate first Interval Timer interrupt in IT_DELTA ticks */
    itm_write(IT_DELTA);
 
    /* propagate changes */
    srlz_d();
}
 
/** Always claim ownership for this IRQ.
 *
 * Other devices are responsible to avoid using INR 0.
 *
 * @return Always IRQ_ACCEPT.
 */
irq_ownership_t it_claim(irq_t *irq)
{
    return IRQ_ACCEPT;
}
 
/** Process Interval Timer interrupt. */
void it_interrupt(irq_t *irq)
{
    int64_t c;
    int64_t m;
   
    eoi_write(EOI);
   
    m = itm_read();
   
    while (1) {
        c = itc_read();
        c += IT_SERVICE_CLOCKS;
 
        m += IT_DELTA;
        if (m - c < 0)
            CPU->missed_clock_ticks++;
        else
            break;
    }
   
    itm_write(m);
    srlz_d();               /* propagate changes */
 
    /*
     * We are holding a lock which prevents preemption.
     * Release the lock, call clock() and reacquire the lock again.
     */
    spinlock_unlock(&irq->lock);   
    clock();
    spinlock_lock(&irq->lock);
}
 
/** @}
 */
 

Rev 3941	Rev 4148
1	/*	1	/*
2	* Copyright (c) 2005 Jakub Jermar	2	* Copyright (c) 2005 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup ia64	29	/** @addtogroup ia64
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35	/** Interval Timer driver. */	35	/** Interval Timer driver. */
36		36
37	#include <arch/drivers/it.h>	37	#include <arch/drivers/it.h>
38	#include <arch/interrupt.h>	38	#include <arch/interrupt.h>
39	#include <arch/register.h>	39	#include <arch/register.h>
40	#include <arch/asm.h>	40	#include <arch/asm.h>
41	#include <arch/barrier.h>	41	#include <arch/barrier.h>
42	#include <time/clock.h>	42	#include <time/clock.h>
43	#include <ddi/irq.h>	43	#include <ddi/irq.h>
44	#include <ddi/device.h>	44	#include <ddi/device.h>
45	#include <arch.h>	45	#include <arch.h>
46		46
47	#define IT_SERVICE_CLOCKS 64	47	#define IT_SERVICE_CLOCKS 64
48		48
49	#define FREQ_NUMERATOR_SHIFT 32	49	#define FREQ_NUMERATOR_SHIFT 32
50	#define FREQ_NUMERATOR_MASK 0xffffffff00000000ULL	50	#define FREQ_NUMERATOR_MASK 0xffffffff00000000ULL
51		51
52	#define FREQ_DENOMINATOR_SHIFT 0	52	#define FREQ_DENOMINATOR_SHIFT 0
53	#define FREQ_DENOMINATOR_MASK 0xffffffffULL	53	#define FREQ_DENOMINATOR_MASK 0xffffffffULL
54		54
55	uint64_t it_delta;	55	uint64_t it_delta;
56		56
57	static irq_t it_irq;	57	static irq_t it_irq;
58		58
59	static irq_ownership_t it_claim(irq_t *);	59	static irq_ownership_t it_claim(irq_t *);
60	static void it_interrupt(irq_t *);	60	static void it_interrupt(irq_t *);
61		61
62	/** Initialize Interval Timer. */	62	/** Initialize Interval Timer. */
63	void it_init(void)	63	void it_init(void)
64	{	64	{
65	cr_itv_t itv;	65	cr_itv_t itv;
66		66
67	if (config.cpu_active == 1) {	67	if (config.cpu_active == 1) {
68	irq_initialize(&it_irq);	68	irq_initialize(&it_irq);
69	it_irq.inr = INTERRUPT_TIMER;	69	it_irq.inr = INTERRUPT_TIMER;
70	it_irq.devno = device_assign_devno();	70	it_irq.devno = device_assign_devno();
71	it_irq.claim = it_claim;	71	it_irq.claim = it_claim;
72	it_irq.handler = it_interrupt;	72	it_irq.handler = it_interrupt;
73	irq_register(&it_irq);	73	irq_register(&it_irq);
74		74
75	uint64_t base_freq;	75	uint64_t base_freq;
76	base_freq = ((bootinfo->freq_scale) & FREQ_NUMERATOR_MASK) >>	76	base_freq = ((bootinfo->freq_scale) & FREQ_NUMERATOR_MASK) >>
77	FREQ_NUMERATOR_SHIFT;	77	FREQ_NUMERATOR_SHIFT;
78	base_freq *= bootinfo->sys_freq;	78	base_freq *= bootinfo->sys_freq;
79	base_freq /= ((bootinfo->freq_scale) & FREQ_DENOMINATOR_MASK) >>	79	base_freq /= ((bootinfo->freq_scale) & FREQ_DENOMINATOR_MASK) >>
80	FREQ_DENOMINATOR_SHIFT;	80	FREQ_DENOMINATOR_SHIFT;
81		81
82	it_delta = base_freq / HZ;	82	it_delta = base_freq / HZ;
83	}	83	}
84		84
85	/* initialize Interval Timer external interrupt vector */	85	/* initialize Interval Timer external interrupt vector */
86	itv.value = itv_read();	86	itv.value = itv_read();
87	itv.vector = INTERRUPT_TIMER;	87	itv.vector = INTERRUPT_TIMER;
88	itv.m = 0;	88	itv.m = 0;
89	itv_write(itv.value);	89	itv_write(itv.value);
90		90
91	/* set Interval Timer Counter to zero */	91	/* set Interval Timer Counter to zero */
92	itc_write(0);	92	itc_write(0);
93		93
94	/* generate first Interval Timer interrupt in IT_DELTA ticks */	94	/* generate first Interval Timer interrupt in IT_DELTA ticks */
95	itm_write(IT_DELTA);	95	itm_write(IT_DELTA);
96		96
97	/* propagate changes */	97	/* propagate changes */
98	srlz_d();	98	srlz_d();
99	}	99	}
100		100
101	/** Always claim ownership for this IRQ.	101	/** Always claim ownership for this IRQ.
102	*	102	*
103	* Other devices are responsible to avoid using INR 0.	103	* Other devices are responsible to avoid using INR 0.
104	*	104	*
105	* @return Always IRQ_ACCEPT.	105	* @return Always IRQ_ACCEPT.
106	*/	106	*/
107	irq_ownership_t it_claim(irq_t *irq)	107	irq_ownership_t it_claim(irq_t *irq)
108	{	108	{
109	return IRQ_ACCEPT;	109	return IRQ_ACCEPT;
110	}	110	}
111		111
112	/** Process Interval Timer interrupt. */	112	/** Process Interval Timer interrupt. */
113	void it_interrupt(irq_t *irq)	113	void it_interrupt(irq_t *irq)
114	{	114	{
115	int64_t c;	115	int64_t c;
116	int64_t m;	116	int64_t m;
117		117
118	eoi_write(EOI);	118	eoi_write(EOI);
119		119
120	m = itm_read();	120	m = itm_read();
121		121
122	while (1) {	122	while (1) {
123	c = itc_read();	123	c = itc_read();
124	c += IT_SERVICE_CLOCKS;	124	c += IT_SERVICE_CLOCKS;
125		125
126	m += IT_DELTA;	126	m += IT_DELTA;
127	if (m - c < 0)	127	if (m - c < 0)
128	CPU->missed_clock_ticks++;	128	CPU->missed_clock_ticks++;
129	else	129	else
130	break;	130	break;
131	}	131	}
132		132
133	itm_write(m);	133	itm_write(m);
134	srlz_d(); /* propagate changes */	134	srlz_d(); /* propagate changes */
135		135
136	/*	136	/*
137	* We are holding a lock which prevents preemption.	137	* We are holding a lock which prevents preemption.
138	* Release the lock, call clock() and reacquire the lock again.	138	* Release the lock, call clock() and reacquire the lock again.
139	*/	139	*/
140	spinlock_unlock(&irq->lock);	140	spinlock_unlock(&irq->lock);
141	clock();	141	clock();
142	spinlock_lock(&irq->lock);	142	spinlock_lock(&irq->lock);
143	}	143	}
144		144
145	/** @}	145	/** @}
146	*/	146	*/
147		147

Subversion Repositories HelenOS

(root)/trunk/kernel/arch/ia64/src/drivers/it.c @ 2071 – Rev 3941 → 4148