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1 | /* |
1 | /* |
2 | * Copyright (C) 2005 Jakub Jermar |
2 | * Copyright (C) 2005 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | #ifndef __ia64_TLB_H__ |
29 | #ifndef __ia64_TLB_H__ |
30 | #define __ia64_TLB_H__ |
30 | #define __ia64_TLB_H__ |
31 | 31 | ||
32 | #define tlb_arch_init() |
32 | #define tlb_arch_init() |
33 | #define tlb_print() |
33 | #define tlb_print() |
34 | 34 | ||
35 | #include <arch/mm/page.h> |
35 | #include <arch/mm/page.h> |
36 | #include <arch/mm/asid.h> |
36 | #include <arch/mm/asid.h> |
37 | #include <arch/interrupt.h> |
37 | #include <arch/interrupt.h> |
38 | #include <arch/types.h> |
38 | #include <arch/types.h> |
39 | #include <typedefs.h> |
39 | #include <typedefs.h> |
40 | 40 | ||
- | 41 | /** Data and instruction Translation Register indices. */ |
|
- | 42 | #define DTR_KERNEL 0 |
|
- | 43 | #define ITR_KERNEL 0 |
|
- | 44 | #define DTR_KSTACK 1 |
|
- | 45 | ||
- | 46 | /** Portion of TLB insertion format data structure. */ |
|
- | 47 | union tlb_entry { |
|
- | 48 | __u64 word[2]; |
|
- | 49 | struct { |
|
- | 50 | /* Word 0 */ |
|
- | 51 | unsigned p : 1; /**< Present. */ |
|
- | 52 | unsigned : 1; |
|
- | 53 | unsigned ma : 3; /**< Memory attribute. */ |
|
- | 54 | unsigned a : 1; /**< Accessed. */ |
|
- | 55 | unsigned d : 1; /**< Dirty. */ |
|
- | 56 | unsigned pl : 2; /**< Privilege level. */ |
|
- | 57 | unsigned ar : 3; /**< Access rights. */ |
|
- | 58 | unsigned long long ppn : 38; /**< Physical Page Number, a.k.a. PFN. */ |
|
- | 59 | unsigned : 2; |
|
- | 60 | unsigned ed : 1; |
|
- | 61 | unsigned ig1 : 11; |
|
- | 62 | ||
- | 63 | /* Word 1 */ |
|
- | 64 | unsigned : 2; |
|
- | 65 | unsigned ps : 6; /**< Page size will be 2^ps. */ |
|
- | 66 | unsigned key : 24; /**< Protection key, unused. */ |
|
- | 67 | unsigned : 32; |
|
- | 68 | } __attribute__ ((packed)); |
|
- | 69 | } __attribute__ ((packed)); |
|
- | 70 | typedef union tlb_entry tlb_entry_t; |
|
- | 71 | ||
41 | extern void tc_mapping_insert(__address va, asid_t asid, vhpt_entry_t entry, bool dtc); |
72 | extern void tc_mapping_insert(__address va, asid_t asid, tlb_entry_t entry, bool dtc); |
42 | extern void dtc_mapping_insert(__address va, asid_t asid, vhpt_entry_t entry); |
73 | extern void dtc_mapping_insert(__address va, asid_t asid, tlb_entry_t entry); |
43 | extern void itc_mapping_insert(__address va, asid_t asid, vhpt_entry_t entry); |
74 | extern void itc_mapping_insert(__address va, asid_t asid, tlb_entry_t entry); |
44 | 75 | ||
45 | extern void tr_mapping_insert(__address va, asid_t asid, tlb_entry_t entry, bool dtr, index_t tr); |
76 | extern void tr_mapping_insert(__address va, asid_t asid, tlb_entry_t entry, bool dtr, index_t tr); |
46 | extern void dtr_mapping_insert(__address va, asid_t asid, tlb_entry_t entry, index_t tr); |
77 | extern void dtr_mapping_insert(__address va, asid_t asid, tlb_entry_t entry, index_t tr); |
47 | extern void itr_mapping_insert(__address va, asid_t asid, tlb_entry_t entry, index_t tr); |
78 | extern void itr_mapping_insert(__address va, asid_t asid, tlb_entry_t entry, index_t tr); |
48 | 79 | ||
- | 80 | extern void dtlb_mapping_insert(__address page, __address frame, bool dtr, index_t tr); |
|
- | 81 | ||
49 | extern void alternate_instruction_tlb_fault(__u64 vector, struct exception_regdump *pstate); |
82 | extern void alternate_instruction_tlb_fault(__u64 vector, struct exception_regdump *pstate); |
50 | extern void alternate_data_tlb_fault(__u64 vector, struct exception_regdump *pstate); |
83 | extern void alternate_data_tlb_fault(__u64 vector, struct exception_regdump *pstate); |
51 | extern void data_nested_tlb_fault(__u64 vector, struct exception_regdump *pstate); |
84 | extern void data_nested_tlb_fault(__u64 vector, struct exception_regdump *pstate); |
52 | extern void data_dirty_bit_fault(__u64 vector, struct exception_regdump *pstate); |
85 | extern void data_dirty_bit_fault(__u64 vector, struct exception_regdump *pstate); |
53 | extern void instruction_access_bit_fault(__u64 vector, struct exception_regdump *pstate); |
86 | extern void instruction_access_bit_fault(__u64 vector, struct exception_regdump *pstate); |
54 | extern void data_access_bit_fault(__u64 vector, struct exception_regdump *pstate); |
87 | extern void data_access_bit_fault(__u64 vector, struct exception_regdump *pstate); |
55 | extern void page_not_present(__u64 vector, struct exception_regdump *pstate); |
88 | extern void page_not_present(__u64 vector, struct exception_regdump *pstate); |
56 | 89 | ||
57 | #endif |
90 | #endif |
58 | 91 |