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1 | /* |
1 | /* |
2 | * Copyright (C) 2005 - 2006 Jakub Jermar |
2 | * Copyright (C) 2005 - 2006 Jakub Jermar |
3 | * Copyright (C) 2006 Jakub Vana |
3 | * Copyright (C) 2006 Jakub Vana |
4 | * All rights reserved. |
4 | * All rights reserved. |
5 | * |
5 | * |
6 | * Redistribution and use in source and binary forms, with or without |
6 | * Redistribution and use in source and binary forms, with or without |
7 | * modification, are permitted provided that the following conditions |
7 | * modification, are permitted provided that the following conditions |
8 | * are met: |
8 | * are met: |
9 | * |
9 | * |
10 | * - Redistributions of source code must retain the above copyright |
10 | * - Redistributions of source code must retain the above copyright |
11 | * notice, this list of conditions and the following disclaimer. |
11 | * notice, this list of conditions and the following disclaimer. |
12 | * - Redistributions in binary form must reproduce the above copyright |
12 | * - Redistributions in binary form must reproduce the above copyright |
13 | * notice, this list of conditions and the following disclaimer in the |
13 | * notice, this list of conditions and the following disclaimer in the |
14 | * documentation and/or other materials provided with the distribution. |
14 | * documentation and/or other materials provided with the distribution. |
15 | * - The name of the author may not be used to endorse or promote products |
15 | * - The name of the author may not be used to endorse or promote products |
16 | * derived from this software without specific prior written permission. |
16 | * derived from this software without specific prior written permission. |
17 | * |
17 | * |
18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
28 | */ |
28 | */ |
29 | 29 | ||
30 | #ifndef __ia64_PAGE_H__ |
30 | #ifndef __ia64_PAGE_H__ |
31 | #define __ia64_PAGE_H__ |
31 | #define __ia64_PAGE_H__ |
32 | 32 | ||
- | 33 | #include <arch/mm/frame.h> |
|
- | 34 | ||
33 | #define PAGE_SIZE FRAME_SIZE |
35 | #define PAGE_SIZE FRAME_SIZE |
34 | #define PAGE_WIDTH FRAME_WIDTH |
36 | #define PAGE_WIDTH FRAME_WIDTH |
35 | 37 | ||
- | 38 | ||
- | 39 | #ifdef KERNEL |
|
- | 40 | ||
36 | /** Bit width of the TLB-locked portion of kernel address space. */ |
41 | /** Bit width of the TLB-locked portion of kernel address space. */ |
37 | #define KERNEL_PAGE_WIDTH 28 /* 256M */ |
42 | #define KERNEL_PAGE_WIDTH 28 /* 256M */ |
38 | 43 | ||
39 | #define SET_PTL0_ADDRESS_ARCH(x) /**< To be removed as situation permits. */ |
44 | #define SET_PTL0_ADDRESS_ARCH(x) /**< To be removed as situation permits. */ |
40 | 45 | ||
41 | #define PPN_SHIFT 12 |
46 | #define PPN_SHIFT 12 |
42 | 47 | ||
43 | #define VRN_SHIFT 61 |
48 | #define VRN_SHIFT 61 |
44 | #define VRN_MASK (7LL << VRN_SHIFT) |
49 | #define VRN_MASK (7LL << VRN_SHIFT) |
45 | #define VA2VRN(va) ((va)>>VRN_SHIFT) |
50 | #define VA2VRN(va) ((va)>>VRN_SHIFT) |
46 | 51 | ||
47 | #ifdef __ASM__ |
52 | #ifdef __ASM__ |
48 | #define VRN_KERNEL 7 |
53 | #define VRN_KERNEL 7 |
49 | #else |
54 | #else |
50 | #define VRN_KERNEL 7LL |
55 | #define VRN_KERNEL 7LL |
51 | #endif |
56 | #endif |
52 | 57 | ||
53 | #define REGION_REGISTERS 8 |
58 | #define REGION_REGISTERS 8 |
54 | 59 | ||
55 | #define KA2PA(x) ((__address) (x-(VRN_KERNEL<<VRN_SHIFT))) |
60 | #define KA2PA(x) ((__address) (x-(VRN_KERNEL<<VRN_SHIFT))) |
56 | #define PA2KA(x) ((__address) (x+(VRN_KERNEL<<VRN_SHIFT))) |
61 | #define PA2KA(x) ((__address) (x+(VRN_KERNEL<<VRN_SHIFT))) |
57 | 62 | ||
58 | #define VHPT_WIDTH 20 /* 1M */ |
63 | #define VHPT_WIDTH 20 /* 1M */ |
59 | #define VHPT_SIZE (1 << VHPT_WIDTH) |
64 | #define VHPT_SIZE (1 << VHPT_WIDTH) |
60 | #define VHPT_BASE 0 /* Must be aligned to VHPT_SIZE */ |
65 | #define VHPT_BASE 0 /* Must be aligned to VHPT_SIZE */ |
61 | 66 | ||
62 | #define PTA_BASE_SHIFT 15 |
67 | #define PTA_BASE_SHIFT 15 |
63 | 68 | ||
64 | /** Memory Attributes. */ |
69 | /** Memory Attributes. */ |
65 | #define MA_WRITEBACK 0x0 |
70 | #define MA_WRITEBACK 0x0 |
66 | #define MA_UNCACHEABLE 0x4 |
71 | #define MA_UNCACHEABLE 0x4 |
67 | 72 | ||
68 | /** Privilege Levels. Only the most and the least privileged ones are ever used. */ |
73 | /** Privilege Levels. Only the most and the least privileged ones are ever used. */ |
69 | #define PL_KERNEL 0x0 |
74 | #define PL_KERNEL 0x0 |
70 | #define PL_USER 0x3 |
75 | #define PL_USER 0x3 |
71 | 76 | ||
72 | /* Access Rigths. Only certain combinations are used by the kernel. */ |
77 | /* Access Rigths. Only certain combinations are used by the kernel. */ |
73 | #define AR_READ 0x0 |
78 | #define AR_READ 0x0 |
74 | #define AR_EXECUTE 0x1 |
79 | #define AR_EXECUTE 0x1 |
75 | #define AR_WRITE 0x2 |
80 | #define AR_WRITE 0x2 |
76 | 81 | ||
77 | #ifndef __ASM__ |
82 | #ifndef __ASM__ |
78 | 83 | ||
79 | #include <arch/mm/frame.h> |
84 | #include <arch/mm/frame.h> |
80 | #include <arch/barrier.h> |
85 | #include <arch/barrier.h> |
81 | #include <genarch/mm/page_ht.h> |
86 | #include <genarch/mm/page_ht.h> |
82 | #include <arch/mm/asid.h> |
87 | #include <arch/mm/asid.h> |
83 | #include <arch/types.h> |
88 | #include <arch/types.h> |
84 | #include <typedefs.h> |
89 | #include <typedefs.h> |
85 | #include <debug.h> |
90 | #include <debug.h> |
86 | 91 | ||
87 | struct vhpt_tag_info { |
92 | struct vhpt_tag_info { |
88 | unsigned long long tag : 63; |
93 | unsigned long long tag : 63; |
89 | unsigned ti : 1; |
94 | unsigned ti : 1; |
90 | } __attribute__ ((packed)); |
95 | } __attribute__ ((packed)); |
91 | 96 | ||
92 | union vhpt_tag { |
97 | union vhpt_tag { |
93 | struct vhpt_tag_info tag_info; |
98 | struct vhpt_tag_info tag_info; |
94 | unsigned tag_word; |
99 | unsigned tag_word; |
95 | }; |
100 | }; |
96 | 101 | ||
97 | struct vhpt_entry_present { |
102 | struct vhpt_entry_present { |
98 | /* Word 0 */ |
103 | /* Word 0 */ |
99 | unsigned p : 1; |
104 | unsigned p : 1; |
100 | unsigned : 1; |
105 | unsigned : 1; |
101 | unsigned ma : 3; |
106 | unsigned ma : 3; |
102 | unsigned a : 1; |
107 | unsigned a : 1; |
103 | unsigned d : 1; |
108 | unsigned d : 1; |
104 | unsigned pl : 2; |
109 | unsigned pl : 2; |
105 | unsigned ar : 3; |
110 | unsigned ar : 3; |
106 | unsigned long long ppn : 38; |
111 | unsigned long long ppn : 38; |
107 | unsigned : 2; |
112 | unsigned : 2; |
108 | unsigned ed : 1; |
113 | unsigned ed : 1; |
109 | unsigned ig1 : 11; |
114 | unsigned ig1 : 11; |
110 | 115 | ||
111 | /* Word 1 */ |
116 | /* Word 1 */ |
112 | unsigned : 2; |
117 | unsigned : 2; |
113 | unsigned ps : 6; |
118 | unsigned ps : 6; |
114 | unsigned key : 24; |
119 | unsigned key : 24; |
115 | unsigned : 32; |
120 | unsigned : 32; |
116 | 121 | ||
117 | /* Word 2 */ |
122 | /* Word 2 */ |
118 | union vhpt_tag tag; |
123 | union vhpt_tag tag; |
119 | 124 | ||
120 | /* Word 3 */ |
125 | /* Word 3 */ |
121 | __u64 ig3 : 64; |
126 | __u64 ig3 : 64; |
122 | } __attribute__ ((packed)); |
127 | } __attribute__ ((packed)); |
123 | 128 | ||
124 | struct vhpt_entry_not_present { |
129 | struct vhpt_entry_not_present { |
125 | /* Word 0 */ |
130 | /* Word 0 */ |
126 | unsigned p : 1; |
131 | unsigned p : 1; |
127 | unsigned long long ig0 : 52; |
132 | unsigned long long ig0 : 52; |
128 | unsigned ig1 : 11; |
133 | unsigned ig1 : 11; |
129 | 134 | ||
130 | /* Word 1 */ |
135 | /* Word 1 */ |
131 | unsigned : 2; |
136 | unsigned : 2; |
132 | unsigned ps : 6; |
137 | unsigned ps : 6; |
133 | unsigned long long ig2 : 56; |
138 | unsigned long long ig2 : 56; |
134 | 139 | ||
135 | /* Word 2 */ |
140 | /* Word 2 */ |
136 | union vhpt_tag tag; |
141 | union vhpt_tag tag; |
137 | 142 | ||
138 | /* Word 3 */ |
143 | /* Word 3 */ |
139 | __u64 ig3 : 64; |
144 | __u64 ig3 : 64; |
140 | } __attribute__ ((packed)); |
145 | } __attribute__ ((packed)); |
141 | 146 | ||
142 | typedef union vhpt_entry { |
147 | typedef union vhpt_entry { |
143 | struct vhpt_entry_present present; |
148 | struct vhpt_entry_present present; |
144 | struct vhpt_entry_not_present not_present; |
149 | struct vhpt_entry_not_present not_present; |
145 | __u64 word[4]; |
150 | __u64 word[4]; |
146 | } vhpt_entry_t; |
151 | } vhpt_entry_t; |
147 | 152 | ||
148 | struct region_register_map { |
153 | struct region_register_map { |
149 | unsigned ve : 1; |
154 | unsigned ve : 1; |
150 | unsigned : 1; |
155 | unsigned : 1; |
151 | unsigned ps : 6; |
156 | unsigned ps : 6; |
152 | unsigned rid : 24; |
157 | unsigned rid : 24; |
153 | unsigned : 32; |
158 | unsigned : 32; |
154 | } __attribute__ ((packed)); |
159 | } __attribute__ ((packed)); |
155 | 160 | ||
156 | typedef union region_register { |
161 | typedef union region_register { |
157 | struct region_register_map map; |
162 | struct region_register_map map; |
158 | unsigned long long word; |
163 | unsigned long long word; |
159 | } region_register; |
164 | } region_register; |
160 | 165 | ||
161 | struct pta_register_map { |
166 | struct pta_register_map { |
162 | unsigned ve : 1; |
167 | unsigned ve : 1; |
163 | unsigned : 1; |
168 | unsigned : 1; |
164 | unsigned size : 6; |
169 | unsigned size : 6; |
165 | unsigned vf : 1; |
170 | unsigned vf : 1; |
166 | unsigned : 6; |
171 | unsigned : 6; |
167 | unsigned long long base : 49; |
172 | unsigned long long base : 49; |
168 | } __attribute__ ((packed)); |
173 | } __attribute__ ((packed)); |
169 | 174 | ||
170 | typedef union pta_register { |
175 | typedef union pta_register { |
171 | struct pta_register_map map; |
176 | struct pta_register_map map; |
172 | __u64 word; |
177 | __u64 word; |
173 | } pta_register; |
178 | } pta_register; |
174 | 179 | ||
175 | /** Return Translation Hashed Entry Address. |
180 | /** Return Translation Hashed Entry Address. |
176 | * |
181 | * |
177 | * VRN bits are used to read RID (ASID) from one |
182 | * VRN bits are used to read RID (ASID) from one |
178 | * of the eight region registers registers. |
183 | * of the eight region registers registers. |
179 | * |
184 | * |
180 | * @param va Virtual address including VRN bits. |
185 | * @param va Virtual address including VRN bits. |
181 | * |
186 | * |
182 | * @return Address of the head of VHPT collision chain. |
187 | * @return Address of the head of VHPT collision chain. |
183 | */ |
188 | */ |
184 | static inline __u64 thash(__u64 va) |
189 | static inline __u64 thash(__u64 va) |
185 | { |
190 | { |
186 | __u64 ret; |
191 | __u64 ret; |
187 | 192 | ||
188 | __asm__ volatile ("thash %0 = %1\n" : "=r" (ret) : "r" (va)); |
193 | __asm__ volatile ("thash %0 = %1\n" : "=r" (ret) : "r" (va)); |
189 | 194 | ||
190 | return ret; |
195 | return ret; |
191 | } |
196 | } |
192 | 197 | ||
193 | /** Return Translation Hashed Entry Tag. |
198 | /** Return Translation Hashed Entry Tag. |
194 | * |
199 | * |
195 | * VRN bits are used to read RID (ASID) from one |
200 | * VRN bits are used to read RID (ASID) from one |
196 | * of the eight region registers. |
201 | * of the eight region registers. |
197 | * |
202 | * |
198 | * @param va Virtual address including VRN bits. |
203 | * @param va Virtual address including VRN bits. |
199 | * |
204 | * |
200 | * @return The unique tag for VPN and RID in the collision chain returned by thash(). |
205 | * @return The unique tag for VPN and RID in the collision chain returned by thash(). |
201 | */ |
206 | */ |
202 | static inline __u64 ttag(__u64 va) |
207 | static inline __u64 ttag(__u64 va) |
203 | { |
208 | { |
204 | __u64 ret; |
209 | __u64 ret; |
205 | 210 | ||
206 | __asm__ volatile ("ttag %0 = %1\n" : "=r" (ret) : "r" (va)); |
211 | __asm__ volatile ("ttag %0 = %1\n" : "=r" (ret) : "r" (va)); |
207 | 212 | ||
208 | return ret; |
213 | return ret; |
209 | } |
214 | } |
210 | 215 | ||
211 | /** Read Region Register. |
216 | /** Read Region Register. |
212 | * |
217 | * |
213 | * @param i Region register index. |
218 | * @param i Region register index. |
214 | * |
219 | * |
215 | * @return Current contents of rr[i]. |
220 | * @return Current contents of rr[i]. |
216 | */ |
221 | */ |
217 | static inline __u64 rr_read(index_t i) |
222 | static inline __u64 rr_read(index_t i) |
218 | { |
223 | { |
219 | __u64 ret; |
224 | __u64 ret; |
220 | ASSERT(i < REGION_REGISTERS); |
225 | ASSERT(i < REGION_REGISTERS); |
221 | __asm__ volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i << VRN_SHIFT)); |
226 | __asm__ volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i << VRN_SHIFT)); |
222 | return ret; |
227 | return ret; |
223 | } |
228 | } |
224 | 229 | ||
225 | /** Write Region Register. |
230 | /** Write Region Register. |
226 | * |
231 | * |
227 | * @param i Region register index. |
232 | * @param i Region register index. |
228 | * @param v Value to be written to rr[i]. |
233 | * @param v Value to be written to rr[i]. |
229 | */ |
234 | */ |
230 | static inline void rr_write(index_t i, __u64 v) |
235 | static inline void rr_write(index_t i, __u64 v) |
231 | { |
236 | { |
232 | ASSERT(i < REGION_REGISTERS); |
237 | ASSERT(i < REGION_REGISTERS); |
233 | __asm__ volatile ( |
238 | __asm__ volatile ( |
234 | "mov rr[%0] = %1\n" |
239 | "mov rr[%0] = %1\n" |
235 | : |
240 | : |
236 | : "r" (i << VRN_SHIFT), "r" (v) |
241 | : "r" (i << VRN_SHIFT), "r" (v) |
237 | ); |
242 | ); |
238 | } |
243 | } |
239 | 244 | ||
240 | /** Read Page Table Register. |
245 | /** Read Page Table Register. |
241 | * |
246 | * |
242 | * @return Current value stored in PTA. |
247 | * @return Current value stored in PTA. |
243 | */ |
248 | */ |
244 | static inline __u64 pta_read(void) |
249 | static inline __u64 pta_read(void) |
245 | { |
250 | { |
246 | __u64 ret; |
251 | __u64 ret; |
247 | 252 | ||
248 | __asm__ volatile ("mov %0 = cr.pta\n" : "=r" (ret)); |
253 | __asm__ volatile ("mov %0 = cr.pta\n" : "=r" (ret)); |
249 | 254 | ||
250 | return ret; |
255 | return ret; |
251 | } |
256 | } |
252 | 257 | ||
253 | /** Write Page Table Register. |
258 | /** Write Page Table Register. |
254 | * |
259 | * |
255 | * @param v New value to be stored in PTA. |
260 | * @param v New value to be stored in PTA. |
256 | */ |
261 | */ |
257 | static inline void pta_write(__u64 v) |
262 | static inline void pta_write(__u64 v) |
258 | { |
263 | { |
259 | __asm__ volatile ("mov cr.pta = %0\n" : : "r" (v)); |
264 | __asm__ volatile ("mov cr.pta = %0\n" : : "r" (v)); |
260 | } |
265 | } |
261 | 266 | ||
262 | extern void page_arch_init(void); |
267 | extern void page_arch_init(void); |
263 | 268 | ||
264 | extern vhpt_entry_t *vhpt_hash(__address page, asid_t asid); |
269 | extern vhpt_entry_t *vhpt_hash(__address page, asid_t asid); |
265 | extern bool vhpt_compare(__address page, asid_t asid, vhpt_entry_t *v); |
270 | extern bool vhpt_compare(__address page, asid_t asid, vhpt_entry_t *v); |
266 | extern void vhpt_set_record(vhpt_entry_t *v, __address page, asid_t asid, __address frame, int flags); |
271 | extern void vhpt_set_record(vhpt_entry_t *v, __address page, asid_t asid, __address frame, int flags); |
267 | 272 | ||
- | 273 | #endif /* __ASM__ */ |
|
- | 274 | ||
268 | #endif |
275 | #endif /* KERNEL */ |
269 | 276 | ||
270 | #endif |
277 | #endif |
271 | 278 |