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1 | /* |
1 | /* |
2 | * Copyright (C) 2005 - 2006 Jakub Jermar |
2 | * Copyright (C) 2005 - 2006 Jakub Jermar |
3 | * Copyright (C) 2006 Jakub Vana |
3 | * Copyright (C) 2006 Jakub Vana |
4 | * All rights reserved. |
4 | * All rights reserved. |
5 | * |
5 | * |
6 | * Redistribution and use in source and binary forms, with or without |
6 | * Redistribution and use in source and binary forms, with or without |
7 | * modification, are permitted provided that the following conditions |
7 | * modification, are permitted provided that the following conditions |
8 | * are met: |
8 | * are met: |
9 | * |
9 | * |
10 | * - Redistributions of source code must retain the above copyright |
10 | * - Redistributions of source code must retain the above copyright |
11 | * notice, this list of conditions and the following disclaimer. |
11 | * notice, this list of conditions and the following disclaimer. |
12 | * - Redistributions in binary form must reproduce the above copyright |
12 | * - Redistributions in binary form must reproduce the above copyright |
13 | * notice, this list of conditions and the following disclaimer in the |
13 | * notice, this list of conditions and the following disclaimer in the |
14 | * documentation and/or other materials provided with the distribution. |
14 | * documentation and/or other materials provided with the distribution. |
15 | * - The name of the author may not be used to endorse or promote products |
15 | * - The name of the author may not be used to endorse or promote products |
16 | * derived from this software without specific prior written permission. |
16 | * derived from this software without specific prior written permission. |
17 | * |
17 | * |
18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
28 | */ |
28 | */ |
29 | 29 | ||
30 | #ifndef __ia64_PAGE_H__ |
30 | #ifndef __ia64_PAGE_H__ |
31 | #define __ia64_PAGE_H__ |
31 | #define __ia64_PAGE_H__ |
32 | 32 | ||
33 | #include <arch/mm/frame.h> |
33 | #include <arch/mm/frame.h> |
34 | #include <genarch/mm/page_ht.h> |
34 | #include <genarch/mm/page_ht.h> |
35 | #include <arch/mm/asid.h> |
35 | #include <arch/mm/asid.h> |
36 | #include <arch/types.h> |
36 | #include <arch/types.h> |
37 | #include <typedefs.h> |
37 | #include <typedefs.h> |
38 | #include <debug.h> |
38 | #include <debug.h> |
39 | 39 | ||
40 | #define PAGE_SIZE FRAME_SIZE |
40 | #define PAGE_SIZE FRAME_SIZE |
41 | #define PAGE_WIDTH FRAME_WIDTH |
41 | #define PAGE_WIDTH FRAME_WIDTH |
42 | 42 | ||
43 | #define KA2PA(x) ((__address) (x)) |
43 | #define KA2PA(x) ((__address) (x)) |
44 | #define PA2KA(x) ((__address) (x)) |
44 | #define PA2KA(x) ((__address) (x)) |
45 | 45 | ||
46 | #define SET_PTL0_ADDRESS_ARCH(x) /**< To be removed as situation permits. */ |
46 | #define SET_PTL0_ADDRESS_ARCH(x) /**< To be removed as situation permits. */ |
47 | 47 | ||
48 | #define PPN_SHIFT 12 |
48 | #define PPN_SHIFT 12 |
49 | 49 | ||
50 | #define VRN_SHIFT 61 |
50 | #define VRN_SHIFT 61 |
51 | #define VRN_MASK (7LL << VRN_SHIFT) |
51 | #define VRN_MASK (7LL << VRN_SHIFT) |
52 | #define VRN_KERNEL 0 |
52 | #define VRN_KERNEL 0 |
53 | #define REGION_REGISTERS 8 |
53 | #define REGION_REGISTERS 8 |
54 | 54 | ||
55 | #define VHPT_WIDTH 20 /* 1M */ |
55 | #define VHPT_WIDTH 20 /* 1M */ |
56 | #define VHPT_SIZE (1 << VHPT_WIDTH) |
56 | #define VHPT_SIZE (1 << VHPT_WIDTH) |
57 | #define VHPT_BASE 0 /* Must be aligned to VHPT_SIZE */ |
57 | #define VHPT_BASE 0 /* Must be aligned to VHPT_SIZE */ |
58 | 58 | ||
59 | #define PTA_BASE_SHIFT 15 |
59 | #define PTA_BASE_SHIFT 15 |
60 | 60 | ||
61 | /** Memory Attributes. */ |
61 | /** Memory Attributes. */ |
62 | #define MA_WRITEBACK 0x0 |
62 | #define MA_WRITEBACK 0x0 |
63 | #define MA_UNCACHEABLE 0x4 |
63 | #define MA_UNCACHEABLE 0x4 |
64 | 64 | ||
65 | /** Privilege Levels. Only the most and the least privileged ones are ever used. */ |
65 | /** Privilege Levels. Only the most and the least privileged ones are ever used. */ |
66 | #define PL_KERNEL 0x0 |
66 | #define PL_KERNEL 0x0 |
67 | #define PL_USER 0x3 |
67 | #define PL_USER 0x3 |
68 | 68 | ||
69 | /* Access Rigths. Only certain combinations are used by the kernel. */ |
69 | /* Access Rigths. Only certain combinations are used by the kernel. */ |
70 | #define AR_READ 0x0 |
70 | #define AR_READ 0x0 |
71 | #define AR_EXECUTE 0x1 |
71 | #define AR_EXECUTE 0x1 |
72 | #define AR_WRITE 0x2 |
72 | #define AR_WRITE 0x2 |
73 | 73 | ||
- | 74 | ||
- | 75 | #define VA_REGION_INDEX 61 |
|
- | 76 | ||
- | 77 | #define VA_REGION(va) (va>>VA_REGION_INDEX) |
|
- | 78 | ||
- | 79 | ||
- | 80 | ||
74 | struct vhpt_tag_info { |
81 | struct vhpt_tag_info { |
75 | unsigned long long tag : 63; |
82 | unsigned long long tag : 63; |
76 | unsigned ti : 1; |
83 | unsigned ti : 1; |
77 | } __attribute__ ((packed)); |
84 | } __attribute__ ((packed)); |
78 | 85 | ||
79 | union vhpt_tag { |
86 | union vhpt_tag { |
80 | struct vhpt_tag_info tag_info; |
87 | struct vhpt_tag_info tag_info; |
81 | unsigned tag_word; |
88 | unsigned tag_word; |
82 | }; |
89 | }; |
83 | 90 | ||
84 | struct vhpt_entry_present { |
91 | struct vhpt_entry_present { |
85 | /* Word 0 */ |
92 | /* Word 0 */ |
86 | unsigned p : 1; |
93 | unsigned p : 1; |
87 | unsigned : 1; |
94 | unsigned : 1; |
88 | unsigned ma : 3; |
95 | unsigned ma : 3; |
89 | unsigned a : 1; |
96 | unsigned a : 1; |
90 | unsigned d : 1; |
97 | unsigned d : 1; |
91 | unsigned pl : 2; |
98 | unsigned pl : 2; |
92 | unsigned ar : 3; |
99 | unsigned ar : 3; |
93 | unsigned long long ppn : 38; |
100 | unsigned long long ppn : 38; |
94 | unsigned : 2; |
101 | unsigned : 2; |
95 | unsigned ed : 1; |
102 | unsigned ed : 1; |
96 | unsigned ig1 : 11; |
103 | unsigned ig1 : 11; |
97 | 104 | ||
98 | /* Word 1 */ |
105 | /* Word 1 */ |
99 | unsigned : 2; |
106 | unsigned : 2; |
100 | unsigned ps : 6; |
107 | unsigned ps : 6; |
101 | unsigned key : 24; |
108 | unsigned key : 24; |
102 | unsigned : 32; |
109 | unsigned : 32; |
103 | 110 | ||
104 | /* Word 2 */ |
111 | /* Word 2 */ |
105 | union vhpt_tag tag; |
112 | union vhpt_tag tag; |
106 | 113 | ||
107 | /* Word 3 */ |
114 | /* Word 3 */ |
108 | __u64 ig3 : 64; |
115 | __u64 ig3 : 64; |
109 | } __attribute__ ((packed)); |
116 | } __attribute__ ((packed)); |
110 | 117 | ||
111 | struct vhpt_entry_not_present { |
118 | struct vhpt_entry_not_present { |
112 | /* Word 0 */ |
119 | /* Word 0 */ |
113 | unsigned p : 1; |
120 | unsigned p : 1; |
114 | unsigned long long ig0 : 52; |
121 | unsigned long long ig0 : 52; |
115 | unsigned ig1 : 11; |
122 | unsigned ig1 : 11; |
116 | 123 | ||
117 | /* Word 1 */ |
124 | /* Word 1 */ |
118 | unsigned : 2; |
125 | unsigned : 2; |
119 | unsigned ps : 6; |
126 | unsigned ps : 6; |
120 | unsigned long long ig2 : 56; |
127 | unsigned long long ig2 : 56; |
121 | 128 | ||
122 | /* Word 2 */ |
129 | /* Word 2 */ |
123 | union vhpt_tag tag; |
130 | union vhpt_tag tag; |
124 | 131 | ||
125 | /* Word 3 */ |
132 | /* Word 3 */ |
126 | __u64 ig3 : 64; |
133 | __u64 ig3 : 64; |
127 | } __attribute__ ((packed)); |
134 | } __attribute__ ((packed)); |
128 | 135 | ||
129 | typedef union vhpt_entry { |
136 | typedef union vhpt_entry { |
130 | struct vhpt_entry_present present; |
137 | struct vhpt_entry_present present; |
131 | struct vhpt_entry_not_present not_present; |
138 | struct vhpt_entry_not_present not_present; |
132 | __u64 word[4]; |
139 | __u64 word[4]; |
133 | } vhpt_entry_t; |
140 | } vhpt_entry_t; |
134 | 141 | ||
135 | struct region_register_map { |
142 | struct region_register_map { |
136 | unsigned ve : 1; |
143 | unsigned ve : 1; |
137 | unsigned : 1; |
144 | unsigned : 1; |
138 | unsigned ps : 6; |
145 | unsigned ps : 6; |
139 | unsigned rid : 24; |
146 | unsigned rid : 24; |
140 | unsigned : 32; |
147 | unsigned : 32; |
141 | } __attribute__ ((packed)); |
148 | } __attribute__ ((packed)); |
142 | 149 | ||
143 | typedef union region_register { |
150 | typedef union region_register { |
144 | struct region_register_map map; |
151 | struct region_register_map map; |
145 | unsigned long long word; |
152 | unsigned long long word; |
146 | } region_register; |
153 | } region_register; |
147 | 154 | ||
148 | struct pta_register_map { |
155 | struct pta_register_map { |
149 | unsigned ve : 1; |
156 | unsigned ve : 1; |
150 | unsigned : 1; |
157 | unsigned : 1; |
151 | unsigned size : 6; |
158 | unsigned size : 6; |
152 | unsigned vf : 1; |
159 | unsigned vf : 1; |
153 | unsigned : 6; |
160 | unsigned : 6; |
154 | unsigned long long base : 49; |
161 | unsigned long long base : 49; |
155 | } __attribute__ ((packed)); |
162 | } __attribute__ ((packed)); |
156 | 163 | ||
157 | typedef union pta_register { |
164 | typedef union pta_register { |
158 | struct pta_register_map map; |
165 | struct pta_register_map map; |
159 | __u64 word; |
166 | __u64 word; |
160 | } pta_register; |
167 | } pta_register; |
161 | 168 | ||
162 | /** Return Translation Hashed Entry Address. |
169 | /** Return Translation Hashed Entry Address. |
163 | * |
170 | * |
164 | * VRN bits are used to read RID (ASID) from one |
171 | * VRN bits are used to read RID (ASID) from one |
165 | * of the eight region registers registers. |
172 | * of the eight region registers registers. |
166 | * |
173 | * |
167 | * @param va Virtual address including VRN bits. |
174 | * @param va Virtual address including VRN bits. |
168 | * |
175 | * |
169 | * @return Address of the head of VHPT collision chain. |
176 | * @return Address of the head of VHPT collision chain. |
170 | */ |
177 | */ |
171 | static inline __u64 thash(__u64 va) |
178 | static inline __u64 thash(__u64 va) |
172 | { |
179 | { |
173 | __u64 ret; |
180 | __u64 ret; |
174 | 181 | ||
175 | __asm__ volatile ("thash %0 = %1\n" : "=r" (ret) : "r" (va)); |
182 | __asm__ volatile ("thash %0 = %1\n" : "=r" (ret) : "r" (va)); |
176 | 183 | ||
177 | return ret; |
184 | return ret; |
178 | } |
185 | } |
179 | 186 | ||
180 | /** Return Translation Hashed Entry Tag. |
187 | /** Return Translation Hashed Entry Tag. |
181 | * |
188 | * |
182 | * VRN bits are used to read RID (ASID) from one |
189 | * VRN bits are used to read RID (ASID) from one |
183 | * of the eight region registers. |
190 | * of the eight region registers. |
184 | * |
191 | * |
185 | * @param va Virtual address including VRN bits. |
192 | * @param va Virtual address including VRN bits. |
186 | * |
193 | * |
187 | * @return The unique tag for VPN and RID in the collision chain returned by thash(). |
194 | * @return The unique tag for VPN and RID in the collision chain returned by thash(). |
188 | */ |
195 | */ |
189 | static inline __u64 ttag(__u64 va) |
196 | static inline __u64 ttag(__u64 va) |
190 | { |
197 | { |
191 | __u64 ret; |
198 | __u64 ret; |
192 | 199 | ||
193 | __asm__ volatile ("ttag %0 = %1\n" : "=r" (ret) : "r" (va)); |
200 | __asm__ volatile ("ttag %0 = %1\n" : "=r" (ret) : "r" (va)); |
194 | 201 | ||
195 | return ret; |
202 | return ret; |
196 | } |
203 | } |
197 | 204 | ||
198 | /** Read Region Register. |
205 | /** Read Region Register. |
199 | * |
206 | * |
200 | * @param i Region register index. |
207 | * @param i Region register index. |
201 | * |
208 | * |
202 | * @return Current contents of rr[i]. |
209 | * @return Current contents of rr[i]. |
203 | */ |
210 | */ |
204 | static inline __u64 rr_read(index_t i) |
211 | static inline __u64 rr_read(index_t i) |
205 | { |
212 | { |
206 | __u64 ret; |
213 | __u64 ret; |
207 | 214 | ||
208 | ASSERT(i < REGION_REGISTERS); |
215 | ASSERT(i < REGION_REGISTERS); |
209 | __asm__ volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i)); |
216 | __asm__ volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i)); |
210 | 217 | ||
211 | return ret; |
218 | return ret; |
212 | } |
219 | } |
213 | 220 | ||
214 | 221 | ||
215 | /** Write Region Register. |
222 | /** Write Region Register. |
216 | * |
223 | * |
217 | * @param i Region register index. |
224 | * @param i Region register index. |
218 | * @param v Value to be written to rr[i]. |
225 | * @param v Value to be written to rr[i]. |
219 | */ |
226 | */ |
220 | static inline void rr_write(index_t i, __u64 v) |
227 | static inline void rr_write(index_t i, __u64 v) |
221 | { |
228 | { |
222 | ASSERT(i < REGION_REGISTERS); |
229 | ASSERT(i < REGION_REGISTERS); |
- | 230 | __asm__ volatile ( |
|
- | 231 | "mov rr[%0] = %1;;\n" |
|
- | 232 | "srlz.d;;\n" |
|
- | 233 | : |
|
223 | __asm__ volatile ("mov rr[%0] = %1\n" : : "r" (i), "r" (v)); |
234 | : "r" (i), "r" (v)); |
224 | } |
235 | } |
225 | 236 | ||
226 | /** Read Page Table Register. |
237 | /** Read Page Table Register. |
227 | * |
238 | * |
228 | * @return Current value stored in PTA. |
239 | * @return Current value stored in PTA. |
229 | */ |
240 | */ |
230 | static inline __u64 pta_read(void) |
241 | static inline __u64 pta_read(void) |
231 | { |
242 | { |
232 | __u64 ret; |
243 | __u64 ret; |
233 | 244 | ||
234 | __asm__ volatile ("mov %0 = cr.pta\n" : "=r" (ret)); |
245 | __asm__ volatile ("mov %0 = cr.pta\n" : "=r" (ret)); |
235 | 246 | ||
236 | return ret; |
247 | return ret; |
237 | } |
248 | } |
238 | 249 | ||
239 | /** Write Page Table Register. |
250 | /** Write Page Table Register. |
240 | * |
251 | * |
241 | * @param v New value to be stored in PTA. |
252 | * @param v New value to be stored in PTA. |
242 | */ |
253 | */ |
243 | static inline void pta_write(__u64 v) |
254 | static inline void pta_write(__u64 v) |
244 | { |
255 | { |
245 | __asm__ volatile ("mov cr.pta = %0\n" : : "r" (v)); |
256 | __asm__ volatile ("mov cr.pta = %0\n" : : "r" (v)); |
246 | } |
257 | } |
247 | 258 | ||
248 | extern void page_arch_init(void); |
259 | extern void page_arch_init(void); |
249 | 260 | ||
250 | extern vhpt_entry_t *vhpt_hash(__address page, asid_t asid); |
261 | extern vhpt_entry_t *vhpt_hash(__address page, asid_t asid); |
251 | extern bool vhpt_compare(__address page, asid_t asid, vhpt_entry_t *v); |
262 | extern bool vhpt_compare(__address page, asid_t asid, vhpt_entry_t *v); |
252 | extern void vhpt_set_record(vhpt_entry_t *v, __address page, asid_t asid, __address frame, int flags); |
263 | extern void vhpt_set_record(vhpt_entry_t *v, __address page, asid_t asid, __address frame, int flags); |
253 | 264 | ||
254 | #endif |
265 | #endif |
255 | 266 |