WebSVN – HelenOS – Diff – /trunk/kernel/arch/ia64/include/interrupt.h


/*
 * Copyright (C) 2005 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup ia64interrupt
 * @{
 */
/** @file
 */
 
#ifndef KERN_ia64_INTERRUPT_H_
#define KERN_ia64_INTERRUPT_H_
 
#include <typedefs.h>
#include <arch/types.h>
#include <arch/register.h>
 
/** ia64 has 256 INRs. */
#define INR_COUNT   256
 
/*
 * We need to keep this just to compile.
 * We might eventually move interrupt/ stuff
 * to genarch.
 */
#define IVT_ITEMS       0
#define IVT_FIRST       0
 
/** External Interrupt vectors. */
#define INTERRUPT_TIMER     0
#define INTERRUPT_SPURIOUS  15
 
/** General Exception codes. */
#define GE_ILLEGALOP        0
#define GE_PRIVOP       1
#define GE_PRIVREG      2
#define GE_RESREGFLD        3
#define GE_DISBLDISTRAN     4
#define GE_ILLEGALDEP       8
 
#define EOI 0       /**< The actual value doesn't matter. */
 
struct istate {
    __r128 f2;
    __r128 f3;
    __r128 f4;
    __r128 f5;
    __r128 f6;
    __r128 f7;
    __r128 f8;
    __r128 f9;
    __r128 f10;
    __r128 f11;
    __r128 f12;
    __r128 f13;
    __r128 f14;
    __r128 f15;
    __r128 f16;
    __r128 f17;
    __r128 f18;
    __r128 f19;
    __r128 f20;
    __r128 f21;
    __r128 f22;
    __r128 f23;
    __r128 f24;
    __r128 f25;
    __r128 f26;
    __r128 f27;
    __r128 f28;
    __r128 f29;
    __r128 f30;
    __r128 f31;
       
    uintptr_t ar_bsp;
    uintptr_t ar_bspstore;
    uintptr_t ar_bspstore_new;
    uint64_t ar_rnat;
    uint64_t ar_ifs;
    uint64_t ar_pfs;
    uint64_t ar_rsc;
    uintptr_t cr_ifa;
    cr_isr_t cr_isr;
    uintptr_t cr_iipa;
    psr_t cr_ipsr;
    uintptr_t cr_iip;
    uint64_t pr;
    uintptr_t sp;
   
    /*
     * The following variables are defined only for break_instruction handler.
     */
    uint64_t in0;
    uint64_t in1;
    uint64_t in2;
    uint64_t in3;
    uint64_t in4;
};
 
static inline void istate_set_retaddr(istate_t *istate, uintptr_t retaddr)
{
    istate->cr_iip = retaddr;
    istate->cr_ipsr.ri = 0;     /* return to instruction slot #0 */
}
 
static inline unative_t istate_get_pc(istate_t *istate)
{
    return istate->cr_iip;
}
 
static inline int istate_from_uspace(istate_t *istate)
{
    return (istate->cr_iip) < 0xe000000000000000ULL;
}
 
extern void *ivt;
 
extern void general_exception(uint64_t vector, istate_t *istate);
extern int break_instruction(uint64_t vector, istate_t *istate);
extern void universal_handler(uint64_t vector, istate_t *istate);
extern void nop_handler(uint64_t vector, istate_t *istate);
extern void external_interrupt(uint64_t vector, istate_t *istate);
 
extern void disabled_fp_register(uint64_t vector, istate_t *istate);
 
#endif
 
/** @}
 */
 

Rev 1888	Rev 1942
1	/*	1	/*
2	* Copyright (C) 2005 Jakub Jermar	2	* Copyright (C) 2005 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup ia64interrupt	29	/** @addtogroup ia64interrupt
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35	#ifndef KERN_ia64_INTERRUPT_H_	35	#ifndef KERN_ia64_INTERRUPT_H_
36	#define KERN_ia64_INTERRUPT_H_	36	#define KERN_ia64_INTERRUPT_H_
37		37
38	#include <typedefs.h>	38	#include <typedefs.h>
39	#include <arch/types.h>	39	#include <arch/types.h>
40	#include <arch/register.h>	40	#include <arch/register.h>
41		41
-		42	/** ia64 has 256 INRs. */
-		43	#define INR_COUNT 256
-		44
-		45	/*
42	#define IRQ_COUNT 257 /* 256 NOT suppotred IRQS// TODO */	46	* We need to keep this just to compile.
43	#define IRQ_KBD 256 /* One simulated interrupt for ski simulator keyboard*/	47	* We might eventually move interrupt/ stuff
-		48	* to genarch.
-		49	*/
-		50	#define IVT_ITEMS 0
-		51	#define IVT_FIRST 0
44		52
45	/** External Interrupt vectors. */	53	/** External Interrupt vectors. */
46	#define INTERRUPT_TIMER 0	54	#define INTERRUPT_TIMER 0
47	#define INTERRUPT_SPURIOUS 15	55	#define INTERRUPT_SPURIOUS 15
48		56
49	/** General Exception codes. */	57	/** General Exception codes. */
50	#define GE_ILLEGALOP 0	58	#define GE_ILLEGALOP 0
51	#define GE_PRIVOP 1	59	#define GE_PRIVOP 1
52	#define GE_PRIVREG 2	60	#define GE_PRIVREG 2
53	#define GE_RESREGFLD 3	61	#define GE_RESREGFLD 3
54	#define GE_DISBLDISTRAN 4	62	#define GE_DISBLDISTRAN 4
55	#define GE_ILLEGALDEP 8	63	#define GE_ILLEGALDEP 8
56		64
57	#define EOI 0 /*< The actual value doesn't matter. /	65	#define EOI 0 /*< The actual value doesn't matter. /
58		66
59	struct istate {	67	struct istate {
60	__r128 f2;	68	__r128 f2;
61	__r128 f3;	69	__r128 f3;
62	__r128 f4;	70	__r128 f4;
63	__r128 f5;	71	__r128 f5;
64	__r128 f6;	72	__r128 f6;
65	__r128 f7;	73	__r128 f7;
66	__r128 f8;	74	__r128 f8;
67	__r128 f9;	75	__r128 f9;
68	__r128 f10;	76	__r128 f10;
69	__r128 f11;	77	__r128 f11;
70	__r128 f12;	78	__r128 f12;
71	__r128 f13;	79	__r128 f13;
72	__r128 f14;	80	__r128 f14;
73	__r128 f15;	81	__r128 f15;
74	__r128 f16;	82	__r128 f16;
75	__r128 f17;	83	__r128 f17;
76	__r128 f18;	84	__r128 f18;
77	__r128 f19;	85	__r128 f19;
78	__r128 f20;	86	__r128 f20;
79	__r128 f21;	87	__r128 f21;
80	__r128 f22;	88	__r128 f22;
81	__r128 f23;	89	__r128 f23;
82	__r128 f24;	90	__r128 f24;
83	__r128 f25;	91	__r128 f25;
84	__r128 f26;	92	__r128 f26;
85	__r128 f27;	93	__r128 f27;
86	__r128 f28;	94	__r128 f28;
87	__r128 f29;	95	__r128 f29;
88	__r128 f30;	96	__r128 f30;
89	__r128 f31;	97	__r128 f31;
90		98
91	uintptr_t ar_bsp;	99	uintptr_t ar_bsp;
92	uintptr_t ar_bspstore;	100	uintptr_t ar_bspstore;
93	uintptr_t ar_bspstore_new;	101	uintptr_t ar_bspstore_new;
94	uint64_t ar_rnat;	102	uint64_t ar_rnat;
95	uint64_t ar_ifs;	103	uint64_t ar_ifs;
96	uint64_t ar_pfs;	104	uint64_t ar_pfs;
97	uint64_t ar_rsc;	105	uint64_t ar_rsc;
98	uintptr_t cr_ifa;	106	uintptr_t cr_ifa;
99	cr_isr_t cr_isr;	107	cr_isr_t cr_isr;
100	uintptr_t cr_iipa;	108	uintptr_t cr_iipa;
101	psr_t cr_ipsr;	109	psr_t cr_ipsr;
102	uintptr_t cr_iip;	110	uintptr_t cr_iip;
103	uint64_t pr;	111	uint64_t pr;
104	uintptr_t sp;	112	uintptr_t sp;
105		113
106	/*	114	/*
107	* The following variables are defined only for break_instruction handler.	115	* The following variables are defined only for break_instruction handler.
108	*/	116	*/
109	uint64_t in0;	117	uint64_t in0;
110	uint64_t in1;	118	uint64_t in1;
111	uint64_t in2;	119	uint64_t in2;
112	uint64_t in3;	120	uint64_t in3;
113	uint64_t in4;	121	uint64_t in4;
114	};	122	};
115		123
116	static inline void istate_set_retaddr(istate_t *istate, uintptr_t retaddr)	124	static inline void istate_set_retaddr(istate_t *istate, uintptr_t retaddr)
117	{	125	{
118	istate->cr_iip = retaddr;	126	istate->cr_iip = retaddr;
119	istate->cr_ipsr.ri = 0; /* return to instruction slot #0 */	127	istate->cr_ipsr.ri = 0; /* return to instruction slot #0 */
120	}	128	}
121		129
122	static inline unative_t istate_get_pc(istate_t *istate)	130	static inline unative_t istate_get_pc(istate_t *istate)
123	{	131	{
124	return istate->cr_iip;	132	return istate->cr_iip;
125	}	133	}
126		134
127	static inline int istate_from_uspace(istate_t *istate)	135	static inline int istate_from_uspace(istate_t *istate)
128	{	136	{
129	return (istate->cr_iip)<0xe000000000000000ULL;	137	return (istate->cr_iip) < 0xe000000000000000ULL;
130	}	138	}
131		139
132	extern void *ivt;	140	extern void *ivt;
133		141
134	extern void general_exception(uint64_t vector, istate_t *istate);	142	extern void general_exception(uint64_t vector, istate_t *istate);
135	extern int break_instruction(uint64_t vector, istate_t *istate);	143	extern int break_instruction(uint64_t vector, istate_t *istate);
136	extern void universal_handler(uint64_t vector, istate_t *istate);	144	extern void universal_handler(uint64_t vector, istate_t *istate);
137	extern void nop_handler(uint64_t vector, istate_t *istate);	145	extern void nop_handler(uint64_t vector, istate_t *istate);
138	extern void external_interrupt(uint64_t vector, istate_t *istate);	146	extern void external_interrupt(uint64_t vector, istate_t *istate);
139	extern void virtual_interrupt(uint64_t irq, void *param);	-
140	extern void disabled_fp_register(uint64_t vector, istate_t *istate);	147	extern void disabled_fp_register(uint64_t vector, istate_t *istate);
141		148
142	#endif	149	#endif
143		150
144	/** @}	151	/** @}
145	*/	152	*/
146		153

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(root)/trunk/kernel/arch/ia64/include/interrupt.h – Rev 1888 → 1942