WebSVN – HelenOS – Diff – /trunk/kernel/arch/ia32xen/src/ia32xen.c


/*
 * Copyright (C) 2006 Martin Decky
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup ia32xen
 * @{
 */
/** @file
 */
 
#include <arch.h>
#include <main/main.h>
 
#include <arch/types.h>
#include <typedefs.h>
#include <align.h>
 
#include <arch/pm.h>
 
#include <arch/drivers/xconsole.h>
#include <arch/mm/page.h>
 
#include <arch/context.h>
 
#include <config.h>
 
#include <arch/interrupt.h>
#include <arch/asm.h>
#include <genarch/acpi/acpi.h>
 
#include <arch/bios/bios.h>
 
#include <arch/boot/boot.h>
#include <arch/mm/memory_init.h>
#include <interrupt.h>
#include <arch/debugger.h>
#include <proc/thread.h>
#include <syscall/syscall.h>
#include <console/console.h>
#include <ddi/irq.h>
 
start_info_t start_info;
memzone_t meminfo;
 
extern void xen_callback(void);
extern void xen_failsafe_callback(void);
 
void arch_pre_main(void)
{
 
 
    pte_t pte;
    memsetb((uintptr_t) &pte, sizeof(pte), 0);
   
    pte.present = 1;
    pte.writeable = 1;
    pte.frame_address = ADDR2PFN((uintptr_t) start_info.shared_info);
    ASSERT(xen_update_va_mapping(&shared_info, pte, UVMF_INVLPG) == 0);
   
    if (!(start_info.flags & SIF_INITDOMAIN)) {
        /* Map console frame */
        pte.present = 1;
        pte.writeable = 1;
        pte.frame_address = start_info.console.domU.mfn;
        ASSERT(xen_update_va_mapping(&console_page, pte, UVMF_INVLPG) == 0);
    } else
        start_info.console.domU.evtchn = 0;
   
    ASSERT(xen_set_callbacks(XEN_CS, xen_callback, XEN_CS, xen_failsafe_callback) == 0);
   
    /* Create identity mapping */
   
    meminfo.start = ADDR2PFN(ALIGN_UP(KA2PA(start_info.ptl0), PAGE_SIZE)) + start_info.pt_frames;
    meminfo.size = start_info.frames - meminfo.start;
    meminfo.reserved = 0;
 
    uintptr_t pa;
    index_t last_ptl0 = 0;
    for (pa = PFN2ADDR(meminfo.start); pa < PFN2ADDR(meminfo.start + meminfo.size); pa += FRAME_SIZE) {
        uintptr_t va = PA2KA(pa);
       
        if ((PTL0_INDEX(va) != last_ptl0) && (GET_PTL1_FLAGS(start_info.ptl0, PTL0_INDEX(va)) & PAGE_NOT_PRESENT)) {
            /* New page directory entry needed */
            uintptr_t tpa = PFN2ADDR(meminfo.start + meminfo.reserved);
            uintptr_t tva = PA2KA(tpa);
           
            memsetb(tva, PAGE_SIZE, 0);
           
            pte_t *tptl3 = (pte_t *) PA2KA(GET_PTL1_ADDRESS(start_info.ptl0, PTL0_INDEX(tva)));
            SET_FRAME_ADDRESS(tptl3, PTL3_INDEX(tva), 0);
            SET_PTL1_ADDRESS(start_info.ptl0, PTL0_INDEX(va), tpa);
            SET_FRAME_ADDRESS(tptl3, PTL3_INDEX(tva), tpa);
           
            last_ptl0 = PTL0_INDEX(va);
            meminfo.reserved++;
        }
       
        pte_t *ptl3 = (pte_t *) PA2KA(GET_PTL1_ADDRESS(start_info.ptl0, PTL0_INDEX(va)));
       
        SET_FRAME_ADDRESS(ptl3, PTL3_INDEX(va), pa);
        SET_FRAME_FLAGS(ptl3, PTL3_INDEX(va), PAGE_PRESENT | PAGE_WRITE);
    }
   
    /* Put initial stack safely in the mapped area */
    stack_safe = PA2KA(PFN2ADDR(meminfo.start + meminfo.reserved));
}
 
void arch_pre_mm_init(void)
{
    pm_init();
 
    if (config.cpu_active == 1) {
        interrupt_init();
//      bios_init();
       
    }
}
 
void arch_post_mm_init(void)
{
    if (config.cpu_active == 1) {
        /* Initialize IRQ routing */
        irq_init(IRQ_COUNT, IRQ_COUNT);
       
        /* Video */
        xen_console_init();
       
        /* Enable debugger */
        debugger_init();
       
        /* Merge all memory zones to 1 big zone */
        zone_merge_all();
    }
}
 
void arch_post_cpu_init(void)
{
}
 
void arch_pre_smp_init(void)
{
    if (config.cpu_active == 1) {
        memory_print_map();
       
        #ifdef CONFIG_SMP
        acpi_init();
        #endif /* CONFIG_SMP */
    }
}
 
void arch_post_smp_init(void)
{
}
 
void calibrate_delay_loop(void)
{
//  i8254_calibrate_delay_loop();
    if (config.cpu_active == 1) {
        /*
         * This has to be done only on UP.
         * On SMP, i8254 is not used for time keeping and its interrupt pin remains masked.
         */
//      i8254_normal_operation();
    }
}
 
/** Set thread-local-storage pointer
 *
 * TLS pointer is set in GS register. That means, the GS contains
 * selector, and the descriptor->base is the correct address.
 */
unative_t sys_tls_set(unative_t addr)
{
    THREAD->arch.tls = addr;
    set_tls_desc(addr);
 
    return 0;
}
 
/** Acquire console back for kernel
 *
 */
void arch_grab_console(void)
{
}
 
/** Return console to userspace
 *
 */
void arch_release_console(void)
{
}
 
/** @}
 */
 

Rev 1959	Rev 2017
1	/*	1	/*
2	* Copyright (C) 2006 Martin Decky	2	* Copyright (C) 2006 Martin Decky
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup ia32xen	29	/** @addtogroup ia32xen
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35	#include <arch.h>	35	#include <arch.h>
36	#include <main/main.h>	36	#include <main/main.h>
37		37
38	#include <arch/types.h>	38	#include <arch/types.h>
39	#include <typedefs.h>	39	#include <typedefs.h>
40	#include <align.h>	40	#include <align.h>
41		41
42	#include <arch/pm.h>	42	#include <arch/pm.h>
43		43
44	#include <arch/drivers/xconsole.h>	44	#include <arch/drivers/xconsole.h>
45	#include <arch/mm/page.h>	45	#include <arch/mm/page.h>
46		46
47	#include <arch/context.h>	47	#include <arch/context.h>
48		48
49	#include <config.h>	49	#include <config.h>
50		50
51	#include <arch/interrupt.h>	51	#include <arch/interrupt.h>
52	#include <arch/asm.h>	52	#include <arch/asm.h>
53	#include <genarch/acpi/acpi.h>	53	#include <genarch/acpi/acpi.h>
54		54
55	#include <arch/bios/bios.h>	55	#include <arch/bios/bios.h>
56		56
57	#include <arch/boot/boot.h>	57	#include <arch/boot/boot.h>
58	#include <arch/mm/memory_init.h>	58	#include <arch/mm/memory_init.h>
59	#include <interrupt.h>	59	#include <interrupt.h>
60	#include <arch/debugger.h>	60	#include <arch/debugger.h>
61	#include <proc/thread.h>	61	#include <proc/thread.h>
62	#include <syscall/syscall.h>	62	#include <syscall/syscall.h>
63	#include <console/console.h>	63	#include <console/console.h>
64	#include <ddi/irq.h>	64	#include <ddi/irq.h>
65		65
66	start_info_t start_info;	66	start_info_t start_info;
67	memzone_t meminfo;	67	memzone_t meminfo;
68		68
69	extern void xen_callback(void);	69	extern void xen_callback(void);
70	extern void xen_failsafe_callback(void);	70	extern void xen_failsafe_callback(void);
71		71
72	void arch_pre_main(void)	72	void arch_pre_main(void)
73	{	73	{
74	xen_vm_assist(VMASST_CMD_ENABLE, VMASST_TYPE_WRITABLE_PAGETABLES);	-
75		-
76	pte_t pte;	74	pte_t pte;
77	memsetb((uintptr_t) &pte, sizeof(pte), 0);	75	memsetb((uintptr_t) &pte, sizeof(pte), 0);
78		76
79	pte.present = 1;	77	pte.present = 1;
80	pte.writeable = 1;	78	pte.writeable = 1;
81	pte.frame_address = ADDR2PFN((uintptr_t) start_info.shared_info);	79	pte.frame_address = ADDR2PFN((uintptr_t) start_info.shared_info);
82	xen_update_va_mapping(&shared_info, pte, UVMF_INVLPG);	80	ASSERT(xen_update_va_mapping(&shared_info, pte, UVMF_INVLPG) == 0);
83		81
-		82	if (!(start_info.flags & SIF_INITDOMAIN)) {
-		83	/* Map console frame */
84	pte.present = 1;	84	pte.present = 1;
85	pte.writeable = 1;	85	pte.writeable = 1;
86	pte.frame_address = start_info.console_mfn;	86	pte.frame_address = start_info.console.domU.mfn;
87	xen_update_va_mapping(&console_page, pte, UVMF_INVLPG);	87	ASSERT(xen_update_va_mapping(&console_page, pte, UVMF_INVLPG) == 0);
-		88	} else
-		89	start_info.console.domU.evtchn = 0;
88		90
89	xen_set_callbacks(XEN_CS, xen_callback, XEN_CS, xen_failsafe_callback);	91	ASSERT(xen_set_callbacks(XEN_CS, xen_callback, XEN_CS, xen_failsafe_callback) == 0);
90		92
91	/* Create identity mapping */	93	/* Create identity mapping */
92		94
93	meminfo.start = ADDR2PFN(ALIGN_UP(KA2PA(start_info.ptl0), PAGE_SIZE)) + start_info.pt_frames;	95	meminfo.start = ADDR2PFN(ALIGN_UP(KA2PA(start_info.ptl0), PAGE_SIZE)) + start_info.pt_frames;
94	meminfo.size = start_info.frames - meminfo.start;	96	meminfo.size = start_info.frames - meminfo.start;
95	meminfo.reserved = 0;	97	meminfo.reserved = 0;
96		98
97	uintptr_t pa;	99	uintptr_t pa;
98	index_t last_ptl0 = 0;	100	index_t last_ptl0 = 0;
99	for (pa = PFN2ADDR(meminfo.start); pa < PFN2ADDR(meminfo.start + meminfo.size); pa += FRAME_SIZE) {	101	for (pa = PFN2ADDR(meminfo.start); pa < PFN2ADDR(meminfo.start + meminfo.size); pa += FRAME_SIZE) {
100	uintptr_t va = PA2KA(pa);	102	uintptr_t va = PA2KA(pa);
101		103
102	if ((PTL0_INDEX(va) != last_ptl0) && (GET_PTL1_FLAGS(start_info.ptl0, PTL0_INDEX(va)) & PAGE_NOT_PRESENT)) {	104	if ((PTL0_INDEX(va) != last_ptl0) && (GET_PTL1_FLAGS(start_info.ptl0, PTL0_INDEX(va)) & PAGE_NOT_PRESENT)) {
103	/* New page directory entry needed */	105	/* New page directory entry needed */
104	uintptr_t tpa = PFN2ADDR(meminfo.start + meminfo.reserved);	106	uintptr_t tpa = PFN2ADDR(meminfo.start + meminfo.reserved);
105	uintptr_t tva = PA2KA(tpa);	107	uintptr_t tva = PA2KA(tpa);
106		108
107	memsetb(tva, PAGE_SIZE, 0);	109	memsetb(tva, PAGE_SIZE, 0);
108		110
109	pte_t tptl3 = (pte_t ) PA2KA(GET_PTL1_ADDRESS(start_info.ptl0, PTL0_INDEX(tva)));	111	pte_t tptl3 = (pte_t ) PA2KA(GET_PTL1_ADDRESS(start_info.ptl0, PTL0_INDEX(tva)));
110	SET_FRAME_FLAGS(tptl3, PTL3_INDEX(tva), PAGE_PRESENT);	112	SET_FRAME_ADDRESS(tptl3, PTL3_INDEX(tva), 0);
111	SET_PTL1_ADDRESS(start_info.ptl0, PTL0_INDEX(va), tpa);	113	SET_PTL1_ADDRESS(start_info.ptl0, PTL0_INDEX(va), tpa);
-		114	SET_FRAME_ADDRESS(tptl3, PTL3_INDEX(tva), tpa);
112		115
113	last_ptl0 = PTL0_INDEX(va);	116	last_ptl0 = PTL0_INDEX(va);
114	meminfo.reserved++;	117	meminfo.reserved++;
115	}	118	}
116		119
117	pte_t ptl3 = (pte_t ) PA2KA(GET_PTL1_ADDRESS(start_info.ptl0, PTL0_INDEX(va)));	120	pte_t ptl3 = (pte_t ) PA2KA(GET_PTL1_ADDRESS(start_info.ptl0, PTL0_INDEX(va)));
118		121
119	SET_FRAME_ADDRESS(ptl3, PTL3_INDEX(va), pa);	122	SET_FRAME_ADDRESS(ptl3, PTL3_INDEX(va), pa);
120	SET_FRAME_FLAGS(ptl3, PTL3_INDEX(va), PAGE_PRESENT \| PAGE_WRITE);	123	SET_FRAME_FLAGS(ptl3, PTL3_INDEX(va), PAGE_PRESENT \| PAGE_WRITE);
121	}	124	}
122		125
123	/* Put initial stack safely in the mapped area */	126	/* Put initial stack safely in the mapped area */
124	stack_safe = PA2KA(PFN2ADDR(meminfo.start + meminfo.reserved));	127	stack_safe = PA2KA(PFN2ADDR(meminfo.start + meminfo.reserved));
125	}	128	}
126		129
127	void arch_pre_mm_init(void)	130	void arch_pre_mm_init(void)
128	{	131	{
129	pm_init();	132	pm_init();
130		133
131	if (config.cpu_active == 1) {	134	if (config.cpu_active == 1) {
132	interrupt_init();	135	interrupt_init();
133	// bios_init();	136	// bios_init();
134		137
135	}	138	}
136	}	139	}
137		140
138	void arch_post_mm_init(void)	141	void arch_post_mm_init(void)
139	{	142	{
140	if (config.cpu_active == 1) {	143	if (config.cpu_active == 1) {
141	/* Initialize IRQ routing */	144	/* Initialize IRQ routing */
142	irq_init(IRQ_COUNT, IRQ_COUNT);	145	irq_init(IRQ_COUNT, IRQ_COUNT);
143		146
144	/* Video */	147	/* Video */
145	xen_console_init();	148	xen_console_init();
146		149
147	/* Enable debugger */	150	/* Enable debugger */
148	debugger_init();	151	debugger_init();
149		152
150	/* Merge all memory zones to 1 big zone */	153	/* Merge all memory zones to 1 big zone */
151	zone_merge_all();	154	zone_merge_all();
152	}	155	}
153	}	156	}
154		157
155	void arch_post_cpu_init(void)	158	void arch_post_cpu_init(void)
156	{	159	{
157	}	160	}
158		161
159	void arch_pre_smp_init(void)	162	void arch_pre_smp_init(void)
160	{	163	{
161	if (config.cpu_active == 1) {	164	if (config.cpu_active == 1) {
162	memory_print_map();	165	memory_print_map();
163		166
164	#ifdef CONFIG_SMP	167	#ifdef CONFIG_SMP
165	acpi_init();	168	acpi_init();
166	#endif /* CONFIG_SMP */	169	#endif /* CONFIG_SMP */
167	}	170	}
168	}	171	}
169		172
170	void arch_post_smp_init(void)	173	void arch_post_smp_init(void)
171	{	174	{
172	}	175	}
173		176
174	void calibrate_delay_loop(void)	177	void calibrate_delay_loop(void)
175	{	178	{
176	// i8254_calibrate_delay_loop();	179	// i8254_calibrate_delay_loop();
177	if (config.cpu_active == 1) {	180	if (config.cpu_active == 1) {
178	/*	181	/*
179	* This has to be done only on UP.	182	* This has to be done only on UP.
180	* On SMP, i8254 is not used for time keeping and its interrupt pin remains masked.	183	* On SMP, i8254 is not used for time keeping and its interrupt pin remains masked.
181	*/	184	*/
182	// i8254_normal_operation();	185	// i8254_normal_operation();
183	}	186	}
184	}	187	}
185		188
186	/** Set thread-local-storage pointer	189	/** Set thread-local-storage pointer
187	*	190	*
188	* TLS pointer is set in GS register. That means, the GS contains	191	* TLS pointer is set in GS register. That means, the GS contains
189	* selector, and the descriptor->base is the correct address.	192	* selector, and the descriptor->base is the correct address.
190	*/	193	*/
191	unative_t sys_tls_set(unative_t addr)	194	unative_t sys_tls_set(unative_t addr)
192	{	195	{
193	THREAD->arch.tls = addr;	196	THREAD->arch.tls = addr;
194	set_tls_desc(addr);	197	set_tls_desc(addr);
195		198
196	return 0;	199	return 0;
197	}	200	}
198		201
199	/** Acquire console back for kernel	202	/** Acquire console back for kernel
200	*	203	*
201	*/	204	*/
202	void arch_grab_console(void)	205	void arch_grab_console(void)
203	{	206	{
204	}	207	}
205		208
206	/** Return console to userspace	209	/** Return console to userspace
207	*	210	*
208	*/	211	*/
209	void arch_release_console(void)	212	void arch_release_console(void)
210	{	213	{
211	}	214	}
212		215
213	/** @}	216	/** @}
214	*/	217	*/
215		218

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