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/*
1
/*
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 * Copyright (C) 2006 Martin Decky
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 * Copyright (C) 2006 Martin Decky
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 * All rights reserved.
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 * All rights reserved.
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 *
4
 *
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 * Redistribution and use in source and binary forms, with or without
5
 * Redistribution and use in source and binary forms, with or without
6
 * modification, are permitted provided that the following conditions
6
 * modification, are permitted provided that the following conditions
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 * are met:
7
 * are met:
8
 *
8
 *
9
 * - Redistributions of source code must retain the above copyright
9
 * - Redistributions of source code must retain the above copyright
10
 *   notice, this list of conditions and the following disclaimer.
10
 *   notice, this list of conditions and the following disclaimer.
11
 * - Redistributions in binary form must reproduce the above copyright
11
 * - Redistributions in binary form must reproduce the above copyright
12
 *   notice, this list of conditions and the following disclaimer in the
12
 *   notice, this list of conditions and the following disclaimer in the
13
 *   documentation and/or other materials provided with the distribution.
13
 *   documentation and/or other materials provided with the distribution.
14
 * - The name of the author may not be used to endorse or promote products
14
 * - The name of the author may not be used to endorse or promote products
15
 *   derived from this software without specific prior written permission.
15
 *   derived from this software without specific prior written permission.
16
 *
16
 *
17
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
 */
27
 */
28
 
28
 
29
/** @addtogroup ia32xen_mm 
29
/** @addtogroup ia32xen_mm 
30
 * @{
30
 * @{
31
 */
31
 */
32
/** @file
32
/** @file
33
 */
33
 */
34
 
34
 
35
#ifndef KERN_ia32xen_PAGE_H_
35
#ifndef KERN_ia32xen_PAGE_H_
36
#define KERN_ia32xen_PAGE_H_
36
#define KERN_ia32xen_PAGE_H_
37
 
37
 
38
#include <arch/mm/frame.h>
38
#include <arch/mm/frame.h>
39
 
39
 
40
#define PAGE_WIDTH  FRAME_WIDTH
40
#define PAGE_WIDTH  FRAME_WIDTH
41
#define PAGE_SIZE   FRAME_SIZE
41
#define PAGE_SIZE   FRAME_SIZE
42
 
42
 
-
 
43
#define PAGE_COLOR_BITS 0           /* dummy */
-
 
44
 
43
#ifdef KERNEL
45
#ifdef KERNEL
44
 
46
 
45
#ifndef __ASM__
47
#ifndef __ASM__
46
#   define KA2PA(x) (((uintptr_t) (x)) - 0x80000000)
48
#   define KA2PA(x) (((uintptr_t) (x)) - 0x80000000)
47
#   define PA2KA(x) (((uintptr_t) (x)) + 0x80000000)
49
#   define PA2KA(x) (((uintptr_t) (x)) + 0x80000000)
48
#else
50
#else
49
#   define KA2PA(x) ((x) - 0x80000000)
51
#   define KA2PA(x) ((x) - 0x80000000)
50
#   define PA2KA(x) ((x) + 0x80000000)
52
#   define PA2KA(x) ((x) + 0x80000000)
51
#endif
53
#endif
52
 
54
 
53
/*
55
/*
54
 * Implementation of generic 4-level page table interface.
56
 * Implementation of generic 4-level page table interface.
55
 * IA-32 has 2-level page tables, so PTL1 and PTL2 are left out.
57
 * IA-32 has 2-level page tables, so PTL1 and PTL2 are left out.
56
 */
58
 */
57
#define PTL0_ENTRIES_ARCH   1024
59
#define PTL0_ENTRIES_ARCH   1024
58
#define PTL1_ENTRIES_ARCH   0
60
#define PTL1_ENTRIES_ARCH   0
59
#define PTL2_ENTRIES_ARCH   0
61
#define PTL2_ENTRIES_ARCH   0
60
#define PTL3_ENTRIES_ARCH   1024
62
#define PTL3_ENTRIES_ARCH   1024
61
 
63
 
62
#define PTL0_INDEX_ARCH(vaddr)  (((vaddr) >> 22) & 0x3ff)
64
#define PTL0_INDEX_ARCH(vaddr)  (((vaddr) >> 22) & 0x3ff)
63
#define PTL1_INDEX_ARCH(vaddr)  0
65
#define PTL1_INDEX_ARCH(vaddr)  0
64
#define PTL2_INDEX_ARCH(vaddr)  0
66
#define PTL2_INDEX_ARCH(vaddr)  0
65
#define PTL3_INDEX_ARCH(vaddr)  (((vaddr) >> 12) & 0x3ff)
67
#define PTL3_INDEX_ARCH(vaddr)  (((vaddr) >> 12) & 0x3ff)
66
 
68
 
67
#define GET_PTL1_ADDRESS_ARCH(ptl0, i)      ((pte_t *) MA2PA((((pte_t *) (ptl0))[(i)].frame_address) << 12))
69
#define GET_PTL1_ADDRESS_ARCH(ptl0, i)      ((pte_t *) MA2PA((((pte_t *) (ptl0))[(i)].frame_address) << 12))
68
#define GET_PTL2_ADDRESS_ARCH(ptl1, i)      (ptl1)
70
#define GET_PTL2_ADDRESS_ARCH(ptl1, i)      (ptl1)
69
#define GET_PTL3_ADDRESS_ARCH(ptl2, i)      (ptl2)
71
#define GET_PTL3_ADDRESS_ARCH(ptl2, i)      (ptl2)
70
#define GET_FRAME_ADDRESS_ARCH(ptl3, i)     ((uintptr_t) MA2PA((((pte_t *) (ptl3))[(i)].frame_address) << 12))
72
#define GET_FRAME_ADDRESS_ARCH(ptl3, i)     ((uintptr_t) MA2PA((((pte_t *) (ptl3))[(i)].frame_address) << 12))
71
 
73
 
72
#define SET_PTL0_ADDRESS_ARCH(ptl0) { \
74
#define SET_PTL0_ADDRESS_ARCH(ptl0) { \
73
    mmuext_op_t mmu_ext; \
75
    mmuext_op_t mmu_ext; \
74
    \
76
    \
75
    mmu_ext.cmd = MMUEXT_NEW_BASEPTR; \
77
    mmu_ext.cmd = MMUEXT_NEW_BASEPTR; \
76
    mmu_ext.mfn = ADDR2PFN(PA2MA(ptl0)); \
78
    mmu_ext.mfn = ADDR2PFN(PA2MA(ptl0)); \
77
    xen_mmuext_op(&mmu_ext, 1, NULL, DOMID_SELF); \
79
    xen_mmuext_op(&mmu_ext, 1, NULL, DOMID_SELF); \
78
}
80
}
79
 
81
 
80
#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) { \
82
#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) { \
81
    mmu_update_t update; \
83
    mmu_update_t update; \
82
    \
84
    \
83
    update.ptr = PA2MA(KA2PA(&((pte_t *) (ptl0))[(i)])); \
85
    update.ptr = PA2MA(KA2PA(&((pte_t *) (ptl0))[(i)])); \
84
    update.val = PA2MA(a) | 0x0003; \
86
    update.val = PA2MA(a) | 0x0003; \
85
    xen_mmu_update(&update, 1, NULL, DOMID_SELF); \
87
    xen_mmu_update(&update, 1, NULL, DOMID_SELF); \
86
}
88
}
87
#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)
89
#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)
88
#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)
90
#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)
89
#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a)  (((pte_t *) (ptl3))[(i)].frame_address = PA2MA(a) >> 12)
91
#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a)  (((pte_t *) (ptl3))[(i)].frame_address = PA2MA(a) >> 12)
90
 
92
 
91
#define GET_PTL1_FLAGS_ARCH(ptl0, i)        get_pt_flags((pte_t *) (ptl0), (index_t)(i))
93
#define GET_PTL1_FLAGS_ARCH(ptl0, i)        get_pt_flags((pte_t *) (ptl0), (index_t)(i))
92
#define GET_PTL2_FLAGS_ARCH(ptl1, i)        PAGE_PRESENT
94
#define GET_PTL2_FLAGS_ARCH(ptl1, i)        PAGE_PRESENT
93
#define GET_PTL3_FLAGS_ARCH(ptl2, i)        PAGE_PRESENT
95
#define GET_PTL3_FLAGS_ARCH(ptl2, i)        PAGE_PRESENT
94
#define GET_FRAME_FLAGS_ARCH(ptl3, i)       get_pt_flags((pte_t *) (ptl3), (index_t)(i))
96
#define GET_FRAME_FLAGS_ARCH(ptl3, i)       get_pt_flags((pte_t *) (ptl3), (index_t)(i))
95
 
97
 
96
#define SET_PTL1_FLAGS_ARCH(ptl0, i, x)     set_pt_flags((pte_t *) (ptl0), (index_t)(i), (x))
98
#define SET_PTL1_FLAGS_ARCH(ptl0, i, x)     set_pt_flags((pte_t *) (ptl0), (index_t)(i), (x))
97
#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
99
#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
98
#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)
100
#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)
99
#define SET_FRAME_FLAGS_ARCH(ptl3, i, x)        set_pt_flags((pte_t *) (ptl3), (index_t)(i), (x))
101
#define SET_FRAME_FLAGS_ARCH(ptl3, i, x)        set_pt_flags((pte_t *) (ptl3), (index_t)(i), (x))
100
 
102
 
101
#define PTE_VALID_ARCH(p)           (*((uint32_t *) (p)) != 0)
103
#define PTE_VALID_ARCH(p)           (*((uint32_t *) (p)) != 0)
102
#define PTE_PRESENT_ARCH(p)         ((p)->present != 0)
104
#define PTE_PRESENT_ARCH(p)         ((p)->present != 0)
103
#define PTE_GET_FRAME_ARCH(p)           ((p)->frame_address << FRAME_WIDTH)
105
#define PTE_GET_FRAME_ARCH(p)           ((p)->frame_address << FRAME_WIDTH)
104
#define PTE_WRITABLE_ARCH(p)            ((p)->writeable != 0)
106
#define PTE_WRITABLE_ARCH(p)            ((p)->writeable != 0)
105
#define PTE_EXECUTABLE_ARCH(p)          1
107
#define PTE_EXECUTABLE_ARCH(p)          1
106
 
108
 
107
#ifndef __ASM__
109
#ifndef __ASM__
108
 
110
 
109
#include <mm/page.h>
111
#include <mm/page.h>
110
#include <arch/types.h>
112
#include <arch/types.h>
111
#include <arch/mm/frame.h>
113
#include <arch/mm/frame.h>
112
#include <typedefs.h>
114
#include <typedefs.h>
113
#include <arch/hypercall.h>
115
#include <arch/hypercall.h>
114
 
116
 
115
/* Page fault error codes. */
117
/* Page fault error codes. */
116
 
118
 
117
/** When bit on this position is 0, the page fault was caused by a not-present page. */
119
/** When bit on this position is 0, the page fault was caused by a not-present page. */
118
#define PFERR_CODE_P        (1 << 0)
120
#define PFERR_CODE_P        (1 << 0)
119
 
121
 
120
/** When bit on this position is 1, the page fault was caused by a write. */
122
/** When bit on this position is 1, the page fault was caused by a write. */
121
#define PFERR_CODE_RW       (1 << 1)
123
#define PFERR_CODE_RW       (1 << 1)
122
 
124
 
123
/** When bit on this position is 1, the page fault was caused in user mode. */
125
/** When bit on this position is 1, the page fault was caused in user mode. */
124
#define PFERR_CODE_US       (1 << 2)
126
#define PFERR_CODE_US       (1 << 2)
125
 
127
 
126
/** When bit on this position is 1, a reserved bit was set in page directory. */
128
/** When bit on this position is 1, a reserved bit was set in page directory. */
127
#define PFERR_CODE_RSVD     (1 << 3)
129
#define PFERR_CODE_RSVD     (1 << 3)
128
 
130
 
129
/** Page Table Entry. */
131
/** Page Table Entry. */
130
struct page_specifier {
132
struct page_specifier {
131
    unsigned present : 1;
133
    unsigned present : 1;
132
    unsigned writeable : 1;
134
    unsigned writeable : 1;
133
    unsigned uaccessible : 1;
135
    unsigned uaccessible : 1;
134
    unsigned page_write_through : 1;
136
    unsigned page_write_through : 1;
135
    unsigned page_cache_disable : 1;
137
    unsigned page_cache_disable : 1;
136
    unsigned accessed : 1;
138
    unsigned accessed : 1;
137
    unsigned dirty : 1;
139
    unsigned dirty : 1;
138
    unsigned pat : 1;
140
    unsigned pat : 1;
139
    unsigned global : 1;
141
    unsigned global : 1;
140
    unsigned soft_valid : 1;    /**< Valid content even if the present bit is not set. */
142
    unsigned soft_valid : 1;    /**< Valid content even if the present bit is not set. */
141
    unsigned avl : 2;
143
    unsigned avl : 2;
142
    unsigned frame_address : 20;
144
    unsigned frame_address : 20;
143
} __attribute__ ((packed));
145
} __attribute__ ((packed));
144
 
146
 
145
typedef struct {
147
typedef struct {
146
    uint64_t ptr;      /**< Machine address of PTE */
148
    uint64_t ptr;      /**< Machine address of PTE */
147
    union {            /**< New contents of PTE */
149
    union {            /**< New contents of PTE */
148
        uint64_t val;
150
        uint64_t val;
149
        pte_t pte;
151
        pte_t pte;
150
    };
152
    };
151
} mmu_update_t;
153
} mmu_update_t;
152
 
154
 
153
typedef struct {
155
typedef struct {
154
    unsigned int cmd;
156
    unsigned int cmd;
155
    union {
157
    union {
156
        unsigned long mfn;
158
        unsigned long mfn;
157
        unsigned long linear_addr;
159
        unsigned long linear_addr;
158
    };
160
    };
159
    union {
161
    union {
160
        unsigned int nr_ents;
162
        unsigned int nr_ents;
161
        void *vcpumask;
163
        void *vcpumask;
162
    };
164
    };
163
} mmuext_op_t;
165
} mmuext_op_t;
164
 
166
 
165
static inline int xen_update_va_mapping(const void *va, const pte_t pte, const unsigned int flags)
167
static inline int xen_update_va_mapping(const void *va, const pte_t pte, const unsigned int flags)
166
{
168
{
167
    return hypercall4(XEN_UPDATE_VA_MAPPING, va, pte, 0, flags);
169
    return hypercall4(XEN_UPDATE_VA_MAPPING, va, pte, 0, flags);
168
}
170
}
169
 
171
 
170
static inline int xen_mmu_update(const mmu_update_t *req, const unsigned int count, unsigned int *success_count, domid_t domid)
172
static inline int xen_mmu_update(const mmu_update_t *req, const unsigned int count, unsigned int *success_count, domid_t domid)
171
{
173
{
172
    return hypercall4(XEN_MMU_UPDATE, req, count, success_count, domid);
174
    return hypercall4(XEN_MMU_UPDATE, req, count, success_count, domid);
173
}
175
}
174
 
176
 
175
static inline int xen_mmuext_op(const mmuext_op_t *op, const unsigned int count, unsigned int *success_count, domid_t domid)
177
static inline int xen_mmuext_op(const mmuext_op_t *op, const unsigned int count, unsigned int *success_count, domid_t domid)
176
{
178
{
177
    return hypercall4(XEN_MMUEXT_OP, op, count, success_count, domid);
179
    return hypercall4(XEN_MMUEXT_OP, op, count, success_count, domid);
178
}
180
}
179
 
181
 
180
static inline int get_pt_flags(pte_t *pt, index_t i)
182
static inline int get_pt_flags(pte_t *pt, index_t i)
181
{
183
{
182
    pte_t *p = &pt[i];
184
    pte_t *p = &pt[i];
183
   
185
   
184
    return (
186
    return (
185
        (!p->page_cache_disable)<<PAGE_CACHEABLE_SHIFT |
187
        (!p->page_cache_disable)<<PAGE_CACHEABLE_SHIFT |
186
        (!p->present)<<PAGE_PRESENT_SHIFT |
188
        (!p->present)<<PAGE_PRESENT_SHIFT |
187
        p->uaccessible<<PAGE_USER_SHIFT |
189
        p->uaccessible<<PAGE_USER_SHIFT |
188
        1<<PAGE_READ_SHIFT |
190
        1<<PAGE_READ_SHIFT |
189
        p->writeable<<PAGE_WRITE_SHIFT |
191
        p->writeable<<PAGE_WRITE_SHIFT |
190
        1<<PAGE_EXEC_SHIFT |
192
        1<<PAGE_EXEC_SHIFT |
191
        p->global<<PAGE_GLOBAL_SHIFT
193
        p->global<<PAGE_GLOBAL_SHIFT
192
    );
194
    );
193
}
195
}
194
 
196
 
195
static inline void set_pt_flags(pte_t *pt, index_t i, int flags)
197
static inline void set_pt_flags(pte_t *pt, index_t i, int flags)
196
{
198
{
197
    pte_t *p = &pt[i];
199
    pte_t *p = &pt[i];
198
   
200
   
199
    p->page_cache_disable = !(flags & PAGE_CACHEABLE);
201
    p->page_cache_disable = !(flags & PAGE_CACHEABLE);
200
    p->present = !(flags & PAGE_NOT_PRESENT);
202
    p->present = !(flags & PAGE_NOT_PRESENT);
201
    p->uaccessible = (flags & PAGE_USER) != 0;
203
    p->uaccessible = (flags & PAGE_USER) != 0;
202
    p->writeable = (flags & PAGE_WRITE) != 0;
204
    p->writeable = (flags & PAGE_WRITE) != 0;
203
    p->global = (flags & PAGE_GLOBAL) != 0;
205
    p->global = (flags & PAGE_GLOBAL) != 0;
204
   
206
   
205
    /*
207
    /*
206
     * Ensure that there is at least one bit set even if the present bit is cleared.
208
     * Ensure that there is at least one bit set even if the present bit is cleared.
207
     */
209
     */
208
    p->soft_valid = true;
210
    p->soft_valid = true;
209
}
211
}
210
 
212
 
211
extern void page_arch_init(void);
213
extern void page_arch_init(void);
212
extern void page_fault(int n, istate_t *istate);
214
extern void page_fault(int n, istate_t *istate);
213
 
215
 
214
#endif /* __ASM__ */
216
#endif /* __ASM__ */
215
 
217
 
216
#endif /* KERNEL */
218
#endif /* KERNEL */
217
 
219
 
218
#endif
220
#endif
219
 
221
 
220
/** @}
222
/** @}
221
 */
223
 */
222
 
224