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1 | /* |
1 | /* |
2 | * Copyright (C) 2001-2004 Jakub Jermar |
2 | * Copyright (C) 2001-2004 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | #include <arch/pm.h> |
29 | #include <arch/pm.h> |
30 | #include <config.h> |
30 | #include <config.h> |
31 | #include <arch/types.h> |
31 | #include <arch/types.h> |
32 | #include <typedefs.h> |
32 | #include <typedefs.h> |
33 | #include <arch/interrupt.h> |
33 | #include <arch/interrupt.h> |
34 | #include <arch/asm.h> |
34 | #include <arch/asm.h> |
35 | #include <arch/context.h> |
35 | #include <arch/context.h> |
36 | #include <panic.h> |
36 | #include <panic.h> |
37 | #include <arch/mm/page.h> |
37 | #include <arch/mm/page.h> |
38 | #include <mm/heap.h> |
38 | #include <mm/heap.h> |
39 | #include <memstr.h> |
39 | #include <memstr.h> |
40 | #include <arch/boot/boot.h> |
40 | #include <arch/boot/boot.h> |
41 | 41 | ||
42 | /* |
42 | /* |
43 | * Early ia32 configuration functions and data structures. |
43 | * Early ia32 configuration functions and data structures. |
44 | */ |
44 | */ |
45 | 45 | ||
46 | /* |
46 | /* |
47 | * We have no use for segmentation so we set up flat mode. In this |
47 | * We have no use for segmentation so we set up flat mode. In this |
48 | * mode, we use, for each privilege level, two segments spanning the |
48 | * mode, we use, for each privilege level, two segments spanning the |
49 | * whole memory. One is for code and one is for data. |
49 | * whole memory. One is for code and one is for data. |
50 | */ |
50 | */ |
51 | struct descriptor gdt[GDT_ITEMS] = { |
51 | struct descriptor gdt[GDT_ITEMS] = { |
52 | /* NULL descriptor */ |
52 | /* NULL descriptor */ |
53 | { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, |
53 | { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, |
54 | /* KTEXT descriptor */ |
54 | /* KTEXT descriptor */ |
55 | { 0xffff, 0, 0, AR_PRESENT | AR_CODE | DPL_KERNEL, 0xf, 0, 0, 1, 1, 0 }, |
55 | { 0xffff, 0, 0, AR_PRESENT | AR_CODE | DPL_KERNEL, 0xf, 0, 0, 1, 1, 0 }, |
56 | /* KDATA descriptor */ |
56 | /* KDATA descriptor */ |
57 | { 0xffff, 0, 0, AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_KERNEL, 0xf, 0, 0, 1, 1, 0 }, |
57 | { 0xffff, 0, 0, AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_KERNEL, 0xf, 0, 0, 1, 1, 0 }, |
58 | /* UTEXT descriptor */ |
58 | /* UTEXT descriptor */ |
59 | { 0xffff, 0, 0, AR_PRESENT | AR_CODE | DPL_USER, 0xf, 0, 0, 1, 1, 0 }, |
59 | { 0xffff, 0, 0, AR_PRESENT | AR_CODE | DPL_USER, 0xf, 0, 0, 1, 1, 0 }, |
60 | /* UDATA descriptor */ |
60 | /* UDATA descriptor */ |
61 | { 0xffff, 0, 0, AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_USER, 0xf, 0, 0, 1, 1, 0 }, |
61 | { 0xffff, 0, 0, AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_USER, 0xf, 0, 0, 1, 1, 0 }, |
62 | /* TSS descriptor - set up will be completed later */ |
62 | /* TSS descriptor - set up will be completed later */ |
63 | { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } |
63 | { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } |
64 | }; |
64 | }; |
65 | 65 | ||
66 | static struct idescriptor idt[IDT_ITEMS]; |
66 | static struct idescriptor idt[IDT_ITEMS]; |
67 | 67 | ||
68 | static struct tss tss; |
68 | static struct tss tss; |
69 | 69 | ||
70 | struct tss *tss_p = NULL; |
70 | struct tss *tss_p = NULL; |
71 | 71 | ||
72 | /* TODO: Does not compile correctly if it does not exist ???? */ |
- | |
73 | int __attribute__ ((section ("K_DATA_START"))) __fake; |
- | |
74 | - | ||
75 | /* gdtr is changed by kmp before next CPU is initialized */ |
72 | /* gdtr is changed by kmp before next CPU is initialized */ |
76 | struct ptr_16_32 protected_bootstrap_gdtr = { .limit = sizeof(gdt), .base = KA2PA((__address) gdt) }; |
73 | struct ptr_16_32 protected_bootstrap_gdtr = { .limit = sizeof(gdt), .base = KA2PA((__address) gdt) }; |
77 | struct ptr_16_32 gdtr = { .limit = sizeof(gdt), .base = (__address) gdt }; |
74 | struct ptr_16_32 gdtr = { .limit = sizeof(gdt), .base = (__address) gdt }; |
78 | 75 | ||
79 | void gdt_setbase(struct descriptor *d, __address base) |
76 | void gdt_setbase(struct descriptor *d, __address base) |
80 | { |
77 | { |
81 | d->base_0_15 = base & 0xffff; |
78 | d->base_0_15 = base & 0xffff; |
82 | d->base_16_23 = ((base) >> 16) & 0xff; |
79 | d->base_16_23 = ((base) >> 16) & 0xff; |
83 | d->base_24_31 = ((base) >> 24) & 0xff; |
80 | d->base_24_31 = ((base) >> 24) & 0xff; |
84 | } |
81 | } |
85 | 82 | ||
86 | void gdt_setlimit(struct descriptor *d, __u32 limit) |
83 | void gdt_setlimit(struct descriptor *d, __u32 limit) |
87 | { |
84 | { |
88 | d->limit_0_15 = limit & 0xffff; |
85 | d->limit_0_15 = limit & 0xffff; |
89 | d->limit_16_19 = (limit >> 16) & 0xf; |
86 | d->limit_16_19 = (limit >> 16) & 0xf; |
90 | } |
87 | } |
91 | 88 | ||
92 | void idt_setoffset(struct idescriptor *d, __address offset) |
89 | void idt_setoffset(struct idescriptor *d, __address offset) |
93 | { |
90 | { |
94 | /* |
91 | /* |
95 | * Offset is a linear address. |
92 | * Offset is a linear address. |
96 | */ |
93 | */ |
97 | d->offset_0_15 = offset & 0xffff; |
94 | d->offset_0_15 = offset & 0xffff; |
98 | d->offset_16_31 = offset >> 16; |
95 | d->offset_16_31 = offset >> 16; |
99 | } |
96 | } |
100 | 97 | ||
101 | void tss_initialize(struct tss *t) |
98 | void tss_initialize(struct tss *t) |
102 | { |
99 | { |
103 | memsetb((__address) t, sizeof(struct tss), 0); |
100 | memsetb((__address) t, sizeof(struct tss), 0); |
104 | } |
101 | } |
105 | 102 | ||
106 | /* |
103 | /* |
107 | * This function takes care of proper setup of IDT and IDTR. |
104 | * This function takes care of proper setup of IDT and IDTR. |
108 | */ |
105 | */ |
109 | void idt_init(void) |
106 | void idt_init(void) |
110 | { |
107 | { |
111 | struct idescriptor *d; |
108 | struct idescriptor *d; |
112 | int i; |
109 | int i; |
113 | 110 | ||
114 | for (i = 0; i < IDT_ITEMS; i++) { |
111 | for (i = 0; i < IDT_ITEMS; i++) { |
115 | d = &idt[i]; |
112 | d = &idt[i]; |
116 | 113 | ||
117 | d->unused = 0; |
114 | d->unused = 0; |
118 | d->selector = selector(KTEXT_DES); |
115 | d->selector = selector(KTEXT_DES); |
119 | 116 | ||
120 | d->access = AR_PRESENT | AR_INTERRUPT; /* masking interrupt */ |
117 | d->access = AR_PRESENT | AR_INTERRUPT; /* masking interrupt */ |
121 | 118 | ||
122 | if (i == VECTOR_SYSCALL) { |
119 | if (i == VECTOR_SYSCALL) { |
123 | /* |
120 | /* |
124 | * The syscall interrupt gate must be calleable from userland. |
121 | * The syscall interrupt gate must be calleable from userland. |
125 | */ |
122 | */ |
126 | d->access |= DPL_USER; |
123 | d->access |= DPL_USER; |
127 | } |
124 | } |
128 | 125 | ||
129 | idt_setoffset(d, ((__address) interrupt_handlers) + i*interrupt_handler_size); |
126 | idt_setoffset(d, ((__address) interrupt_handlers) + i*interrupt_handler_size); |
130 | trap_register(i, null_interrupt); |
127 | trap_register(i, null_interrupt); |
131 | } |
128 | } |
132 | trap_register(13, gp_fault); |
129 | trap_register(13, gp_fault); |
133 | trap_register( 7, nm_fault); |
130 | trap_register( 7, nm_fault); |
134 | trap_register(12, ss_fault); |
131 | trap_register(12, ss_fault); |
135 | } |
132 | } |
136 | 133 | ||
137 | 134 | ||
138 | /* Clean IOPL(12,13) and NT(14) flags in EFLAGS register */ |
135 | /* Clean IOPL(12,13) and NT(14) flags in EFLAGS register */ |
139 | static void clean_IOPL_NT_flags(void) |
136 | static void clean_IOPL_NT_flags(void) |
140 | { |
137 | { |
141 | asm |
138 | asm |
142 | ( |
139 | ( |
143 | "pushfl;" |
140 | "pushfl;" |
144 | "pop %%eax;" |
141 | "pop %%eax;" |
145 | "and $0xffff8fff,%%eax;" |
142 | "and $0xffff8fff,%%eax;" |
146 | "push %%eax;" |
143 | "push %%eax;" |
147 | "popfl;" |
144 | "popfl;" |
148 | : |
145 | : |
149 | : |
146 | : |
150 | :"%eax" |
147 | :"%eax" |
151 | ); |
148 | ); |
152 | } |
149 | } |
153 | 150 | ||
154 | /* Clean AM(18) flag in CR0 register */ |
151 | /* Clean AM(18) flag in CR0 register */ |
155 | static void clean_AM_flag(void) |
152 | static void clean_AM_flag(void) |
156 | { |
153 | { |
157 | asm |
154 | asm |
158 | ( |
155 | ( |
159 | "mov %%cr0,%%eax;" |
156 | "mov %%cr0,%%eax;" |
160 | "and $0xFFFBFFFF,%%eax;" |
157 | "and $0xFFFBFFFF,%%eax;" |
161 | "mov %%eax,%%cr0;" |
158 | "mov %%eax,%%cr0;" |
162 | : |
159 | : |
163 | : |
160 | : |
164 | :"%eax" |
161 | :"%eax" |
165 | ); |
162 | ); |
166 | } |
163 | } |
167 | 164 | ||
168 | void pm_init(void) |
165 | void pm_init(void) |
169 | { |
166 | { |
170 | struct descriptor *gdt_p = (struct descriptor *) gdtr.base; |
167 | struct descriptor *gdt_p = (struct descriptor *) gdtr.base; |
171 | struct ptr_16_32 idtr; |
168 | struct ptr_16_32 idtr; |
172 | 169 | ||
173 | /* |
170 | /* |
174 | * Update addresses in GDT and IDT to their virtual counterparts. |
171 | * Update addresses in GDT and IDT to their virtual counterparts. |
175 | */ |
172 | */ |
176 | idtr.limit = sizeof(idt); |
173 | idtr.limit = sizeof(idt); |
177 | idtr.base = (__address) idt; |
174 | idtr.base = (__address) idt; |
178 | __asm__ volatile ("lgdt %0\n" : : "m" (gdtr)); |
175 | __asm__ volatile ("lgdt %0\n" : : "m" (gdtr)); |
179 | __asm__ volatile ("lidt %0\n" : : "m" (idtr)); |
176 | __asm__ volatile ("lidt %0\n" : : "m" (idtr)); |
180 | 177 | ||
181 | /* |
178 | /* |
182 | * Each CPU has its private GDT and TSS. |
179 | * Each CPU has its private GDT and TSS. |
183 | * All CPUs share one IDT. |
180 | * All CPUs share one IDT. |
184 | */ |
181 | */ |
185 | 182 | ||
186 | if (config.cpu_active == 1) { |
183 | if (config.cpu_active == 1) { |
187 | idt_init(); |
184 | idt_init(); |
188 | /* |
185 | /* |
189 | * NOTE: bootstrap CPU has statically allocated TSS, because |
186 | * NOTE: bootstrap CPU has statically allocated TSS, because |
190 | * the heap hasn't been initialized so far. |
187 | * the heap hasn't been initialized so far. |
191 | */ |
188 | */ |
192 | tss_p = &tss; |
189 | tss_p = &tss; |
193 | } |
190 | } |
194 | else { |
191 | else { |
195 | tss_p = (struct tss *) malloc(sizeof(struct tss)); |
192 | tss_p = (struct tss *) malloc(sizeof(struct tss)); |
196 | if (!tss_p) |
193 | if (!tss_p) |
197 | panic("could not allocate TSS\n"); |
194 | panic("could not allocate TSS\n"); |
198 | } |
195 | } |
199 | 196 | ||
200 | tss_initialize(tss_p); |
197 | tss_initialize(tss_p); |
201 | 198 | ||
202 | gdt_p[TSS_DES].access = AR_PRESENT | AR_TSS | DPL_KERNEL; |
199 | gdt_p[TSS_DES].access = AR_PRESENT | AR_TSS | DPL_KERNEL; |
203 | gdt_p[TSS_DES].special = 1; |
200 | gdt_p[TSS_DES].special = 1; |
204 | gdt_p[TSS_DES].granularity = 1; |
201 | gdt_p[TSS_DES].granularity = 1; |
205 | 202 | ||
206 | gdt_setbase(&gdt_p[TSS_DES], (__address) tss_p); |
203 | gdt_setbase(&gdt_p[TSS_DES], (__address) tss_p); |
207 | gdt_setlimit(&gdt_p[TSS_DES], sizeof(struct tss) - 1); |
204 | gdt_setlimit(&gdt_p[TSS_DES], sizeof(struct tss) - 1); |
208 | 205 | ||
209 | /* |
206 | /* |
210 | * As of this moment, the current CPU has its own GDT pointing |
207 | * As of this moment, the current CPU has its own GDT pointing |
211 | * to its own TSS. We just need to load the TR register. |
208 | * to its own TSS. We just need to load the TR register. |
212 | */ |
209 | */ |
213 | __asm__ volatile ("ltr %0" : : "r" ((__u16) selector(TSS_DES))); |
210 | __asm__ volatile ("ltr %0" : : "r" ((__u16) selector(TSS_DES))); |
214 | 211 | ||
215 | clean_IOPL_NT_flags(); /* Disable I/O on nonprivileged levels */ |
212 | clean_IOPL_NT_flags(); /* Disable I/O on nonprivileged levels */ |
216 | clean_AM_flag(); /* Disable alignment check */ |
213 | clean_AM_flag(); /* Disable alignment check */ |
217 | } |
214 | } |
218 | 215 |