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1 | /* |
1 | /* |
2 | * Copyright (C) 2005 Jakub Vana |
2 | * Copyright (C) 2005 Jakub Vana |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
- | 27 | */ |
|
- | 28 | ||
- | 29 | /** @addtogroup ia32 |
|
- | 30 | * @{ |
|
- | 31 | */ |
|
- | 32 | /** @file |
|
27 | * |
33 | * |
28 | */ |
34 | */ |
29 | 35 | ||
30 | #include <fpu_context.h> |
36 | #include <fpu_context.h> |
31 | #include <arch.h> |
37 | #include <arch.h> |
32 | #include <cpu.h> |
38 | #include <cpu.h> |
33 | 39 | ||
34 | typedef void (*fpu_context_function)(fpu_context_t *fctx); |
40 | typedef void (*fpu_context_function)(fpu_context_t *fctx); |
35 | 41 | ||
36 | static fpu_context_function fpu_save,fpu_restore; |
42 | static fpu_context_function fpu_save,fpu_restore; |
37 | 43 | ||
38 | 44 | ||
39 | 45 | ||
40 | static void fpu_context_f_save(fpu_context_t *fctx) |
46 | static void fpu_context_f_save(fpu_context_t *fctx) |
41 | { |
47 | { |
42 | __asm__ volatile ( |
48 | __asm__ volatile ( |
43 | "fnsave %0" |
49 | "fnsave %0" |
44 | : "=m"(*fctx) |
50 | : "=m"(*fctx) |
45 | ); |
51 | ); |
46 | } |
52 | } |
47 | 53 | ||
48 | static void fpu_context_f_restore(fpu_context_t *fctx) |
54 | static void fpu_context_f_restore(fpu_context_t *fctx) |
49 | { |
55 | { |
50 | __asm__ volatile ( |
56 | __asm__ volatile ( |
51 | "frstor %0" |
57 | "frstor %0" |
52 | : "=m"(*fctx) |
58 | : "=m"(*fctx) |
53 | ); |
59 | ); |
54 | } |
60 | } |
55 | 61 | ||
56 | static void fpu_context_fx_save(fpu_context_t *fctx) |
62 | static void fpu_context_fx_save(fpu_context_t *fctx) |
57 | { |
63 | { |
58 | __asm__ volatile ( |
64 | __asm__ volatile ( |
59 | "fxsave %0" |
65 | "fxsave %0" |
60 | : "=m"(*fctx) |
66 | : "=m"(*fctx) |
61 | ); |
67 | ); |
62 | } |
68 | } |
63 | 69 | ||
64 | static void fpu_context_fx_restore(fpu_context_t *fctx) |
70 | static void fpu_context_fx_restore(fpu_context_t *fctx) |
65 | { |
71 | { |
66 | __asm__ volatile ( |
72 | __asm__ volatile ( |
67 | "fxrstor %0" |
73 | "fxrstor %0" |
68 | : "=m"(*fctx) |
74 | : "=m"(*fctx) |
69 | ); |
75 | ); |
70 | } |
76 | } |
71 | 77 | ||
72 | /* |
78 | /* |
73 | Setup using fxsr instruction |
79 | Setup using fxsr instruction |
74 | */ |
80 | */ |
75 | void fpu_fxsr(void) |
81 | void fpu_fxsr(void) |
76 | { |
82 | { |
77 | fpu_save=fpu_context_fx_save; |
83 | fpu_save=fpu_context_fx_save; |
78 | fpu_restore=fpu_context_fx_restore; |
84 | fpu_restore=fpu_context_fx_restore; |
79 | } |
85 | } |
80 | /* |
86 | /* |
81 | Setup using not fxsr instruction |
87 | Setup using not fxsr instruction |
82 | */ |
88 | */ |
83 | void fpu_fsr(void) |
89 | void fpu_fsr(void) |
84 | { |
90 | { |
85 | fpu_save=fpu_context_f_save; |
91 | fpu_save=fpu_context_f_save; |
86 | fpu_restore=fpu_context_f_restore; |
92 | fpu_restore=fpu_context_f_restore; |
87 | } |
93 | } |
88 | 94 | ||
89 | 95 | ||
90 | 96 | ||
91 | void fpu_context_save(fpu_context_t *fctx) |
97 | void fpu_context_save(fpu_context_t *fctx) |
92 | { |
98 | { |
93 | fpu_save(fctx); |
99 | fpu_save(fctx); |
94 | } |
100 | } |
95 | 101 | ||
96 | void fpu_context_restore(fpu_context_t *fctx) |
102 | void fpu_context_restore(fpu_context_t *fctx) |
97 | { |
103 | { |
98 | fpu_restore(fctx); |
104 | fpu_restore(fctx); |
99 | } |
105 | } |
100 | 106 | ||
101 | 107 | ||
102 | 108 | ||
103 | void fpu_init() |
109 | void fpu_init() |
104 | { |
110 | { |
105 | __u32 help0=0,help1=0; |
111 | __u32 help0=0,help1=0; |
106 | __asm__ volatile ( |
112 | __asm__ volatile ( |
107 | "fninit;\n" |
113 | "fninit;\n" |
108 | "stmxcsr %0\n" |
114 | "stmxcsr %0\n" |
109 | "mov %0,%1;\n" |
115 | "mov %0,%1;\n" |
110 | "or %2,%1;\n" |
116 | "or %2,%1;\n" |
111 | "mov %1,%0;\n" |
117 | "mov %1,%0;\n" |
112 | "ldmxcsr %0;\n" |
118 | "ldmxcsr %0;\n" |
113 | :"+m"(help0),"+r"(help1) |
119 | :"+m"(help0),"+r"(help1) |
114 | :"i"(0x1f80) |
120 | :"i"(0x1f80) |
115 | ); |
121 | ); |
116 | } |
122 | } |
- | 123 | ||
- | 124 | /** @} |
|
- | 125 | */ |
|
- | 126 | ||
117 | 127 |