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1 | /* |
1 | /* |
2 | * Copyright (C) 2001-2004 Jakub Jermar |
2 | * Copyright (C) 2001-2004 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup ia32 |
29 | /** @addtogroup ia32 |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** |
32 | /** |
33 | * @file |
33 | * @file |
34 | * @brief i8254 chip driver. |
34 | * @brief i8254 chip driver. |
35 | * |
35 | * |
36 | * Low level time functions. |
36 | * Low level time functions. |
37 | */ |
37 | */ |
38 | 38 | ||
39 | #include <arch/types.h> |
39 | #include <arch/types.h> |
40 | #include <time/clock.h> |
40 | #include <time/clock.h> |
41 | #include <time/delay.h> |
41 | #include <time/delay.h> |
42 | #include <arch/interrupt.h> |
42 | #include <arch/interrupt.h> |
43 | #include <arch/drivers/i8259.h> |
43 | #include <arch/drivers/i8259.h> |
44 | #include <arch/drivers/i8254.h> |
44 | #include <arch/drivers/i8254.h> |
45 | #include <cpu.h> |
45 | #include <cpu.h> |
46 | #include <config.h> |
46 | #include <config.h> |
47 | #include <arch/pm.h> |
47 | #include <arch/pm.h> |
48 | #include <arch/asm.h> |
48 | #include <arch/asm.h> |
49 | #include <arch/cpuid.h> |
49 | #include <arch/cpuid.h> |
50 | #include <arch.h> |
50 | #include <arch.h> |
51 | #include <time/delay.h> |
51 | #include <time/delay.h> |
52 | #include <interrupt.h> |
52 | #include <ddi/irq.h> |
- | 53 | #include <ddi/device.h> |
|
53 | 54 | ||
54 | #define CLK_PORT1 0x40 |
55 | #define CLK_PORT1 0x40 |
55 | #define CLK_PORT4 0x43 |
56 | #define CLK_PORT4 0x43 |
56 | 57 | ||
57 | #define CLK_CONST 1193180 |
58 | #define CLK_CONST 1193180 |
58 | #define MAGIC_NUMBER 1194 |
59 | #define MAGIC_NUMBER 1194 |
59 | 60 | ||
- | 61 | static irq_t i8254_irq; |
|
- | 62 | ||
- | 63 | static irq_ownership_t i8254_claim(void) |
|
- | 64 | { |
|
- | 65 | return IRQ_ACCEPT; |
|
- | 66 | } |
|
- | 67 | ||
60 | static void i8254_interrupt(int n, istate_t *istate); |
68 | static void i8254_irq_handler(irq_t *irq, void *arg, ...) |
- | 69 | { |
|
- | 70 | clock(); |
|
- | 71 | } |
|
61 | 72 | ||
62 | void i8254_init(void) |
73 | void i8254_init(void) |
63 | { |
74 | { |
- | 75 | irq_initialize(&i8254_irq); |
|
- | 76 | i8254_irq.devno = device_assign_devno(); |
|
- | 77 | i8254_irq.inr = IRQ_CLK; |
|
- | 78 | i8254_irq.claim = i8254_claim; |
|
- | 79 | i8254_irq.handler = i8254_irq_handler; |
|
- | 80 | irq_register(&i8254_irq); |
|
- | 81 | ||
64 | i8254_normal_operation(); |
82 | i8254_normal_operation(); |
65 | } |
83 | } |
66 | 84 | ||
67 | void i8254_normal_operation(void) |
85 | void i8254_normal_operation(void) |
68 | { |
86 | { |
69 | outb(CLK_PORT4, 0x36); |
87 | outb(CLK_PORT4, 0x36); |
70 | pic_disable_irqs(1<<IRQ_CLK); |
88 | pic_disable_irqs(1 << IRQ_CLK); |
71 | outb(CLK_PORT1, (CLK_CONST/HZ) & 0xf); |
89 | outb(CLK_PORT1, (CLK_CONST / HZ) & 0xf); |
72 | outb(CLK_PORT1, (CLK_CONST/HZ) >> 8); |
90 | outb(CLK_PORT1, (CLK_CONST / HZ) >> 8); |
73 | pic_enable_irqs(1<<IRQ_CLK); |
91 | pic_enable_irqs(1 << IRQ_CLK); |
74 | exc_register(VECTOR_CLK, "i8254_clock", (iroutine) i8254_interrupt); |
- | |
75 | } |
92 | } |
76 | 93 | ||
77 | #define LOOPS 150000 |
94 | #define LOOPS 150000 |
78 | #define SHIFT 11 |
95 | #define SHIFT 11 |
79 | void i8254_calibrate_delay_loop(void) |
96 | void i8254_calibrate_delay_loop(void) |
80 | { |
97 | { |
81 | uint64_t clk1, clk2; |
98 | uint64_t clk1, clk2; |
82 | uint32_t t1, t2, o1, o2; |
99 | uint32_t t1, t2, o1, o2; |
83 | uint8_t not_ok; |
100 | uint8_t not_ok; |
84 | 101 | ||
85 | 102 | ||
86 | /* |
103 | /* |
87 | * One-shot timer. Count-down from 0xffff at 1193180Hz |
104 | * One-shot timer. Count-down from 0xffff at 1193180Hz |
88 | * MAGIC_NUMBER is the magic value for 1ms. |
105 | * MAGIC_NUMBER is the magic value for 1ms. |
89 | */ |
106 | */ |
90 | outb(CLK_PORT4, 0x30); |
107 | outb(CLK_PORT4, 0x30); |
91 | outb(CLK_PORT1, 0xff); |
108 | outb(CLK_PORT1, 0xff); |
92 | outb(CLK_PORT1, 0xff); |
109 | outb(CLK_PORT1, 0xff); |
93 | 110 | ||
94 | do { |
111 | do { |
95 | /* will read both status and count */ |
112 | /* will read both status and count */ |
96 | outb(CLK_PORT4, 0xc2); |
113 | outb(CLK_PORT4, 0xc2); |
97 | not_ok = (inb(CLK_PORT1)>>6)&1; |
114 | not_ok = (inb(CLK_PORT1)>>6)&1; |
98 | t1 = inb(CLK_PORT1); |
115 | t1 = inb(CLK_PORT1); |
99 | t1 |= inb(CLK_PORT1) << 8; |
116 | t1 |= inb(CLK_PORT1) << 8; |
100 | } while (not_ok); |
117 | } while (not_ok); |
101 | 118 | ||
102 | asm_delay_loop(LOOPS); |
119 | asm_delay_loop(LOOPS); |
103 | 120 | ||
104 | outb(CLK_PORT4, 0xd2); |
121 | outb(CLK_PORT4, 0xd2); |
105 | t2 = inb(CLK_PORT1); |
122 | t2 = inb(CLK_PORT1); |
106 | t2 |= inb(CLK_PORT1) << 8; |
123 | t2 |= inb(CLK_PORT1) << 8; |
107 | 124 | ||
108 | /* |
125 | /* |
109 | * We want to determine the overhead of the calibrating mechanism. |
126 | * We want to determine the overhead of the calibrating mechanism. |
110 | */ |
127 | */ |
111 | outb(CLK_PORT4, 0xd2); |
128 | outb(CLK_PORT4, 0xd2); |
112 | o1 = inb(CLK_PORT1); |
129 | o1 = inb(CLK_PORT1); |
113 | o1 |= inb(CLK_PORT1) << 8; |
130 | o1 |= inb(CLK_PORT1) << 8; |
114 | 131 | ||
115 | asm_fake_loop(LOOPS); |
132 | asm_fake_loop(LOOPS); |
116 | 133 | ||
117 | outb(CLK_PORT4, 0xd2); |
134 | outb(CLK_PORT4, 0xd2); |
118 | o2 = inb(CLK_PORT1); |
135 | o2 = inb(CLK_PORT1); |
119 | o2 |= inb(CLK_PORT1) << 8; |
136 | o2 |= inb(CLK_PORT1) << 8; |
120 | 137 | ||
121 | CPU->delay_loop_const = ((MAGIC_NUMBER*LOOPS)/1000) / ((t1-t2)-(o1-o2)) + (((MAGIC_NUMBER*LOOPS)/1000) % ((t1-t2)-(o1-o2)) ? 1 : 0); |
138 | CPU->delay_loop_const = ((MAGIC_NUMBER*LOOPS)/1000) / ((t1-t2)-(o1-o2)) + (((MAGIC_NUMBER*LOOPS)/1000) % ((t1-t2)-(o1-o2)) ? 1 : 0); |
122 | 139 | ||
123 | clk1 = rdtsc(); |
140 | clk1 = rdtsc(); |
124 | delay(1<<SHIFT); |
141 | delay(1<<SHIFT); |
125 | clk2 = rdtsc(); |
142 | clk2 = rdtsc(); |
126 | 143 | ||
127 | CPU->frequency_mhz = (clk2-clk1)>>SHIFT; |
144 | CPU->frequency_mhz = (clk2-clk1)>>SHIFT; |
128 | 145 | ||
129 | return; |
146 | return; |
130 | } |
147 | } |
131 | - | ||
132 | void i8254_interrupt(int n, istate_t *istate) |
- | |
133 | { |
- | |
134 | trap_virtual_eoi(); |
- | |
135 | clock(); |
- | |
136 | } |
- | |
137 | 148 | ||
138 | /** @} |
149 | /** @} |
139 | */ |
150 | */ |
140 | 151 |