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1 | /* |
1 | /* |
2 | * Copyright (C) 2001-2004 Jakub Jermar |
2 | * Copyright (C) 2001-2004 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | #include <arch/cpu.h> |
29 | #include <arch/cpu.h> |
30 | #include <arch/cpuid.h> |
30 | #include <arch/cpuid.h> |
31 | #include <arch/pm.h> |
31 | #include <arch/pm.h> |
32 | 32 | ||
33 | #include <arch.h> |
33 | #include <arch.h> |
34 | #include <arch/types.h> |
34 | #include <arch/types.h> |
35 | #include <print.h> |
35 | #include <print.h> |
36 | #include <typedefs.h> |
36 | #include <typedefs.h> |
37 | 37 | ||
38 | #include <arch/smp/apic.h> |
38 | #include <arch/smp/apic.h> |
39 | 39 | ||
40 | /* |
40 | /* |
41 | * Identification of CPUs. |
41 | * Identification of CPUs. |
42 | * Contains only non-MP-Specification specific SMP code. |
42 | * Contains only non-MP-Specification specific SMP code. |
43 | */ |
43 | */ |
44 | #define AMD_CPUID_EBX 0x68747541 |
44 | #define AMD_CPUID_EBX 0x68747541 |
45 | #define AMD_CPUID_ECX 0x444d4163 |
45 | #define AMD_CPUID_ECX 0x444d4163 |
46 | #define AMD_CPUID_EDX 0x69746e65 |
46 | #define AMD_CPUID_EDX 0x69746e65 |
47 | 47 | ||
48 | #define INTEL_CPUID_EBX 0x756e6547 |
48 | #define INTEL_CPUID_EBX 0x756e6547 |
49 | #define INTEL_CPUID_ECX 0x6c65746e |
49 | #define INTEL_CPUID_ECX 0x6c65746e |
50 | #define INTEL_CPUID_EDX 0x49656e69 |
50 | #define INTEL_CPUID_EDX 0x49656e69 |
51 | 51 | ||
52 | enum vendor { |
52 | enum vendor { |
53 | VendorUnknown=0, |
53 | VendorUnknown=0, |
54 | VendorAMD, |
54 | VendorAMD, |
55 | VendorIntel |
55 | VendorIntel |
56 | }; |
56 | }; |
57 | 57 | ||
58 | static char *vendor_str[] = { |
58 | static char *vendor_str[] = { |
59 | "Unknown Vendor", |
59 | "Unknown Vendor", |
60 | "AuthenticAMD", |
60 | "AuthenticAMD", |
61 | "GenuineIntel" |
61 | "GenuineIntel" |
62 | }; |
62 | }; |
63 | 63 | ||
- | 64 | void set_TS_flag(void) |
|
- | 65 | { |
|
- | 66 | asm |
|
- | 67 | ( |
|
- | 68 | "mov %%cr0,%%eax;" |
|
- | 69 | "or $8,%%eax;" |
|
- | 70 | "mov %%eax,%%cr0;" |
|
- | 71 | : |
|
- | 72 | : |
|
- | 73 | :"%eax" |
|
- | 74 | ); |
|
- | 75 | } |
|
- | 76 | ||
- | 77 | void reset_TS_flag(void) |
|
- | 78 | { |
|
- | 79 | asm |
|
- | 80 | ( |
|
- | 81 | "mov %%cr0,%%eax;" |
|
- | 82 | "and $0xffFFffF7,%%eax;" |
|
- | 83 | "mov %%eax,%%cr0;" |
|
- | 84 | : |
|
- | 85 | : |
|
- | 86 | :"%eax" |
|
- | 87 | ); |
|
- | 88 | } |
|
- | 89 | ||
- | 90 | ||
- | 91 | ||
64 | void cpu_arch_init(void) |
92 | void cpu_arch_init(void) |
65 | { |
93 | { |
66 | CPU->arch.tss = tss_p; |
94 | CPU->arch.tss = tss_p; |
- | 95 | CPU->arch.fpu_owner=NULL; |
|
67 | } |
96 | } |
68 | 97 | ||
69 | 98 | ||
70 | void cpu_identify(void) |
99 | void cpu_identify(void) |
71 | { |
100 | { |
72 | cpu_info_t info; |
101 | cpu_info_t info; |
73 | int i; |
102 | int i; |
74 | 103 | ||
75 | CPU->arch.vendor = VendorUnknown; |
104 | CPU->arch.vendor = VendorUnknown; |
76 | if (has_cpuid()) { |
105 | if (has_cpuid()) { |
77 | cpuid(0, &info); |
106 | cpuid(0, &info); |
78 | 107 | ||
79 | /* |
108 | /* |
80 | * Check for AMD processor. |
109 | * Check for AMD processor. |
81 | */ |
110 | */ |
82 | if (info.cpuid_ebx==AMD_CPUID_EBX && |
111 | if (info.cpuid_ebx==AMD_CPUID_EBX && |
83 | info.cpuid_ecx==AMD_CPUID_ECX && |
112 | info.cpuid_ecx==AMD_CPUID_ECX && |
84 | info.cpuid_edx==AMD_CPUID_EDX) { |
113 | info.cpuid_edx==AMD_CPUID_EDX) { |
85 | 114 | ||
86 | CPU->arch.vendor = VendorAMD; |
115 | CPU->arch.vendor = VendorAMD; |
87 | } |
116 | } |
88 | 117 | ||
89 | /* |
118 | /* |
90 | * Check for Intel processor. |
119 | * Check for Intel processor. |
91 | */ |
120 | */ |
92 | if (info.cpuid_ebx==INTEL_CPUID_EBX && |
121 | if (info.cpuid_ebx==INTEL_CPUID_EBX && |
93 | info.cpuid_ecx==INTEL_CPUID_ECX && |
122 | info.cpuid_ecx==INTEL_CPUID_ECX && |
94 | info.cpuid_edx==INTEL_CPUID_EDX) { |
123 | info.cpuid_edx==INTEL_CPUID_EDX) { |
95 | 124 | ||
96 | CPU->arch.vendor = VendorIntel; |
125 | CPU->arch.vendor = VendorIntel; |
97 | 126 | ||
98 | } |
127 | } |
99 | 128 | ||
100 | cpuid(1, &info); |
129 | cpuid(1, &info); |
101 | CPU->arch.family = (info.cpuid_eax>>8)&0xf; |
130 | CPU->arch.family = (info.cpuid_eax>>8)&0xf; |
102 | CPU->arch.model = (info.cpuid_eax>>4)&0xf; |
131 | CPU->arch.model = (info.cpuid_eax>>4)&0xf; |
103 | CPU->arch.stepping = (info.cpuid_eax>>0)&0xf; |
132 | CPU->arch.stepping = (info.cpuid_eax>>0)&0xf; |
104 | } |
133 | } |
105 | } |
134 | } |
106 | 135 | ||
107 | void cpu_print_report(cpu_t* m) |
136 | void cpu_print_report(cpu_t* m) |
108 | { |
137 | { |
109 | printf("cpu%d: (%s family=%d model=%d stepping=%d) %dMHz\n", |
138 | printf("cpu%d: (%s family=%d model=%d stepping=%d) %dMHz\n", |
110 | m->id, vendor_str[m->arch.vendor], m->arch.family, m->arch.model, m->arch.stepping, |
139 | m->id, vendor_str[m->arch.vendor], m->arch.family, m->arch.model, m->arch.stepping, |
111 | m->frequency_mhz); |
140 | m->frequency_mhz); |
112 | } |
141 | } |
113 | 142 |