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1 | # |
1 | # |
2 | # Copyright (C) 2001-2004 Jakub Jermar |
2 | # Copyright (C) 2001-2004 Jakub Jermar |
3 | # All rights reserved. |
3 | # All rights reserved. |
4 | # |
4 | # |
5 | # Redistribution and use in source and binary forms, with or without |
5 | # Redistribution and use in source and binary forms, with or without |
6 | # modification, are permitted provided that the following conditions |
6 | # modification, are permitted provided that the following conditions |
7 | # are met: |
7 | # are met: |
8 | # |
8 | # |
9 | # - Redistributions of source code must retain the above copyright |
9 | # - Redistributions of source code must retain the above copyright |
10 | # notice, this list of conditions and the following disclaimer. |
10 | # notice, this list of conditions and the following disclaimer. |
11 | # - Redistributions in binary form must reproduce the above copyright |
11 | # - Redistributions in binary form must reproduce the above copyright |
12 | # notice, this list of conditions and the following disclaimer in the |
12 | # notice, this list of conditions and the following disclaimer in the |
13 | # documentation and/or other materials provided with the distribution. |
13 | # documentation and/or other materials provided with the distribution. |
14 | # - The name of the author may not be used to endorse or promote products |
14 | # - The name of the author may not be used to endorse or promote products |
15 | # derived from this software without specific prior written permission. |
15 | # derived from this software without specific prior written permission. |
16 | # |
16 | # |
17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | # |
27 | # |
28 | 28 | ||
29 | ## very low and hardware-level functions |
29 | ## very low and hardware-level functions |
30 | 30 | ||
31 | # Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error word |
31 | # Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error word |
32 | # and 1 means interrupt with error word |
32 | # and 1 means interrupt with error word |
33 | #define ERROR_WORD_INTERRUPT_LIST 0x00027D00 |
33 | #define ERROR_WORD_INTERRUPT_LIST 0x00027D00 |
34 | 34 | ||
35 | .text |
35 | .text |
36 | 36 | ||
37 | .global paging_on |
37 | .global paging_on |
38 | .global enable_l_apic_in_msr |
38 | .global enable_l_apic_in_msr |
39 | .global interrupt_handlers |
39 | .global interrupt_handlers |
- | 40 | .global memcpy |
|
- | 41 | .global memcpy_from_uspace |
|
- | 42 | .global memcpy_from_uspace_failover_address |
|
- | 43 | .global memcpy_to_uspace |
|
- | 44 | .global memcpy_to_uspace_failover_address |
|
- | 45 | ||
- | 46 | ||
- | 47 | #define MEMCPY_DST 4 |
|
- | 48 | #define MEMCPY_SRC 8 |
|
- | 49 | #define MEMCPY_SIZE 12 |
|
- | 50 | ||
- | 51 | /** Copy memory to/from userspace. |
|
- | 52 | * |
|
- | 53 | * This is almost conventional memcpy(). |
|
- | 54 | * The difference is that there is a failover part |
|
- | 55 | * to where control is returned from a page fault |
|
- | 56 | * if the page fault occurs during copy_from_uspace() |
|
- | 57 | * or copy_to_uspace(). |
|
- | 58 | * |
|
- | 59 | * @param MEMCPY_DST(%esp) Destination address. |
|
- | 60 | * @param MEMCPY_SRC(%esp) Source address. |
|
- | 61 | * @param MEMCPY_SIZE(%esp) Size. |
|
- | 62 | * |
|
- | 63 | * @return MEMCPY_SRC(%esp) on success and 0 on failure. |
|
- | 64 | */ |
|
- | 65 | memcpy: |
|
- | 66 | memcpy_from_uspace: |
|
- | 67 | memcpy_to_uspace: |
|
- | 68 | movl %edi, %edx /* save %edi */ |
|
- | 69 | movl %esi, %eax /* save %esi */ |
|
- | 70 | ||
- | 71 | movl MEMCPY_SIZE(%esp), %ecx |
|
- | 72 | shrl $2, %ecx /* size / 4 */ |
|
- | 73 | ||
- | 74 | movl MEMCPY_DST(%esp), %edi |
|
- | 75 | movl MEMCPY_SRC(%esp), %esi |
|
- | 76 | ||
- | 77 | rep movsl /* copy as much as possible word by word */ |
|
- | 78 | ||
- | 79 | movl MEMCPY_SIZE(%esp), %ecx |
|
- | 80 | andl $3, %ecx /* size % 4 */ |
|
- | 81 | jz 0f |
|
- | 82 | ||
- | 83 | rep movsb /* copy the rest byte by byte */ |
|
- | 84 | ||
- | 85 | 0: |
|
- | 86 | movl %edx, %edi |
|
- | 87 | movl %eax, %esi |
|
- | 88 | movl MEMCPY_SRC(%esp), %eax /* MEMCPY_SRC(%esp), success */ |
|
- | 89 | ret |
|
- | 90 | ||
- | 91 | /* |
|
- | 92 | * We got here from as_page_fault() after the memory operations |
|
- | 93 | * above had caused a page fault. |
|
- | 94 | */ |
|
- | 95 | memcpy_from_uspace_failover_address: |
|
- | 96 | memcpy_to_uspace_failover_address: |
|
- | 97 | movl %edx, %edi |
|
- | 98 | movl %eax, %esi |
|
- | 99 | xorl %eax, %eax /* return 0, failure */ |
|
- | 100 | ret |
|
40 | 101 | ||
41 | ## Turn paging on |
102 | ## Turn paging on |
42 | # |
103 | # |
43 | # Enable paging and write-back caching in CR0. |
104 | # Enable paging and write-back caching in CR0. |
44 | # |
105 | # |
45 | paging_on: |
106 | paging_on: |
46 | movl %cr0,%edx |
107 | movl %cr0,%edx |
47 | orl $(1<<31),%edx # paging on |
108 | orl $(1<<31),%edx # paging on |
48 | andl $~((1<<30)|(1<<29)),%edx # clear Cache Disable and not Write Though |
109 | andl $~((1<<30)|(1<<29)),%edx # clear Cache Disable and not Write Though |
49 | movl %edx,%cr0 |
110 | movl %edx,%cr0 |
50 | jmp 0f |
111 | jmp 0f |
51 | 0: |
112 | 0: |
52 | ret |
113 | ret |
53 | 114 | ||
54 | 115 | ||
55 | ## Enable local APIC |
116 | ## Enable local APIC |
56 | # |
117 | # |
57 | # Enable local APIC in MSR. |
118 | # Enable local APIC in MSR. |
58 | # |
119 | # |
59 | enable_l_apic_in_msr: |
120 | enable_l_apic_in_msr: |
60 | push %eax |
121 | push %eax |
61 | 122 | ||
62 | movl $0x1b, %ecx |
123 | movl $0x1b, %ecx |
63 | rdmsr |
124 | rdmsr |
64 | orl $(1<<11),%eax |
125 | orl $(1<<11),%eax |
65 | orl $(0xfee00000),%eax |
126 | orl $(0xfee00000),%eax |
66 | wrmsr |
127 | wrmsr |
67 | 128 | ||
68 | pop %eax |
129 | pop %eax |
69 | ret |
130 | ret |
70 | 131 | ||
71 | # Clear nested flag |
132 | # Clear nested flag |
72 | # overwrites %ecx |
133 | # overwrites %ecx |
73 | .macro CLEAR_NT_FLAG |
134 | .macro CLEAR_NT_FLAG |
74 | pushfl |
135 | pushfl |
75 | pop %ecx |
136 | pop %ecx |
76 | and $0xffffbfff,%ecx |
137 | and $0xffffbfff,%ecx |
77 | push %ecx |
138 | push %ecx |
78 | popfl |
139 | popfl |
79 | .endm |
140 | .endm |
80 | 141 | ||
81 | ## Declare interrupt handlers |
142 | ## Declare interrupt handlers |
82 | # |
143 | # |
83 | # Declare interrupt handlers for n interrupt |
144 | # Declare interrupt handlers for n interrupt |
84 | # vectors starting at vector i. |
145 | # vectors starting at vector i. |
85 | # |
146 | # |
86 | # The handlers setup data segment registers |
147 | # The handlers setup data segment registers |
87 | # and call exc_dispatch(). |
148 | # and call exc_dispatch(). |
88 | # |
149 | # |
89 | #define INTERRUPT_ALIGN 64 |
150 | #define INTERRUPT_ALIGN 64 |
90 | .macro handler i n |
151 | .macro handler i n |
91 | 152 | ||
92 | .ifeq \i-0x30 # Syscall handler |
153 | .ifeq \i-0x30 # Syscall handler |
93 | push %ds |
154 | push %ds |
94 | push %es |
155 | push %es |
95 | push %fs |
156 | push %fs |
96 | push %gs |
157 | push %gs |
97 | 158 | ||
98 | # Push arguments on stack |
159 | # Push arguments on stack |
99 | push %edi |
160 | push %edi |
100 | push %esi |
161 | push %esi |
101 | push %edx |
162 | push %edx |
102 | push %ecx |
163 | push %ecx |
103 | push %eax |
164 | push %eax |
104 | 165 | ||
105 | # we must fill the data segment registers |
166 | # we must fill the data segment registers |
106 | movw $16,%ax |
167 | movw $16,%ax |
107 | movw %ax,%ds |
168 | movw %ax,%ds |
108 | movw %ax,%es |
169 | movw %ax,%es |
109 | 170 | ||
110 | sti |
171 | sti |
111 | 172 | ||
112 | call syscall_handler # syscall_handler(ax,cx,dx,si,di) |
173 | call syscall_handler # syscall_handler(ax,cx,dx,si,di) |
113 | cli |
174 | cli |
114 | addl $20, %esp # clean-up of parameters |
175 | addl $20, %esp # clean-up of parameters |
115 | 176 | ||
116 | pop %gs |
177 | pop %gs |
117 | pop %fs |
178 | pop %fs |
118 | pop %es |
179 | pop %es |
119 | pop %ds |
180 | pop %ds |
120 | 181 | ||
121 | CLEAR_NT_FLAG |
182 | CLEAR_NT_FLAG |
122 | iret |
183 | iret |
123 | .else |
184 | .else |
124 | /* |
185 | /* |
125 | * This macro distinguishes between two versions of ia32 exceptions. |
186 | * This macro distinguishes between two versions of ia32 exceptions. |
126 | * One version has error word and the other does not have it. |
187 | * One version has error word and the other does not have it. |
127 | * The latter version fakes the error word on the stack so that the |
188 | * The latter version fakes the error word on the stack so that the |
128 | * handlers and istate_t can be the same for both types. |
189 | * handlers and istate_t can be the same for both types. |
129 | */ |
190 | */ |
130 | .iflt \i-32 |
191 | .iflt \i-32 |
131 | .if (1 << \i) & ERROR_WORD_INTERRUPT_LIST |
192 | .if (1 << \i) & ERROR_WORD_INTERRUPT_LIST |
132 | /* |
193 | /* |
133 | * With error word, do nothing |
194 | * With error word, do nothing |
134 | */ |
195 | */ |
135 | .else |
196 | .else |
136 | /* |
197 | /* |
137 | * Version without error word, |
198 | * Version without error word, |
138 | */ |
199 | */ |
139 | subl $4, %esp |
200 | subl $4, %esp |
140 | .endif |
201 | .endif |
141 | .else |
202 | .else |
142 | /* |
203 | /* |
143 | * Version without error word, |
204 | * Version without error word, |
144 | */ |
205 | */ |
145 | subl $4, %esp |
206 | subl $4, %esp |
146 | .endif |
207 | .endif |
147 | 208 | ||
148 | push %ds |
209 | push %ds |
149 | push %es |
210 | push %es |
150 | push %fs |
211 | push %fs |
151 | push %gs |
212 | push %gs |
152 | 213 | ||
153 | #ifdef CONFIG_DEBUG_ALLREGS |
214 | #ifdef CONFIG_DEBUG_ALLREGS |
154 | push %ebx |
215 | push %ebx |
155 | push %ebp |
216 | push %ebp |
156 | push %edi |
217 | push %edi |
157 | push %esi |
218 | push %esi |
158 | #else |
219 | #else |
159 | sub $16, %esp |
220 | sub $16, %esp |
160 | #endif |
221 | #endif |
161 | push %edx |
222 | push %edx |
162 | push %ecx |
223 | push %ecx |
163 | push %eax |
224 | push %eax |
164 | 225 | ||
165 | # we must fill the data segment registers |
226 | # we must fill the data segment registers |
166 | movw $16,%ax |
227 | movw $16,%ax |
167 | movw %ax,%ds |
228 | movw %ax,%ds |
168 | movw %ax,%es |
229 | movw %ax,%es |
169 | 230 | ||
170 | pushl %esp # *istate |
231 | pushl %esp # *istate |
171 | pushl $(\i) # intnum |
232 | pushl $(\i) # intnum |
172 | call exc_dispatch # excdispatch(intnum, *istate) |
233 | call exc_dispatch # excdispatch(intnum, *istate) |
173 | addl $8,%esp # Clear arguments from stack |
234 | addl $8,%esp # Clear arguments from stack |
174 | 235 | ||
175 | CLEAR_NT_FLAG # Modifies %ecx |
236 | CLEAR_NT_FLAG # Modifies %ecx |
176 | 237 | ||
177 | pop %eax |
238 | pop %eax |
178 | pop %ecx |
239 | pop %ecx |
179 | pop %edx |
240 | pop %edx |
180 | #ifdef CONFIG_DEBUG_ALLREGS |
241 | #ifdef CONFIG_DEBUG_ALLREGS |
181 | pop %esi |
242 | pop %esi |
182 | pop %edi |
243 | pop %edi |
183 | pop %ebp |
244 | pop %ebp |
184 | pop %ebx |
245 | pop %ebx |
185 | #else |
246 | #else |
186 | add $16, %esp |
247 | add $16, %esp |
187 | #endif |
248 | #endif |
188 | 249 | ||
189 | pop %gs |
250 | pop %gs |
190 | pop %fs |
251 | pop %fs |
191 | pop %es |
252 | pop %es |
192 | pop %ds |
253 | pop %ds |
193 | 254 | ||
194 | addl $4,%esp # Skip error word, no matter whether real or fake. |
255 | addl $4,%esp # Skip error word, no matter whether real or fake. |
195 | iret |
256 | iret |
196 | .endif |
257 | .endif |
197 | 258 | ||
198 | .align INTERRUPT_ALIGN |
259 | .align INTERRUPT_ALIGN |
199 | .if (\n-\i)-1 |
260 | .if (\n-\i)-1 |
200 | handler "(\i+1)",\n |
261 | handler "(\i+1)",\n |
201 | .endif |
262 | .endif |
202 | .endm |
263 | .endm |
203 | 264 | ||
204 | # keep in sync with pm.h !!! |
265 | # keep in sync with pm.h !!! |
205 | IDT_ITEMS=64 |
266 | IDT_ITEMS=64 |
206 | .align INTERRUPT_ALIGN |
267 | .align INTERRUPT_ALIGN |
207 | interrupt_handlers: |
268 | interrupt_handlers: |
208 | h_start: |
269 | h_start: |
209 | handler 0 IDT_ITEMS |
270 | handler 0 IDT_ITEMS |
210 | h_end: |
271 | h_end: |
211 | 272 | ||
212 | .data |
273 | .data |
213 | .global interrupt_handler_size |
274 | .global interrupt_handler_size |
214 | 275 | ||
215 | interrupt_handler_size: .long (h_end-h_start)/IDT_ITEMS |
276 | interrupt_handler_size: .long (h_end-h_start)/IDT_ITEMS |
216 | 277 |