WebSVN – HelenOS – Diff – /trunk/kernel/arch/ia32/src/asm.S


#
# Copyright (c) 2001-2004 Jakub Jermar
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
#   notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
#   notice, this list of conditions and the following disclaimer in the
#   documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
#   derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
## very low and hardware-level functions
 
# Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error
# word and 1 means interrupt with error word
#define ERROR_WORD_INTERRUPT_LIST 0x00027d00
 
.text
 
.global paging_on
.global enable_l_apic_in_msr
.global interrupt_handlers
.global memcpy
.global memcpy_from_uspace
.global memcpy_from_uspace_failover_address
.global memcpy_to_uspace
.global memcpy_to_uspace_failover_address
 
 
#define MEMCPY_DST	4
#define MEMCPY_SRC	8
#define MEMCPY_SIZE	12
 
/** Copy memory to/from userspace.
 *
 * This is almost conventional memcpy().
 * The difference is that there is a failover part
 * to where control is returned from a page fault
 * if the page fault occurs during copy_from_uspace()
 * or copy_to_uspace().
 *
 * @param MEMCPY_DST(%esp)	Destination address.
 * @param MEMCPY_SRC(%esp)	Source address.
 * @param MEMCPY_SIZE(%esp)	Size.
 *
 * @return MEMCPY_SRC(%esp) on success and 0 on failure.
 */
memcpy:
memcpy_from_uspace:
memcpy_to_uspace:
	movl %edi, %edx			/* save %edi */
	movl %esi, %eax			/* save %esi */
	
	movl MEMCPY_SIZE(%esp), %ecx
	shrl $2, %ecx			/* size / 4 */
	
	movl MEMCPY_DST(%esp), %edi
	movl MEMCPY_SRC(%esp), %esi
	
	rep movsl			/* copy whole words */
 
	movl MEMCPY_SIZE(%esp), %ecx
	andl $3, %ecx			/* size % 4 */
	jz 0f
	
	rep movsb			/* copy the rest byte by byte */
 
0:
	movl %edx, %edi
	movl %eax, %esi
	movl MEMCPY_SRC(%esp), %eax	/* MEMCPY_SRC(%esp), success */
	ret
	
/*
 * We got here from as_page_fault() after the memory operations
 * above had caused a page fault.
 */
memcpy_from_uspace_failover_address:
memcpy_to_uspace_failover_address:
	movl %edx, %edi
	movl %eax, %esi
	xorl %eax, %eax			/* return 0, failure */
	ret
 
## Turn paging on
#
# Enable paging and write-back caching in CR0.
#
paging_on:
	movl %cr0, %edx
	orl $(1 << 31), %edx		# paging on
	# clear Cache Disable and not Write Though
	andl $~((1 << 30) | (1 << 29)), %edx
	movl %edx,%cr0
	jmp 0f
0:
	ret
 
 
## Enable local APIC
#
# Enable local APIC in MSR.
#
enable_l_apic_in_msr:
	movl $0x1b, %ecx
	rdmsr
	orl $(1 << 11), %eax
	orl $(0xfee00000), %eax
	wrmsr
	ret
 
# Clear nested flag
# overwrites %ecx
.macro CLEAR_NT_FLAG
	pushfl
	pop %ecx
	and $0xffffbfff, %ecx
	push %ecx
	popfl
.endm	
 
## Declare interrupt handlers
#
# Declare interrupt handlers for n interrupt
# vectors starting at vector i.
#
# The handlers setup data segment registers
# and call exc_dispatch().
#
#define INTERRUPT_ALIGN 64
.macro handler i n
 
.ifeq \i - 0x30     # Syscall handler
	pushl %ds
	pushl %es
	pushl %fs
	pushl %gs
 
	#
	# Push syscall arguments onto the stack
	#
	# NOTE: The idea behind the order of arguments passed in registers is to
	#	use all scratch registers first and preserved registers next.
	#	An optimized libc syscall wrapper can make use of this setup.
	#
	pushl %eax
	pushl %ebp
	pushl %edi
	pushl %esi
	pushl %ebx
	pushl %ecx
	pushl %edx
	
	# we must fill the data segment registers
	movw $16, %ax
	movw %ax, %ds
	movw %ax, %es
	
	cld
	sti
	# syscall_handler(edx, ecx, ebx, esi, edi, ebp, eax)
	call syscall_handler   
	cli
	addl $28, %esp         # clean-up of parameters
	
	popl %gs
	popl %fs
	popl %es
	popl %ds
	
	CLEAR_NT_FLAG
	iret
.else	
	/*
	 * This macro distinguishes between two versions of ia32 exceptions.
	 * One version has error word and the other does not have it.
	 * The latter version fakes the error word on the stack so that the
	 * handlers and istate_t can be the same for both types.
	 */
	.iflt \i - 32
		.if (1 << \i) & ERROR_WORD_INTERRUPT_LIST
			/* 
			 * With error word, do nothing
			 */
                .else
                        /*
                         * Version without error word,
                         */
			subl $4, %esp
                .endif
        .else
                /*
                 * Version without error word,
                 */
		subl $4, %esp
	.endif
	
	pushl %ds
	pushl %es
	pushl %fs
	pushl %gs
 
#ifdef CONFIG_DEBUG_ALLREGS
	pushl %ebx
	pushl %ebp
	pushl %edi
	pushl %esi
#else
	subl $16, %esp
#endif
	pushl %edx
	pushl %ecx
	pushl %eax
	
	# we must fill the data segment registers
	movw $16, %ax
	movw %ax, %ds
	movw %ax, %es
 
	cld
 
	pushl %esp          # *istate
	pushl $(\i)         # intnum
	call exc_dispatch   # excdispatch(intnum, *istate)
	addl $8, %esp       # Clear arguments from stack
 
	CLEAR_NT_FLAG # Modifies %ecx
	
	popl %eax
	popl %ecx
	popl %edx
#ifdef CONFIG_DEBUG_ALLREGS
	popl %esi
	popl %edi
	popl %ebp
	popl %ebx
#else
	addl $16, %esp
#endif	
	
	popl %gs
	popl %fs
	popl %es
	popl %ds
 
	addl $4, %esp	# Skip error word, no matter whether real or fake.
	iret
.endif
 
	.align INTERRUPT_ALIGN
	.if (\n- \i) - 1
	handler "(\i + 1)", \n
	.endif
.endm
 
# keep in sync with pm.h !!!
IDT_ITEMS = 64
.align INTERRUPT_ALIGN
interrupt_handlers:
h_start:
	handler 0 IDT_ITEMS
h_end:
 
.data
.global interrupt_handler_size
 
interrupt_handler_size: .long (h_end - h_start) / IDT_ITEMS
 

Rev 2613	Rev 2784
1	#	1	#
2	# Copyright (c) 2001-2004 Jakub Jermar	2	# Copyright (c) 2001-2004 Jakub Jermar
3	# All rights reserved.	3	# All rights reserved.
4	#	4	#
5	# Redistribution and use in source and binary forms, with or without	5	# Redistribution and use in source and binary forms, with or without
6	# modification, are permitted provided that the following conditions	6	# modification, are permitted provided that the following conditions
7	# are met:	7	# are met:
8	#	8	#
9	# - Redistributions of source code must retain the above copyright	9	# - Redistributions of source code must retain the above copyright
10	# notice, this list of conditions and the following disclaimer.	10	# notice, this list of conditions and the following disclaimer.
11	# - Redistributions in binary form must reproduce the above copyright	11	# - Redistributions in binary form must reproduce the above copyright
12	# notice, this list of conditions and the following disclaimer in the	12	# notice, this list of conditions and the following disclaimer in the
13	# documentation and/or other materials provided with the distribution.	13	# documentation and/or other materials provided with the distribution.
14	# - The name of the author may not be used to endorse or promote products	14	# - The name of the author may not be used to endorse or promote products
15	# derived from this software without specific prior written permission.	15	# derived from this software without specific prior written permission.
16	#	16	#
17	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	#	27	#
28		28
29	## very low and hardware-level functions	29	## very low and hardware-level functions
30		30
31	# Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error	31	# Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error
32	# word and 1 means interrupt with error word	32	# word and 1 means interrupt with error word
33	#define ERROR_WORD_INTERRUPT_LIST 0x00027d00	33	#define ERROR_WORD_INTERRUPT_LIST 0x00027d00
34		34
35	.text	35	.text
36		36
37	.global paging_on	37	.global paging_on
38	.global enable_l_apic_in_msr	38	.global enable_l_apic_in_msr
39	.global interrupt_handlers	39	.global interrupt_handlers
40	.global memcpy	40	.global memcpy
41	.global memcpy_from_uspace	41	.global memcpy_from_uspace
42	.global memcpy_from_uspace_failover_address	42	.global memcpy_from_uspace_failover_address
43	.global memcpy_to_uspace	43	.global memcpy_to_uspace
44	.global memcpy_to_uspace_failover_address	44	.global memcpy_to_uspace_failover_address
45		45
46		46
47	#define MEMCPY_DST 4	47	#define MEMCPY_DST 4
48	#define MEMCPY_SRC 8	48	#define MEMCPY_SRC 8
49	#define MEMCPY_SIZE 12	49	#define MEMCPY_SIZE 12
50		50
51	/** Copy memory to/from userspace.	51	/** Copy memory to/from userspace.
52	*	52	*
53	* This is almost conventional memcpy().	53	* This is almost conventional memcpy().
54	* The difference is that there is a failover part	54	* The difference is that there is a failover part
55	* to where control is returned from a page fault	55	* to where control is returned from a page fault
56	* if the page fault occurs during copy_from_uspace()	56	* if the page fault occurs during copy_from_uspace()
57	* or copy_to_uspace().	57	* or copy_to_uspace().
58	*	58	*
59	* @param MEMCPY_DST(%esp) Destination address.	59	* @param MEMCPY_DST(%esp) Destination address.
60	* @param MEMCPY_SRC(%esp) Source address.	60	* @param MEMCPY_SRC(%esp) Source address.
61	* @param MEMCPY_SIZE(%esp) Size.	61	* @param MEMCPY_SIZE(%esp) Size.
62	*	62	*
63	* @return MEMCPY_SRC(%esp) on success and 0 on failure.	63	* @return MEMCPY_SRC(%esp) on success and 0 on failure.
64	*/	64	*/
65	memcpy:	65	memcpy:
66	memcpy_from_uspace:	66	memcpy_from_uspace:
67	memcpy_to_uspace:	67	memcpy_to_uspace:
68	movl %edi, %edx /* save %edi */	68	movl %edi, %edx /* save %edi */
69	movl %esi, %eax /* save %esi */	69	movl %esi, %eax /* save %esi */
70		70
71	movl MEMCPY_SIZE(%esp), %ecx	71	movl MEMCPY_SIZE(%esp), %ecx
72	shrl $2, %ecx /* size / 4 */	72	shrl $2, %ecx /* size / 4 */
73		73
74	movl MEMCPY_DST(%esp), %edi	74	movl MEMCPY_DST(%esp), %edi
75	movl MEMCPY_SRC(%esp), %esi	75	movl MEMCPY_SRC(%esp), %esi
76		76
77	rep movsl /* copy whole words */	77	rep movsl /* copy whole words */
78		78
79	movl MEMCPY_SIZE(%esp), %ecx	79	movl MEMCPY_SIZE(%esp), %ecx
80	andl $3, %ecx /* size % 4 */	80	andl $3, %ecx /* size % 4 */
81	jz 0f	81	jz 0f
82		82
83	rep movsb /* copy the rest byte by byte */	83	rep movsb /* copy the rest byte by byte */
84		84
85	0:	85	0:
86	movl %edx, %edi	86	movl %edx, %edi
87	movl %eax, %esi	87	movl %eax, %esi
88	movl MEMCPY_SRC(%esp), %eax /* MEMCPY_SRC(%esp), success */	88	movl MEMCPY_SRC(%esp), %eax /* MEMCPY_SRC(%esp), success */
89	ret	89	ret
90		90
91	/*	91	/*
92	* We got here from as_page_fault() after the memory operations	92	* We got here from as_page_fault() after the memory operations
93	* above had caused a page fault.	93	* above had caused a page fault.
94	*/	94	*/
95	memcpy_from_uspace_failover_address:	95	memcpy_from_uspace_failover_address:
96	memcpy_to_uspace_failover_address:	96	memcpy_to_uspace_failover_address:
97	movl %edx, %edi	97	movl %edx, %edi
98	movl %eax, %esi	98	movl %eax, %esi
99	xorl %eax, %eax /* return 0, failure */	99	xorl %eax, %eax /* return 0, failure */
100	ret	100	ret
101		101
102	## Turn paging on	102	## Turn paging on
103	#	103	#
104	# Enable paging and write-back caching in CR0.	104	# Enable paging and write-back caching in CR0.
105	#	105	#
106	paging_on:	106	paging_on:
107	movl %cr0, %edx	107	movl %cr0, %edx
108	orl $(1 << 31), %edx # paging on	108	orl $(1 << 31), %edx # paging on
109	# clear Cache Disable and not Write Though	109	# clear Cache Disable and not Write Though
110	andl $~((1 << 30) \| (1 << 29)), %edx	110	andl $~((1 << 30) \| (1 << 29)), %edx
111	movl %edx,%cr0	111	movl %edx,%cr0
112	jmp 0f	112	jmp 0f
113	0:	113	0:
114	ret	114	ret
115		115
116		116
117	## Enable local APIC	117	## Enable local APIC
118	#	118	#
119	# Enable local APIC in MSR.	119	# Enable local APIC in MSR.
120	#	120	#
121	enable_l_apic_in_msr:	121	enable_l_apic_in_msr:
122	movl $0x1b, %ecx	122	movl $0x1b, %ecx
123	rdmsr	123	rdmsr
124	orl $(1 << 11), %eax	124	orl $(1 << 11), %eax
125	orl $(0xfee00000), %eax	125	orl $(0xfee00000), %eax
126	wrmsr	126	wrmsr
127	ret	127	ret
128		128
129	# Clear nested flag	129	# Clear nested flag
130	# overwrites %ecx	130	# overwrites %ecx
131	.macro CLEAR_NT_FLAG	131	.macro CLEAR_NT_FLAG
132	pushfl	132	pushfl
133	pop %ecx	133	pop %ecx
134	and $0xffffbfff, %ecx	134	and $0xffffbfff, %ecx
135	push %ecx	135	push %ecx
136	popfl	136	popfl
137	.endm	137	.endm
138		138
139	## Declare interrupt handlers	139	## Declare interrupt handlers
140	#	140	#
141	# Declare interrupt handlers for n interrupt	141	# Declare interrupt handlers for n interrupt
142	# vectors starting at vector i.	142	# vectors starting at vector i.
143	#	143	#
144	# The handlers setup data segment registers	144	# The handlers setup data segment registers
145	# and call exc_dispatch().	145	# and call exc_dispatch().
146	#	146	#
147	#define INTERRUPT_ALIGN 64	147	#define INTERRUPT_ALIGN 64
148	.macro handler i n	148	.macro handler i n
149		149
150	.ifeq \i - 0x30 # Syscall handler	150	.ifeq \i - 0x30 # Syscall handler
151	pushl %ds	151	pushl %ds
152	pushl %es	152	pushl %es
153	pushl %fs	153	pushl %fs
154	pushl %gs	154	pushl %gs
155		155
156	#	156	#
157	# Push syscall arguments onto the stack	157	# Push syscall arguments onto the stack
158	#	158	#
159	# NOTE: The idea behind the order of arguments passed in registers is to	159	# NOTE: The idea behind the order of arguments passed in registers is to
160	# use all scratch registers first and preserved registers next.	160	# use all scratch registers first and preserved registers next.
161	# An optimized libc syscall wrapper can make use of this setup.	161	# An optimized libc syscall wrapper can make use of this setup.
162	#	162	#
163	pushl %eax	163	pushl %eax
164	pushl %ebp	164	pushl %ebp
165	pushl %edi	165	pushl %edi
166	pushl %esi	166	pushl %esi
167	pushl %ebx	167	pushl %ebx
168	pushl %ecx	168	pushl %ecx
169	pushl %edx	169	pushl %edx
170		170
171	# we must fill the data segment registers	171	# we must fill the data segment registers
172	movw $16, %ax	172	movw $16, %ax
173	movw %ax, %ds	173	movw %ax, %ds
174	movw %ax, %es	174	movw %ax, %es
175		175
-		176	cld
176	sti	177	sti
177	# syscall_handler(edx, ecx, ebx, esi, edi, ebp, eax)	178	# syscall_handler(edx, ecx, ebx, esi, edi, ebp, eax)
178	call syscall_handler	179	call syscall_handler
179	cli	180	cli
180	addl $28, %esp # clean-up of parameters	181	addl $28, %esp # clean-up of parameters
181		182
182	popl %gs	183	popl %gs
183	popl %fs	184	popl %fs
184	popl %es	185	popl %es
185	popl %ds	186	popl %ds
186		187
187	CLEAR_NT_FLAG	188	CLEAR_NT_FLAG
188	iret	189	iret
189	.else	190	.else
190	/*	191	/*
191	* This macro distinguishes between two versions of ia32 exceptions.	192	* This macro distinguishes between two versions of ia32 exceptions.
192	* One version has error word and the other does not have it.	193	* One version has error word and the other does not have it.
193	* The latter version fakes the error word on the stack so that the	194	* The latter version fakes the error word on the stack so that the
194	* handlers and istate_t can be the same for both types.	195	* handlers and istate_t can be the same for both types.
195	*/	196	*/
196	.iflt \i - 32	197	.iflt \i - 32
197	.if (1 << \i) & ERROR_WORD_INTERRUPT_LIST	198	.if (1 << \i) & ERROR_WORD_INTERRUPT_LIST
198	/*	199	/*
199	* With error word, do nothing	200	* With error word, do nothing
200	*/	201	*/
201	.else	202	.else
202	/*	203	/*
203	* Version without error word,	204	* Version without error word,
204	*/	205	*/
205	subl $4, %esp	206	subl $4, %esp
206	.endif	207	.endif
207	.else	208	.else
208	/*	209	/*
209	* Version without error word,	210	* Version without error word,
210	*/	211	*/
211	subl $4, %esp	212	subl $4, %esp
212	.endif	213	.endif
213		214
214	pushl %ds	215	pushl %ds
215	pushl %es	216	pushl %es
216	pushl %fs	217	pushl %fs
217	pushl %gs	218	pushl %gs
218		219
219	#ifdef CONFIG_DEBUG_ALLREGS	220	#ifdef CONFIG_DEBUG_ALLREGS
220	pushl %ebx	221	pushl %ebx
221	pushl %ebp	222	pushl %ebp
222	pushl %edi	223	pushl %edi
223	pushl %esi	224	pushl %esi
224	#else	225	#else
225	subl $16, %esp	226	subl $16, %esp
226	#endif	227	#endif
227	pushl %edx	228	pushl %edx
228	pushl %ecx	229	pushl %ecx
229	pushl %eax	230	pushl %eax
230		231
231	# we must fill the data segment registers	232	# we must fill the data segment registers
232	movw $16, %ax	233	movw $16, %ax
233	movw %ax, %ds	234	movw %ax, %ds
234	movw %ax, %es	235	movw %ax, %es
235		236
-		237	cld
-		238
236	pushl %esp # *istate	239	pushl %esp # *istate
237	pushl $(\i) # intnum	240	pushl $(\i) # intnum
238	call exc_dispatch # excdispatch(intnum, *istate)	241	call exc_dispatch # excdispatch(intnum, *istate)
239	addl $8, %esp # Clear arguments from stack	242	addl $8, %esp # Clear arguments from stack
240		243
241	CLEAR_NT_FLAG # Modifies %ecx	244	CLEAR_NT_FLAG # Modifies %ecx
242		245
243	popl %eax	246	popl %eax
244	popl %ecx	247	popl %ecx
245	popl %edx	248	popl %edx
246	#ifdef CONFIG_DEBUG_ALLREGS	249	#ifdef CONFIG_DEBUG_ALLREGS
247	popl %esi	250	popl %esi
248	popl %edi	251	popl %edi
249	popl %ebp	252	popl %ebp
250	popl %ebx	253	popl %ebx
251	#else	254	#else
252	addl $16, %esp	255	addl $16, %esp
253	#endif	256	#endif
254		257
255	popl %gs	258	popl %gs
256	popl %fs	259	popl %fs
257	popl %es	260	popl %es
258	popl %ds	261	popl %ds
259		262
260	addl $4, %esp # Skip error word, no matter whether real or fake.	263	addl $4, %esp # Skip error word, no matter whether real or fake.
261	iret	264	iret
262	.endif	265	.endif
263		266
264	.align INTERRUPT_ALIGN	267	.align INTERRUPT_ALIGN
265	.if (\n- \i) - 1	268	.if (\n- \i) - 1
266	handler "(\i + 1)", \n	269	handler "(\i + 1)", \n
267	.endif	270	.endif
268	.endm	271	.endm
269		272
270	# keep in sync with pm.h !!!	273	# keep in sync with pm.h !!!
271	IDT_ITEMS = 64	274	IDT_ITEMS = 64
272	.align INTERRUPT_ALIGN	275	.align INTERRUPT_ALIGN
273	interrupt_handlers:	276	interrupt_handlers:
274	h_start:	277	h_start:
275	handler 0 IDT_ITEMS	278	handler 0 IDT_ITEMS
276	h_end:	279	h_end:
277		280
278	.data	281	.data
279	.global interrupt_handler_size	282	.global interrupt_handler_size
280		283
281	interrupt_handler_size: .long (h_end - h_start) / IDT_ITEMS	284	interrupt_handler_size: .long (h_end - h_start) / IDT_ITEMS
282		285

Subversion Repositories HelenOS

(root)/trunk/kernel/arch/ia32/src/asm.S @ 2472 – Rev 2613 → 2784