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#
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#
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# Copyright (C) 2001-2004 Jakub Jermar
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# Copyright (C) 2001-2004 Jakub Jermar
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# All rights reserved.
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# All rights reserved.
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#
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#
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# Redistribution and use in source and binary forms, with or without
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# modification, are permitted provided that the following conditions
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# are met:
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# are met:
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#
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#
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# - Redistributions of source code must retain the above copyright
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# - Redistributions of source code must retain the above copyright
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#   notice, this list of conditions and the following disclaimer.
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#   notice, this list of conditions and the following disclaimer.
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# - Redistributions in binary form must reproduce the above copyright
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# - Redistributions in binary form must reproduce the above copyright
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#   notice, this list of conditions and the following disclaimer in the
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#   notice, this list of conditions and the following disclaimer in the
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#   documentation and/or other materials provided with the distribution.
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#   documentation and/or other materials provided with the distribution.
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# - The name of the author may not be used to endorse or promote products
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# - The name of the author may not be used to endorse or promote products
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#   derived from this software without specific prior written permission.
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#   derived from this software without specific prior written permission.
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#
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#
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# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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#
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## very low and hardware-level functions
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## very low and hardware-level functions
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# Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error word
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# Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error word
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# and 1 means interrupt with error word
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# and 1 means interrupt with error word
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#define ERROR_WORD_INTERRUPT_LIST 0x00027D00
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#define ERROR_WORD_INTERRUPT_LIST 0x00027D00
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.text
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.text
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.global paging_on
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.global paging_on
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.global enable_l_apic_in_msr
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.global enable_l_apic_in_msr
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.global interrupt_handlers
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.global interrupt_handlers
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## Turn paging on
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## Turn paging on
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#
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#
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# Enable paging and write-back caching in CR0.
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# Enable paging and write-back caching in CR0.
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#
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#
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paging_on:
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paging_on:
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	movl %cr0,%edx
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	movl %cr0,%edx
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	orl $(1<<31),%edx		# paging on
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	orl $(1<<31),%edx		# paging on
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	andl $~((1<<30)|(1<<29)),%edx	# clear Cache Disable and not Write Though
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	andl $~((1<<30)|(1<<29)),%edx	# clear Cache Disable and not Write Though
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	movl %edx,%cr0
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	movl %edx,%cr0
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	jmp 0f
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	jmp 0f
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0:
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0:
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	ret
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	ret
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## Enable local APIC
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## Enable local APIC
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#
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#
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# Enable local APIC in MSR.
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# Enable local APIC in MSR.
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#
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#
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enable_l_apic_in_msr:
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enable_l_apic_in_msr:
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	push %eax
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	push %eax
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	movl $0x1b, %ecx
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	movl $0x1b, %ecx
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	rdmsr
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	rdmsr
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	orl $(1<<11),%eax
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	orl $(1<<11),%eax
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	orl $(0xfee00000),%eax
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	orl $(0xfee00000),%eax
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	wrmsr
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	wrmsr
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	pop %eax
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	pop %eax
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	ret
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	ret
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## Declare interrupt handlers
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## Declare interrupt handlers
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#
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#
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# Declare interrupt handlers for n interrupt
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# Declare interrupt handlers for n interrupt
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# vectors starting at vector i.
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# vectors starting at vector i.
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#
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#
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# The handlers setup data segment registers
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# The handlers setup data segment registers
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# and call exc_dispatch().
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# and call exc_dispatch().
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#
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#
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.macro handler i n
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.macro handler i n
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	push %ebp
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	push %eax
- 
 
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- 
 
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	# Test if this is interrupt with error word or not
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	movl %esp,%ebp
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	movl $(1<<\i), %eax
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	andl $ERROR_WORD_INTERRUPT_LIST,%eax
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	/*
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	 * If this interrupt/exception  stores error word,
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	 * we need to pop EAX.
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	 * If this interrupt doesn't store error word, we emulate it
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	 * for the sake of consistent pstate structure. In that case
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	 * we merely leave the EAX on the stack.
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	 */
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	pusha
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	jz 0f
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- 
 
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	/*
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	 * This exception stores error word.
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	 */
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	pop %eax
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	jmp 1f
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0:
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	/*
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	 * This interrupt doesn't store error word.
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	 * Just restore EAX without doing POP.
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	 */
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	movl (%esp), %eax
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- 
 
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1:
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	pusha
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	movl %esp, %ebp
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	push %ds
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	push %ds
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	push %es
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	push %es
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	# we must fill the data segment registers
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	# we must fill the data segment registers
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	movw $16,%ax
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	movw $16,%ax
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	movw %ax,%ds
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	movw %ax,%ds
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	movw %ax,%es
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	movw %ax,%es
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	movl $(\i),%edi
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	movl $(\i),%edi
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	pushl %ebp
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	pushl %ebp
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	addl $4,(%esp)
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	pushl %edi
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	pushl %edi
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	call exc_dispatch
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	call exc_dispatch
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	addl $8,%esp
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	addl $8,%esp
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	pop %es
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	pop %es
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	pop %ds
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	pop %ds
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 - 
 
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# CLNT
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# Clear Nested Task flag.
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	pushfl
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	pushfl
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	pop %eax
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	pop %eax
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	and $0xFFFFBFFF,%eax
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	and $0xFFFFBFFF,%eax
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	push %eax
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	push %eax
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	popfl
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	popfl
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 - 
 
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 - 
 
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# Test if this is interrupt with error word or not
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	mov $\i,%cl
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	movl $1,%eax
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	test $0xe0,%cl
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	jnz 0f
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	and $0x1f,%cl
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	shl %cl,%eax
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	and $ERROR_WORD_INTERRUPT_LIST,%eax
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	jz 0f
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 - 
 
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 - 
 
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# Return with error word
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	popa
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	pop %ebp
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	add $4,%esp	# Skip error word
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	iret
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 - 
 
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0:
 - 
 
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# Return with no error word
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	popa
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	popa
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	pop %ebp
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	add $4,%esp	# Skip error word, whether real or fake.
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	iret
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	iret
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	.if (\n-\i)-1
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	.if (\n-\i)-1
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	handler "(\i+1)",\n
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	handler "(\i+1)",\n
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	.endif
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	.endif
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.endm
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.endm
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# keep in sync with pm.h !!!
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# keep in sync with pm.h !!!
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IDT_ITEMS=64
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IDT_ITEMS=64
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interrupt_handlers:
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interrupt_handlers:
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h_start:
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h_start:
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	handler 0 64
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	handler 0 64
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#	handler 64 128
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#	handler 64 128
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#	handler 128 192
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#	handler 128 192
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#	handler 192 256
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#	handler 192 256
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h_end:
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h_end:
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.data
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.data
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.global interrupt_handler_size
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.global interrupt_handler_size
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interrupt_handler_size: .long (h_end-h_start)/IDT_ITEMS
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interrupt_handler_size: .long (h_end-h_start)/IDT_ITEMS
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