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1 | /* |
1 | /* |
2 | * Copyright (C) 2001-2004 Jakub Jermar |
2 | * Copyright (C) 2001-2004 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | #ifndef __ia32_ASM_H__ |
29 | #ifndef __ia32_ASM_H__ |
30 | #define __ia32_ASM_H__ |
30 | #define __ia32_ASM_H__ |
31 | 31 | ||
32 | #include <arch/types.h> |
32 | #include <arch/types.h> |
33 | #include <config.h> |
33 | #include <config.h> |
34 | 34 | ||
35 | extern __u32 interrupt_handler_size; |
35 | extern __u32 interrupt_handler_size; |
36 | 36 | ||
37 | extern void paging_on(void); |
37 | extern void paging_on(void); |
38 | 38 | ||
39 | extern void interrupt_handlers(void); |
39 | extern void interrupt_handlers(void); |
40 | 40 | ||
41 | extern __u8 inb(int port); |
41 | extern __u8 inb(int port); |
42 | extern __u16 inw(int port); |
42 | extern __u16 inw(int port); |
43 | extern __u32 inl(int port); |
43 | extern __u32 inl(int port); |
44 | 44 | ||
45 | extern void outb(int port, __u8 b); |
- | |
46 | extern void outw(int port, __u16 w); |
45 | extern void outw(int port, __u16 w); |
47 | extern void outl(int port, __u32 l); |
46 | extern void outl(int port, __u32 l); |
48 | 47 | ||
49 | extern void enable_l_apic_in_msr(void); |
48 | extern void enable_l_apic_in_msr(void); |
50 | 49 | ||
51 | 50 | ||
52 | void asm_delay_loop(__u32 t); |
51 | void asm_delay_loop(__u32 t); |
53 | void asm_fake_loop(__u32 t); |
52 | void asm_fake_loop(__u32 t); |
54 | 53 | ||
55 | 54 | ||
56 | /** Halt CPU |
55 | /** Halt CPU |
57 | * |
56 | * |
58 | * Halt the current CPU until interrupt event. |
57 | * Halt the current CPU until interrupt event. |
59 | */ |
58 | */ |
60 | static inline void cpu_halt(void) { __asm__("hlt\n"); }; |
59 | static inline void cpu_halt(void) { __asm__("hlt\n"); }; |
61 | static inline void cpu_sleep(void) { __asm__("hlt\n"); }; |
60 | static inline void cpu_sleep(void) { __asm__("hlt\n"); }; |
62 | 61 | ||
63 | /** Read CR2 |
62 | /** Read CR2 |
64 | * |
63 | * |
65 | * Return value in CR2 |
64 | * Return value in CR2 |
66 | * |
65 | * |
67 | * @return Value read. |
66 | * @return Value read. |
68 | */ |
67 | */ |
69 | static inline __u32 read_cr2(void) { __u32 v; __asm__ volatile ("movl %%cr2,%0\n" : "=r" (v)); return v; } |
68 | static inline __u32 read_cr2(void) { __u32 v; __asm__ volatile ("movl %%cr2,%0\n" : "=r" (v)); return v; } |
70 | 69 | ||
71 | /** Write CR3 |
70 | /** Write CR3 |
72 | * |
71 | * |
73 | * Write value to CR3. |
72 | * Write value to CR3. |
74 | * |
73 | * |
75 | * @param v Value to be written. |
74 | * @param v Value to be written. |
76 | */ |
75 | */ |
77 | static inline void write_cr3(__u32 v) { __asm__ volatile ("movl %0,%%cr3\n" : : "r" (v)); } |
76 | static inline void write_cr3(__u32 v) { __asm__ volatile ("movl %0,%%cr3\n" : : "r" (v)); } |
78 | 77 | ||
79 | /** Read CR3 |
78 | /** Read CR3 |
80 | * |
79 | * |
81 | * Return value in CR3 |
80 | * Return value in CR3 |
82 | * |
81 | * |
83 | * @return Value read. |
82 | * @return Value read. |
84 | */ |
83 | */ |
85 | static inline __u32 read_cr3(void) { __u32 v; __asm__ volatile ("movl %%cr3,%0\n" : "=r" (v)); return v; } |
84 | static inline __u32 read_cr3(void) { __u32 v; __asm__ volatile ("movl %%cr3,%0\n" : "=r" (v)); return v; } |
86 | 85 | ||
- | 86 | /** Byte to port |
|
- | 87 | * |
|
- | 88 | * Output byte to port |
|
- | 89 | * |
|
- | 90 | * @param port Port to write to |
|
- | 91 | * @param val Value to write |
|
- | 92 | */ |
|
- | 93 | static inline void outb(__u16 port, __u8 val) { __asm__ volatile ("outb %b0, %w1\n" : : "a" (val), "d" (port) ); } |
|
- | 94 | ||
- | 95 | ||
87 | /** Set priority level low |
96 | /** Set priority level low |
88 | * |
97 | * |
89 | * Enable interrupts and return previous |
98 | * Enable interrupts and return previous |
90 | * value of EFLAGS. |
99 | * value of EFLAGS. |
91 | */ |
100 | */ |
92 | static inline pri_t cpu_priority_low(void) { |
101 | static inline pri_t cpu_priority_low(void) { |
93 | pri_t v; |
102 | pri_t v; |
94 | __asm__ volatile ( |
103 | __asm__ volatile ( |
95 | "pushf\n" |
104 | "pushf\n" |
96 | "popl %0\n" |
105 | "popl %0\n" |
97 | "sti\n" |
106 | "sti\n" |
98 | : "=r" (v) |
107 | : "=r" (v) |
99 | ); |
108 | ); |
100 | return v; |
109 | return v; |
101 | } |
110 | } |
102 | 111 | ||
103 | /** Set priority level high |
112 | /** Set priority level high |
104 | * |
113 | * |
105 | * Disable interrupts and return previous |
114 | * Disable interrupts and return previous |
106 | * value of EFLAGS. |
115 | * value of EFLAGS. |
107 | */ |
116 | */ |
108 | static inline pri_t cpu_priority_high(void) { |
117 | static inline pri_t cpu_priority_high(void) { |
109 | pri_t v; |
118 | pri_t v; |
110 | __asm__ volatile ( |
119 | __asm__ volatile ( |
111 | "pushf\n" |
120 | "pushf\n" |
112 | "popl %0\n" |
121 | "popl %0\n" |
113 | "cli\n" |
122 | "cli\n" |
114 | : "=r" (v) |
123 | : "=r" (v) |
115 | ); |
124 | ); |
116 | return v; |
125 | return v; |
117 | } |
126 | } |
118 | 127 | ||
119 | /** Restore priority level |
128 | /** Restore priority level |
120 | * |
129 | * |
121 | * Restore EFLAGS. |
130 | * Restore EFLAGS. |
122 | */ |
131 | */ |
123 | static inline void cpu_priority_restore(pri_t pri) { |
132 | static inline void cpu_priority_restore(pri_t pri) { |
124 | __asm__ volatile ( |
133 | __asm__ volatile ( |
125 | "pushl %0\n" |
134 | "pushl %0\n" |
126 | "popf\n" |
135 | "popf\n" |
127 | : : "r" (pri) |
136 | : : "r" (pri) |
128 | ); |
137 | ); |
129 | } |
138 | } |
130 | 139 | ||
131 | /** Return raw priority level |
140 | /** Return raw priority level |
132 | * |
141 | * |
133 | * Return EFLAFS. |
142 | * Return EFLAFS. |
134 | */ |
143 | */ |
135 | static inline pri_t cpu_priority_read(void) { |
144 | static inline pri_t cpu_priority_read(void) { |
136 | pri_t v; |
145 | pri_t v; |
137 | __asm__ volatile ( |
146 | __asm__ volatile ( |
138 | "pushf\n" |
147 | "pushf\n" |
139 | "popl %0\n" |
148 | "popl %0\n" |
140 | : "=r" (v) |
149 | : "=r" (v) |
141 | ); |
150 | ); |
142 | return v; |
151 | return v; |
143 | } |
152 | } |
144 | 153 | ||
145 | /** Return base address of current stack |
154 | /** Return base address of current stack |
146 | * |
155 | * |
147 | * Return the base address of the current stack. |
156 | * Return the base address of the current stack. |
148 | * The stack is assumed to be STACK_SIZE bytes long. |
157 | * The stack is assumed to be STACK_SIZE bytes long. |
149 | * The stack must start on page boundary. |
158 | * The stack must start on page boundary. |
150 | */ |
159 | */ |
151 | static inline __address get_stack_base(void) |
160 | static inline __address get_stack_base(void) |
152 | { |
161 | { |
153 | __address v; |
162 | __address v; |
154 | 163 | ||
155 | __asm__ volatile ("andl %%esp, %0\n" : "=r" (v) : "0" (~(STACK_SIZE-1))); |
164 | __asm__ volatile ("andl %%esp, %0\n" : "=r" (v) : "0" (~(STACK_SIZE-1))); |
156 | 165 | ||
157 | return v; |
166 | return v; |
158 | } |
167 | } |
159 | 168 | ||
160 | static inline __u64 rdtsc(void) |
169 | static inline __u64 rdtsc(void) |
161 | { |
170 | { |
162 | __u64 v; |
171 | __u64 v; |
163 | 172 | ||
164 | __asm__ volatile("rdtsc\n" : "=A" (v)); |
173 | __asm__ volatile("rdtsc\n" : "=A" (v)); |
165 | 174 | ||
166 | return v; |
175 | return v; |
167 | } |
176 | } |
168 | 177 | ||
- | 178 | ||
169 | #endif |
179 | #endif |
170 | 180 |