WebSVN – HelenOS – Diff – /trunk/kernel/arch/arm32/src/mm/tlb.c


/*
 * Copyright (c) 2007 Michal Kebrt
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup arm32mm
 * @{
 */
/** @file
 *  @brief TLB related functions.
 */
 
#include <mm/tlb.h>
#include <arch/mm/asid.h>
#include <arch/asm.h>
#include <arch/types.h>
#include <arch/mm/page.h>
 
/** Invalidate all entries in TLB. */
void tlb_invalidate_all(void)
{
    asm volatile (
        "eor r1, r1\n"
        "MCR p15, 0, r1, c8, c7, 0\n" // see ARM Architecture reference relE 3.7.7 p.528
       
        ::: "r1"
    );
}
 
/** Invalidate all entries in TLB that belong to specified address space.
 *
 * @param asid This parameter is ignored as the ARM architecture doesn't support it.
 */
void tlb_invalidate_asid(asid_t asid)
{
    tlb_invalidate_all();
}
 
/** Invalidate single entry in TLB
 *
 * @param page Virtual adress of the page
 */
static inline void invalidate_page(uintptr_t page)
{
    asm volatile (
        "MCR p15, 0, %0, c8, c7, 1"
       
        : /* no output */
        : "r"(page) /* input */
    );
}
 
/** Invalidate TLB entries for specified page range belonging to specified address space.
 *
 * @param asid This parameter is ignored as the ARM architecture doesn't support it.
 * @param page Address of the first page whose entry is to be invalidated.
 * @param cnt Number of entries to invalidate.
 */
void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt)
{
    unsigned int i;
 
    for (i = 0; i < cnt; i++)
        invalidate_page(page + i * PAGE_SIZE);
}
 
/** @}
 */
 

Subversion Repositories HelenOS

(root)/trunk/kernel/arch/arm32/src/mm/tlb.c @ 4681 – Rev 2361 → 2410

Rev 2361		Rev 2410
1	/*	1	/*
2	* Copyright (c) 2007 Michal Kebrt	2	* Copyright (c) 2007 Michal Kebrt
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup arm32mm	29	/** @addtogroup arm32mm
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
-		33	* @brief TLB related functions.
33	*/	34	*/
34		35
35	#include <mm/tlb.h>	36	#include <mm/tlb.h>
36	#include <arch/mm/asid.h>	37	#include <arch/mm/asid.h>
37	#include <arch/asm.h>	38	#include <arch/asm.h>
38	#include <arch/types.h>	39	#include <arch/types.h>
39	#include <arch/mm/page.h>	40	#include <arch/mm/page.h>
40		41
41	/** Invalidate all entries in TLB. */	42	/** Invalidate all entries in TLB. */
42	void tlb_invalidate_all(void)	43	void tlb_invalidate_all(void)
43	{	44	{
44	asm volatile (	45	asm volatile (
45	"eor r1, r1\n"	46	"eor r1, r1\n"
46	"MCR p15, 0, r1, c8, c7, 0\n" // see ARM Architecture reference relE 3.7.7 p.528	47	"MCR p15, 0, r1, c8, c7, 0\n" // see ARM Architecture reference relE 3.7.7 p.528
47		48
48	::: "r1"	49	::: "r1"
49	);	50	);
50	}	51	}
51		52
52	/** Invalidate all entries in TLB that belong to specified address space.	53	/** Invalidate all entries in TLB that belong to specified address space.
53	*	54	*
54	* @param asid This parameter is ignored as the ARM architecture doesn't support it.	55	* @param asid This parameter is ignored as the ARM architecture doesn't support it.
55	*/	56	*/
56	void tlb_invalidate_asid(asid_t asid)	57	void tlb_invalidate_asid(asid_t asid)
57	{	58	{
58	tlb_invalidate_all();	59	tlb_invalidate_all();
59	}	60	}
60		61
61	/** Invalidate single entry in TLB	62	/** Invalidate single entry in TLB
62	*	63	*
63	* @param page Virtual adress of the page	64	* @param page Virtual adress of the page
64	*/	65	*/
65	static inline void invalidate_page(uintptr_t page)	66	static inline void invalidate_page(uintptr_t page)
66	{	67	{
67	asm volatile (	68	asm volatile (
68	"MCR p15, 0, %0, c8, c7, 1"	69	"MCR p15, 0, %0, c8, c7, 1"
69		70
70	: /* no output */	71	: /* no output */
71	: "r"(page) /* input */	72	: "r"(page) /* input */
72	);	73	);
73	}	74	}
74		75
75	/** Invalidate TLB entries for specified page range belonging to specified address space.	76	/** Invalidate TLB entries for specified page range belonging to specified address space.
76	*	77	*
77	* @param asid This parameter is ignored as the ARM architecture doesn't support it.	78	* @param asid This parameter is ignored as the ARM architecture doesn't support it.
78	* @param page Address of the first page whose entry is to be invalidated.	79	* @param page Address of the first page whose entry is to be invalidated.
79	* @param cnt Number of entries to invalidate.	80	* @param cnt Number of entries to invalidate.
80	*/	81	*/
81	void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt)	82	void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt)
82	{	83	{
83	unsigned int i;	84	unsigned int i;
84		85
85	for (i = 0; i < cnt; i++)	86	for (i = 0; i < cnt; i++)
86	invalidate_page(page + i * PAGE_SIZE);	87	invalidate_page(page + i * PAGE_SIZE);
87	}	88	}
88		89
89	/** @}	90	/** @}
90	*/	91	*/
91		92