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1 | /* |
1 | /* |
2 | * Copyright (c) 2007 Michal Kebrt, Petr Stepan |
2 | * Copyright (c) 2007 Michal Kebrt, Petr Stepan |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup arm32gxemul |
29 | /** @addtogroup arm32gxemul |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | * @brief GXemul drivers. |
33 | * @brief GXemul drivers. |
34 | */ |
34 | */ |
35 | 35 | ||
36 | #include <interrupt.h> |
36 | #include <interrupt.h> |
37 | #include <ipc/irq.h> |
- | |
38 | #include <console/chardev.h> |
37 | #include <console/chardev.h> |
39 | #include <arch/drivers/gxemul.h> |
38 | #include <arch/drivers/gxemul.h> |
40 | #include <console/console.h> |
39 | #include <console/console.h> |
41 | #include <sysinfo/sysinfo.h> |
40 | #include <sysinfo/sysinfo.h> |
42 | #include <print.h> |
41 | #include <print.h> |
43 | #include <ddi/device.h> |
42 | #include <ddi/device.h> |
44 | #include <mm/page.h> |
43 | #include <mm/page.h> |
45 | #include <arch/machine.h> |
44 | #include <arch/machine.h> |
46 | #include <arch/debug/print.h> |
45 | #include <arch/debug/print.h> |
47 | 46 | ||
48 | /* Addresses of devices. */ |
47 | /* Addresses of devices. */ |
49 | #define GXEMUL_VIDEORAM 0x10000000 |
48 | #define GXEMUL_VIDEORAM 0x10000000 |
50 | #define GXEMUL_KBD 0x10000000 |
49 | #define GXEMUL_KBD 0x10000000 |
51 | #define GXEMUL_HALT_OFFSET 0x10 |
50 | #define GXEMUL_HALT_OFFSET 0x10 |
52 | #define GXEMUL_RTC 0x15000000 |
51 | #define GXEMUL_RTC 0x15000000 |
53 | #define GXEMUL_RTC_FREQ_OFFSET 0x100 |
52 | #define GXEMUL_RTC_FREQ_OFFSET 0x100 |
54 | #define GXEMUL_RTC_ACK_OFFSET 0x110 |
53 | #define GXEMUL_RTC_ACK_OFFSET 0x110 |
55 | #define GXEMUL_IRQC 0x16000000 |
54 | #define GXEMUL_IRQC 0x16000000 |
56 | #define GXEMUL_IRQC_MASK_OFFSET 0x4 |
55 | #define GXEMUL_IRQC_MASK_OFFSET 0x4 |
57 | #define GXEMUL_IRQC_UNMASK_OFFSET 0x8 |
56 | #define GXEMUL_IRQC_UNMASK_OFFSET 0x8 |
58 | #define GXEMUL_MP 0x11000000 |
57 | #define GXEMUL_MP 0x11000000 |
59 | #define GXEMUL_MP_MEMSIZE_OFFSET 0x0090 |
58 | #define GXEMUL_MP_MEMSIZE_OFFSET 0x0090 |
60 | #define GXEMUL_FB 0x12000000 |
59 | #define GXEMUL_FB 0x12000000 |
61 | 60 | ||
62 | /* IRQs */ |
61 | /* IRQs */ |
63 | #define GXEMUL_KBD_IRQ 2 |
62 | #define GXEMUL_KBD_IRQ 2 |
64 | #define GXEMUL_TIMER_IRQ 4 |
63 | #define GXEMUL_TIMER_IRQ 4 |
65 | 64 | ||
66 | static gxemul_hw_map_t gxemul_hw_map; |
65 | static gxemul_hw_map_t gxemul_hw_map; |
67 | static chardev_t console; |
66 | static chardev_t console; |
68 | static irq_t gxemul_console_irq; |
67 | static irq_t gxemul_console_irq; |
69 | static irq_t gxemul_timer_irq; |
68 | static irq_t gxemul_timer_irq; |
70 | 69 | ||
71 | static bool hw_map_init_called = false; |
70 | static bool hw_map_init_called = false; |
72 | 71 | ||
73 | static void gxemul_kbd_enable(chardev_t *dev); |
72 | static void gxemul_kbd_enable(chardev_t *dev); |
74 | static void gxemul_kbd_disable(chardev_t *dev); |
73 | static void gxemul_kbd_disable(chardev_t *dev); |
75 | static void gxemul_write(chardev_t *dev, const char ch, bool silent); |
74 | static void gxemul_write(chardev_t *dev, const char ch, bool silent); |
76 | static char gxemul_do_read(chardev_t *dev); |
75 | static char gxemul_do_read(chardev_t *dev); |
77 | 76 | ||
78 | static chardev_operations_t gxemul_ops = { |
77 | static chardev_operations_t gxemul_ops = { |
79 | .resume = gxemul_kbd_enable, |
78 | .resume = gxemul_kbd_enable, |
80 | .suspend = gxemul_kbd_disable, |
79 | .suspend = gxemul_kbd_disable, |
81 | .write = gxemul_write, |
80 | .write = gxemul_write, |
82 | .read = gxemul_do_read, |
81 | .read = gxemul_do_read, |
83 | }; |
82 | }; |
84 | 83 | ||
85 | 84 | ||
86 | /** Returns the mask of active interrupts. */ |
85 | /** Returns the mask of active interrupts. */ |
87 | static inline uint32_t gxemul_irqc_get_sources(void) |
86 | static inline uint32_t gxemul_irqc_get_sources(void) |
88 | { |
87 | { |
89 | return *((uint32_t *) gxemul_hw_map.irqc); |
88 | return *((uint32_t *) gxemul_hw_map.irqc); |
90 | } |
89 | } |
91 | 90 | ||
92 | 91 | ||
93 | /** Masks interrupt. |
92 | /** Masks interrupt. |
94 | * |
93 | * |
95 | * @param irq interrupt number |
94 | * @param irq interrupt number |
96 | */ |
95 | */ |
97 | static inline void gxemul_irqc_mask(uint32_t irq) |
96 | static inline void gxemul_irqc_mask(uint32_t irq) |
98 | { |
97 | { |
99 | *((uint32_t *) gxemul_hw_map.irqc_mask) = irq; |
98 | *((uint32_t *) gxemul_hw_map.irqc_mask) = irq; |
100 | } |
99 | } |
101 | 100 | ||
102 | 101 | ||
103 | /** Unmasks interrupt. |
102 | /** Unmasks interrupt. |
104 | * |
103 | * |
105 | * @param irq interrupt number |
104 | * @param irq interrupt number |
106 | */ |
105 | */ |
107 | static inline void gxemul_irqc_unmask(uint32_t irq) |
106 | static inline void gxemul_irqc_unmask(uint32_t irq) |
108 | { |
107 | { |
109 | *((uint32_t *) gxemul_hw_map.irqc_unmask) = irq; |
108 | *((uint32_t *) gxemul_hw_map.irqc_unmask) = irq; |
110 | } |
109 | } |
111 | 110 | ||
112 | 111 | ||
113 | /** Initializes #gxemul_hw_map. */ |
112 | /** Initializes #gxemul_hw_map. */ |
114 | void gxemul_hw_map_init(void) |
113 | void gxemul_hw_map_init(void) |
115 | { |
114 | { |
116 | gxemul_hw_map.videoram = hw_map(GXEMUL_VIDEORAM, PAGE_SIZE); |
115 | gxemul_hw_map.videoram = hw_map(GXEMUL_VIDEORAM, PAGE_SIZE); |
117 | gxemul_hw_map.kbd = hw_map(GXEMUL_KBD, PAGE_SIZE); |
116 | gxemul_hw_map.kbd = hw_map(GXEMUL_KBD, PAGE_SIZE); |
118 | gxemul_hw_map.rtc = hw_map(GXEMUL_RTC, PAGE_SIZE); |
117 | gxemul_hw_map.rtc = hw_map(GXEMUL_RTC, PAGE_SIZE); |
119 | gxemul_hw_map.irqc = hw_map(GXEMUL_IRQC, PAGE_SIZE); |
118 | gxemul_hw_map.irqc = hw_map(GXEMUL_IRQC, PAGE_SIZE); |
120 | 119 | ||
121 | gxemul_hw_map.rtc_freq = gxemul_hw_map.rtc + GXEMUL_RTC_FREQ_OFFSET; |
120 | gxemul_hw_map.rtc_freq = gxemul_hw_map.rtc + GXEMUL_RTC_FREQ_OFFSET; |
122 | gxemul_hw_map.rtc_ack = gxemul_hw_map.rtc + GXEMUL_RTC_ACK_OFFSET; |
121 | gxemul_hw_map.rtc_ack = gxemul_hw_map.rtc + GXEMUL_RTC_ACK_OFFSET; |
123 | gxemul_hw_map.irqc_mask = gxemul_hw_map.irqc + GXEMUL_IRQC_MASK_OFFSET; |
122 | gxemul_hw_map.irqc_mask = gxemul_hw_map.irqc + GXEMUL_IRQC_MASK_OFFSET; |
124 | gxemul_hw_map.irqc_unmask = gxemul_hw_map.irqc + |
123 | gxemul_hw_map.irqc_unmask = gxemul_hw_map.irqc + |
125 | GXEMUL_IRQC_UNMASK_OFFSET; |
124 | GXEMUL_IRQC_UNMASK_OFFSET; |
126 | 125 | ||
127 | hw_map_init_called = true; |
126 | hw_map_init_called = true; |
128 | } |
127 | } |
129 | 128 | ||
130 | 129 | ||
131 | /** Putchar that works with gxemul. |
130 | /** Putchar that works with gxemul. |
132 | * |
131 | * |
133 | * @param dev Not used. |
132 | * @param dev Not used. |
134 | * @param ch Characted to be printed. |
133 | * @param ch Characted to be printed. |
135 | */ |
134 | */ |
136 | static void gxemul_write(chardev_t *dev, const char ch, bool silent) |
135 | static void gxemul_write(chardev_t *dev, const char ch, bool silent) |
137 | { |
136 | { |
138 | if (!silent) |
137 | if (!silent) |
139 | *((char *) gxemul_hw_map.videoram) = ch; |
138 | *((char *) gxemul_hw_map.videoram) = ch; |
140 | } |
139 | } |
141 | 140 | ||
142 | /** Enables gxemul keyboard (interrupt unmasked). |
141 | /** Enables gxemul keyboard (interrupt unmasked). |
143 | * |
142 | * |
144 | * @param dev Not used. |
143 | * @param dev Not used. |
145 | * |
144 | * |
146 | * Called from getc(). |
145 | * Called from getc(). |
147 | */ |
146 | */ |
148 | static void gxemul_kbd_enable(chardev_t *dev) |
147 | static void gxemul_kbd_enable(chardev_t *dev) |
149 | { |
148 | { |
150 | gxemul_irqc_unmask(GXEMUL_KBD_IRQ); |
149 | gxemul_irqc_unmask(GXEMUL_KBD_IRQ); |
151 | } |
150 | } |
152 | 151 | ||
153 | /** Disables gxemul keyboard (interrupt masked). |
152 | /** Disables gxemul keyboard (interrupt masked). |
154 | * |
153 | * |
155 | * @param dev not used |
154 | * @param dev not used |
156 | * |
155 | * |
157 | * Called from getc(). |
156 | * Called from getc(). |
158 | */ |
157 | */ |
159 | static void gxemul_kbd_disable(chardev_t *dev) |
158 | static void gxemul_kbd_disable(chardev_t *dev) |
160 | { |
159 | { |
161 | gxemul_irqc_mask(GXEMUL_KBD_IRQ); |
160 | gxemul_irqc_mask(GXEMUL_KBD_IRQ); |
162 | } |
161 | } |
163 | 162 | ||
164 | /** Read character using polling, assume interrupts disabled. |
163 | /** Read character using polling, assume interrupts disabled. |
165 | * |
164 | * |
166 | * @param dev Not used. |
165 | * @param dev Not used. |
167 | */ |
166 | */ |
168 | static char gxemul_do_read(chardev_t *dev) |
167 | static char gxemul_do_read(chardev_t *dev) |
169 | { |
168 | { |
170 | char ch; |
169 | char ch; |
171 | 170 | ||
172 | while (1) { |
171 | while (1) { |
173 | ch = *((volatile char *) gxemul_hw_map.kbd); |
172 | ch = *((volatile char *) gxemul_hw_map.kbd); |
174 | if (ch) { |
173 | if (ch) { |
175 | if (ch == '\r') |
174 | if (ch == '\r') |
176 | return '\n'; |
175 | return '\n'; |
177 | if (ch == 0x7f) |
176 | if (ch == 0x7f) |
178 | return '\b'; |
177 | return '\b'; |
179 | return ch; |
178 | return ch; |
180 | } |
179 | } |
181 | } |
180 | } |
182 | } |
181 | } |
183 | 182 | ||
184 | /** Process keyboard interrupt. |
183 | /** Process keyboard interrupt. |
185 | * |
184 | * |
186 | * @param irq IRQ information. |
185 | * @param irq IRQ information. |
187 | */ |
186 | */ |
188 | static void gxemul_irq_handler(irq_t *irq) |
187 | static void gxemul_irq_handler(irq_t *irq) |
189 | { |
188 | { |
190 | char ch = 0; |
189 | char ch = 0; |
191 | 190 | ||
192 | ch = *((char *) gxemul_hw_map.kbd); |
191 | ch = *((char *) gxemul_hw_map.kbd); |
193 | if (ch == '\r') { |
192 | if (ch == '\r') { |
194 | ch = '\n'; |
193 | ch = '\n'; |
195 | } |
194 | } |
196 | if (ch == 0x7f) { |
195 | if (ch == 0x7f) { |
197 | ch = '\b'; |
196 | ch = '\b'; |
198 | } |
197 | } |
199 | chardev_push_character(&console, ch); |
198 | chardev_push_character(&console, ch); |
200 | } |
199 | } |
201 | 200 | ||
202 | static irq_ownership_t gxemul_claim(irq_t *irq) |
201 | static irq_ownership_t gxemul_claim(irq_t *irq) |
203 | { |
202 | { |
204 | return IRQ_ACCEPT; |
203 | return IRQ_ACCEPT; |
205 | } |
204 | } |
206 | - | ||
207 | - | ||
208 | /** Acquire console back for kernel. */ |
- | |
209 | void gxemul_grab_console(void) |
- | |
210 | { |
- | |
211 | ipl_t ipl = interrupts_disable(); |
- | |
212 | spinlock_lock(&gxemul_console_irq.lock); |
- | |
213 | gxemul_console_irq.notif_cfg.notify = false; |
- | |
214 | spinlock_unlock(&gxemul_console_irq.lock); |
- | |
215 | interrupts_restore(ipl); |
- | |
216 | } |
- | |
217 | - | ||
218 | /** Return console to userspace. */ |
- | |
219 | void gxemul_release_console(void) |
- | |
220 | { |
- | |
221 | ipl_t ipl = interrupts_disable(); |
- | |
222 | spinlock_lock(&gxemul_console_irq.lock); |
- | |
223 | if (gxemul_console_irq.notif_cfg.answerbox) { |
- | |
224 | gxemul_console_irq.notif_cfg.notify = true; |
- | |
225 | } |
- | |
226 | spinlock_unlock(&gxemul_console_irq.lock); |
- | |
227 | interrupts_restore(ipl); |
- | |
228 | } |
- | |
229 | 205 | ||
230 | /** Initializes console object representing gxemul console. |
206 | /** Initializes console object representing gxemul console. |
231 | * |
207 | * |
232 | * @param devno device number. |
208 | * @param devno device number. |
233 | */ |
209 | */ |
234 | void gxemul_console_init(devno_t devno) |
210 | void gxemul_console_init(devno_t devno) |
235 | { |
211 | { |
236 | chardev_initialize("gxemul_console", &console, &gxemul_ops); |
212 | chardev_initialize("gxemul_console", &console, &gxemul_ops); |
237 | stdin = &console; |
213 | stdin = &console; |
238 | stdout = &console; |
214 | stdout = &console; |
239 | 215 | ||
240 | irq_initialize(&gxemul_console_irq); |
216 | irq_initialize(&gxemul_console_irq); |
241 | gxemul_console_irq.devno = devno; |
217 | gxemul_console_irq.devno = devno; |
242 | gxemul_console_irq.inr = GXEMUL_KBD_IRQ; |
218 | gxemul_console_irq.inr = GXEMUL_KBD_IRQ; |
243 | gxemul_console_irq.claim = gxemul_claim; |
219 | gxemul_console_irq.claim = gxemul_claim; |
244 | gxemul_console_irq.handler = gxemul_irq_handler; |
220 | gxemul_console_irq.handler = gxemul_irq_handler; |
245 | irq_register(&gxemul_console_irq); |
221 | irq_register(&gxemul_console_irq); |
246 | 222 | ||
247 | gxemul_irqc_unmask(GXEMUL_KBD_IRQ); |
223 | gxemul_irqc_unmask(GXEMUL_KBD_IRQ); |
248 | 224 | ||
249 | sysinfo_set_item_val("kbd", NULL, true); |
225 | sysinfo_set_item_val("kbd", NULL, true); |
250 | sysinfo_set_item_val("kbd.devno", NULL, devno); |
226 | sysinfo_set_item_val("kbd.devno", NULL, devno); |
251 | sysinfo_set_item_val("kbd.inr", NULL, GXEMUL_KBD_IRQ); |
227 | sysinfo_set_item_val("kbd.inr", NULL, GXEMUL_KBD_IRQ); |
252 | sysinfo_set_item_val("kbd.address.virtual", NULL, gxemul_hw_map.kbd); |
228 | sysinfo_set_item_val("kbd.address.virtual", NULL, gxemul_hw_map.kbd); |
253 | } |
229 | } |
254 | 230 | ||
255 | /** Starts gxemul Real Time Clock device, which asserts regular interrupts. |
231 | /** Starts gxemul Real Time Clock device, which asserts regular interrupts. |
256 | * |
232 | * |
257 | * @param frequency Interrupts frequency (0 disables RTC). |
233 | * @param frequency Interrupts frequency (0 disables RTC). |
258 | */ |
234 | */ |
259 | static void gxemul_timer_start(uint32_t frequency) |
235 | static void gxemul_timer_start(uint32_t frequency) |
260 | { |
236 | { |
261 | *((uint32_t*) gxemul_hw_map.rtc_freq) = frequency; |
237 | *((uint32_t*) gxemul_hw_map.rtc_freq) = frequency; |
262 | } |
238 | } |
263 | 239 | ||
264 | static irq_ownership_t gxemul_timer_claim(irq_t *irq) |
240 | static irq_ownership_t gxemul_timer_claim(irq_t *irq) |
265 | { |
241 | { |
266 | return IRQ_ACCEPT; |
242 | return IRQ_ACCEPT; |
267 | } |
243 | } |
268 | 244 | ||
269 | /** Timer interrupt handler. |
245 | /** Timer interrupt handler. |
270 | * |
246 | * |
271 | * @param irq Interrupt information. |
247 | * @param irq Interrupt information. |
272 | * @param arg Not used. |
248 | * @param arg Not used. |
273 | */ |
249 | */ |
274 | static void gxemul_timer_irq_handler(irq_t *irq) |
250 | static void gxemul_timer_irq_handler(irq_t *irq) |
275 | { |
251 | { |
276 | /* |
252 | /* |
277 | * We are holding a lock which prevents preemption. |
253 | * We are holding a lock which prevents preemption. |
278 | * Release the lock, call clock() and reacquire the lock again. |
254 | * Release the lock, call clock() and reacquire the lock again. |
279 | */ |
255 | */ |
280 | spinlock_unlock(&irq->lock); |
256 | spinlock_unlock(&irq->lock); |
281 | clock(); |
257 | clock(); |
282 | spinlock_lock(&irq->lock); |
258 | spinlock_lock(&irq->lock); |
283 | 259 | ||
284 | /* acknowledge tick */ |
260 | /* acknowledge tick */ |
285 | *((uint32_t*) gxemul_hw_map.rtc_ack) = 0; |
261 | *((uint32_t*) gxemul_hw_map.rtc_ack) = 0; |
286 | } |
262 | } |
287 | 263 | ||
288 | /** Initializes and registers timer interrupt handler. */ |
264 | /** Initializes and registers timer interrupt handler. */ |
289 | static void gxemul_timer_irq_init(void) |
265 | static void gxemul_timer_irq_init(void) |
290 | { |
266 | { |
291 | irq_initialize(&gxemul_timer_irq); |
267 | irq_initialize(&gxemul_timer_irq); |
292 | gxemul_timer_irq.devno = device_assign_devno(); |
268 | gxemul_timer_irq.devno = device_assign_devno(); |
293 | gxemul_timer_irq.inr = GXEMUL_TIMER_IRQ; |
269 | gxemul_timer_irq.inr = GXEMUL_TIMER_IRQ; |
294 | gxemul_timer_irq.claim = gxemul_timer_claim; |
270 | gxemul_timer_irq.claim = gxemul_timer_claim; |
295 | gxemul_timer_irq.handler = gxemul_timer_irq_handler; |
271 | gxemul_timer_irq.handler = gxemul_timer_irq_handler; |
296 | 272 | ||
297 | irq_register(&gxemul_timer_irq); |
273 | irq_register(&gxemul_timer_irq); |
298 | } |
274 | } |
299 | 275 | ||
300 | 276 | ||
301 | /** Starts timer. |
277 | /** Starts timer. |
302 | * |
278 | * |
303 | * Initiates regular timer interrupts after initializing |
279 | * Initiates regular timer interrupts after initializing |
304 | * corresponding interrupt handler. |
280 | * corresponding interrupt handler. |
305 | */ |
281 | */ |
306 | void gxemul_timer_irq_start(void) |
282 | void gxemul_timer_irq_start(void) |
307 | { |
283 | { |
308 | gxemul_timer_irq_init(); |
284 | gxemul_timer_irq_init(); |
309 | gxemul_timer_start(GXEMUL_TIMER_FREQ); |
285 | gxemul_timer_start(GXEMUL_TIMER_FREQ); |
310 | } |
286 | } |
311 | 287 | ||
312 | /** Returns the size of emulated memory. |
288 | /** Returns the size of emulated memory. |
313 | * |
289 | * |
314 | * @return Size in bytes. |
290 | * @return Size in bytes. |
315 | */ |
291 | */ |
316 | size_t gxemul_get_memory_size(void) |
292 | size_t gxemul_get_memory_size(void) |
317 | { |
293 | { |
318 | return *((int *) (GXEMUL_MP + GXEMUL_MP_MEMSIZE_OFFSET)); |
294 | return *((int *) (GXEMUL_MP + GXEMUL_MP_MEMSIZE_OFFSET)); |
319 | } |
295 | } |
320 | 296 | ||
321 | /** Prints a character. |
297 | /** Prints a character. |
322 | * |
298 | * |
323 | * @param ch Character to be printed. |
299 | * @param ch Character to be printed. |
324 | */ |
300 | */ |
325 | void gxemul_debug_putc(char ch) |
301 | void gxemul_debug_putc(char ch) |
326 | { |
302 | { |
327 | char *addr = 0; |
303 | char *addr = 0; |
328 | if (!hw_map_init_called) { |
304 | if (!hw_map_init_called) { |
329 | addr = (char *) GXEMUL_KBD; |
305 | addr = (char *) GXEMUL_KBD; |
330 | } else { |
306 | } else { |
331 | addr = (char *) gxemul_hw_map.videoram; |
307 | addr = (char *) gxemul_hw_map.videoram; |
332 | } |
308 | } |
333 | 309 | ||
334 | *(addr) = ch; |
310 | *(addr) = ch; |
335 | } |
311 | } |
336 | 312 | ||
337 | /** Stops gxemul. */ |
313 | /** Stops gxemul. */ |
338 | void gxemul_cpu_halt(void) |
314 | void gxemul_cpu_halt(void) |
339 | { |
315 | { |
340 | char * addr = 0; |
316 | char * addr = 0; |
341 | if (!hw_map_init_called) { |
317 | if (!hw_map_init_called) { |
342 | addr = (char *) GXEMUL_KBD; |
318 | addr = (char *) GXEMUL_KBD; |
343 | } else { |
319 | } else { |
344 | addr = (char *) gxemul_hw_map.videoram; |
320 | addr = (char *) gxemul_hw_map.videoram; |
345 | } |
321 | } |
346 | 322 | ||
347 | *(addr + GXEMUL_HALT_OFFSET) = '\0'; |
323 | *(addr + GXEMUL_HALT_OFFSET) = '\0'; |
348 | } |
324 | } |
349 | 325 | ||
350 | /** Gxemul specific interrupt exception handler. |
326 | /** Gxemul specific interrupt exception handler. |
351 | * |
327 | * |
352 | * Determines sources of the interrupt from interrupt controller and |
328 | * Determines sources of the interrupt from interrupt controller and |
353 | * calls high-level handlers for them. |
329 | * calls high-level handlers for them. |
354 | * |
330 | * |
355 | * @param exc_no Interrupt exception number. |
331 | * @param exc_no Interrupt exception number. |
356 | * @param istate Saved processor state. |
332 | * @param istate Saved processor state. |
357 | */ |
333 | */ |
358 | void gxemul_irq_exception(int exc_no, istate_t *istate) |
334 | void gxemul_irq_exception(int exc_no, istate_t *istate) |
359 | { |
335 | { |
360 | uint32_t sources = gxemul_irqc_get_sources(); |
336 | uint32_t sources = gxemul_irqc_get_sources(); |
361 | int i; |
337 | int i; |
362 | 338 | ||
363 | for (i = 0; i < GXEMUL_IRQC_MAX_IRQ; i++) { |
339 | for (i = 0; i < GXEMUL_IRQC_MAX_IRQ; i++) { |
364 | if (sources & (1 << i)) { |
340 | if (sources & (1 << i)) { |
365 | irq_t *irq = irq_dispatch_and_lock(i); |
341 | irq_t *irq = irq_dispatch_and_lock(i); |
366 | if (irq) { |
342 | if (irq) { |
367 | /* The IRQ handler was found. */ |
343 | /* The IRQ handler was found. */ |
368 | irq->handler(irq); |
344 | irq->handler(irq); |
369 | spinlock_unlock(&irq->lock); |
345 | spinlock_unlock(&irq->lock); |
370 | } else { |
346 | } else { |
371 | /* Spurious interrupt.*/ |
347 | /* Spurious interrupt.*/ |
372 | dprintf("cpu%d: spurious interrupt (inum=%d)\n", |
348 | dprintf("cpu%d: spurious interrupt (inum=%d)\n", |
373 | CPU->id, i); |
349 | CPU->id, i); |
374 | } |
350 | } |
375 | } |
351 | } |
376 | } |
352 | } |
377 | } |
353 | } |
378 | 354 | ||
379 | /** Returns address of framebuffer device. |
355 | /** Returns address of framebuffer device. |
380 | * |
356 | * |
381 | * @return Address of framebuffer device. |
357 | * @return Address of framebuffer device. |
382 | */ |
358 | */ |
383 | uintptr_t gxemul_get_fb_address(void) |
359 | uintptr_t gxemul_get_fb_address(void) |
384 | { |
360 | { |
385 | return (uintptr_t) GXEMUL_FB; |
361 | return (uintptr_t) GXEMUL_FB; |
386 | } |
362 | } |
387 | 363 | ||
388 | /** @} |
364 | /** @} |
389 | */ |
365 | */ |
390 | 366 |