WebSVN – HelenOS – Diff – /trunk/kernel/arch/arm32/src/cpu/cpu.c


/*
 * Copyright (c) 2007 Michal Kebrt
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup arm32
 * @{
 */
/** @file
 *  @brief CPU identification.
 */
 
#include <arch/cpu.h>
#include <cpu.h>
#include <arch.h>
#include <print.h>
 
/** Number of indexes left out in the #imp_data array */
#define IMP_DATA_START_OFFSET 0x40
 
/** Implementators (vendor) names */
static char *imp_data[] = {
    "?",                    /* IMP_DATA_START_OFFSET */
    "ARM Ltd",              /* 0x41 */
    "",                 /* 0x42 */
    "",                                 /* 0x43 */
    "Digital Equipment Corporation",    /* 0x44 */
    "", "", "", "", "", "", "", "", "", "", /* 0x45 - 0x4e */
    "", "", "", "", "", "", "", "", "", "", /* 0x4f - 0x58 */
    "", "", "", "", "", "", "", "", "", "", /* 0x59 - 0x62 */
    "", "", "", "", "", "",         /* 0x63 - 0x68 */
    "Intel Corporation"         /* 0x69 */
};
 
/** Length of the #imp_data array */
static unsigned int imp_data_length = sizeof(imp_data) / sizeof(char *);
 
/** Architecture names */
static char *arch_data[] = {
    "?",       /* 0x0 */
    "4",       /* 0x1 */
    "4T",      /* 0x2 */
    "5",       /* 0x3 */
    "5T",      /* 0x4 */
    "5TE",     /* 0x5 */
    "5TEJ",    /* 0x6 */
    "6"        /* 0x7 */
};
 
/** Length of the #arch_data array */
static unsigned int arch_data_length = sizeof(arch_data) / sizeof(char *);
 
 
/** Retrieves processor identification from CP15 register 0.
 *
 * @param cpu Structure for storing CPU identification.
 */
static void arch_cpu_identify(cpu_arch_t *cpu)
{
    uint32_t ident;
    asm volatile (
        "mrc p15, 0, %[ident], c0, c0, 0\n"
        : [ident] "=r" (ident)
    );
   
    cpu->imp_num = ident >> 24;
    cpu->variant_num = (ident << 8) >> 28;
    cpu->arch_num = (ident << 12) >> 28;
    cpu->prim_part_num = (ident << 16) >> 20;
    cpu->rev_num = (ident << 28) >> 28;
}
 
/** Does nothing on ARM. */
void cpu_arch_init(void)
{
}
 
/** Retrieves processor identification and stores it to #CPU.arch */
void cpu_identify(void)
{
    arch_cpu_identify(&CPU->arch);
}
 
/** Prints CPU identification. */
void cpu_print_report(cpu_t *m)
{
    char * vendor = imp_data[0];
    char * architecture = arch_data[0];
    cpu_arch_t * cpu_arch = &m->arch;
 
    if ((cpu_arch->imp_num) > 0 &&
        (cpu_arch->imp_num < (imp_data_length + IMP_DATA_START_OFFSET))) {
        vendor = imp_data[cpu_arch->imp_num - IMP_DATA_START_OFFSET];
    }
 
    if ((cpu_arch->arch_num) > 0 &&
        (cpu_arch->arch_num < arch_data_length)) {
        architecture = arch_data[cpu_arch->arch_num];
    }
 
    printf("cpu%d: vendor=%s, architecture=ARM%s, part number=%x, "
        "variant=%x, revision=%x\n",
        m->id, vendor, architecture, cpu_arch->prim_part_num,
        cpu_arch->variant_num, cpu_arch->rev_num);
}
 
/** @}
 */
 

Subversion Repositories HelenOS

(root)/trunk/kernel/arch/arm32/src/cpu/cpu.c @ 3922 – Rev 2745 → 4018

Rev 2745		Rev 4018
1	/*	1	/*
2	* Copyright (c) 2007 Michal Kebrt	2	* Copyright (c) 2007 Michal Kebrt
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup arm32	29	/** @addtogroup arm32
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	* @brief CPU identification.	33	* @brief CPU identification.
34	*/	34	*/
35		35
36	#include <arch/cpu.h>	36	#include <arch/cpu.h>
37	#include <cpu.h>	37	#include <cpu.h>
38	#include <arch.h>	38	#include <arch.h>
39	#include <print.h>	39	#include <print.h>
40		40
41	/** Number of indexes left out in the #imp_data array */	41	/** Number of indexes left out in the #imp_data array */
42	#define IMP_DATA_START_OFFSET 0x40	42	#define IMP_DATA_START_OFFSET 0x40
43		43
44	/** Implementators (vendor) names */	44	/** Implementators (vendor) names */
45	static char *imp_data[] = {	45	static char *imp_data[] = {
46	"?", /* IMP_DATA_START_OFFSET */	46	"?", /* IMP_DATA_START_OFFSET */
47	"ARM Ltd", /* 0x41 */	47	"ARM Ltd", /* 0x41 */
48	"", /* 0x42 */	48	"", /* 0x42 */
49	"", /* 0x43 */	49	"", /* 0x43 */
50	"Digital Equipment Corporation", /* 0x44 */	50	"Digital Equipment Corporation", /* 0x44 */
51	"", "", "", "", "", "", "", "", "", "", /* 0x45 - 0x4e */	51	"", "", "", "", "", "", "", "", "", "", /* 0x45 - 0x4e */
52	"", "", "", "", "", "", "", "", "", "", /* 0x4f - 0x58 */	52	"", "", "", "", "", "", "", "", "", "", /* 0x4f - 0x58 */
53	"", "", "", "", "", "", "", "", "", "", /* 0x59 - 0x62 */	53	"", "", "", "", "", "", "", "", "", "", /* 0x59 - 0x62 */
54	"", "", "", "", "", "", /* 0x63 - 0x68 */	54	"", "", "", "", "", "", /* 0x63 - 0x68 */
55	"Intel Corporation" /* 0x69 */	55	"Intel Corporation" /* 0x69 */
56	};	56	};
57		57
58	/** Length of the #imp_data array */	58	/** Length of the #imp_data array */
59	static unsigned int imp_data_length = sizeof(imp_data) / sizeof(char *);	59	static unsigned int imp_data_length = sizeof(imp_data) / sizeof(char *);
60		60
61	/** Architecture names */	61	/** Architecture names */
62	static char *arch_data[] = {	62	static char *arch_data[] = {
63	"?", /* 0x0 */	63	"?", /* 0x0 */
64	"4", /* 0x1 */	64	"4", /* 0x1 */
65	"4T", /* 0x2 */	65	"4T", /* 0x2 */
66	"5", /* 0x3 */	66	"5", /* 0x3 */
67	"5T", /* 0x4 */	67	"5T", /* 0x4 */
68	"5TE", /* 0x5 */	68	"5TE", /* 0x5 */
69	"5TEJ", /* 0x6 */	69	"5TEJ", /* 0x6 */
70	"6" /* 0x7 */	70	"6" /* 0x7 */
71	};	71	};
72		72
73	/** Length of the #arch_data array */	73	/** Length of the #arch_data array */
74	static unsigned int arch_data_length = sizeof(arch_data) / sizeof(char *);	74	static unsigned int arch_data_length = sizeof(arch_data) / sizeof(char *);
75		75
76		76
77	/** Retrieves processor identification from CP15 register 0.	77	/** Retrieves processor identification from CP15 register 0.
78	*	78	*
79	* @param cpu Structure for storing CPU identification.	79	* @param cpu Structure for storing CPU identification.
80	*/	80	*/
81	static void arch_cpu_identify(cpu_arch_t *cpu)	81	static void arch_cpu_identify(cpu_arch_t *cpu)
82	{	82	{
83	uint32_t ident;	83	uint32_t ident;
84	asm volatile (	84	asm volatile (
85	"mrc p15, 0, %0, c0, c0, 0\n"	85	"mrc p15, 0, %[ident], c0, c0, 0\n"
86	: "=r" (ident)	86	: [ident] "=r" (ident)
87	);	87	);
88		88
89	cpu->imp_num = ident >> 24;	89	cpu->imp_num = ident >> 24;
90	cpu->variant_num = (ident << 8) >> 28;	90	cpu->variant_num = (ident << 8) >> 28;
91	cpu->arch_num = (ident << 12) >> 28;	91	cpu->arch_num = (ident << 12) >> 28;
92	cpu->prim_part_num = (ident << 16) >> 20;	92	cpu->prim_part_num = (ident << 16) >> 20;
93	cpu->rev_num = (ident << 28) >> 28;	93	cpu->rev_num = (ident << 28) >> 28;
94	}	94	}
95		95
96	/** Does nothing on ARM. */	96	/** Does nothing on ARM. */
97	void cpu_arch_init(void)	97	void cpu_arch_init(void)
98	{	98	{
99	}	99	}
100		100
101	/** Retrieves processor identification and stores it to #CPU.arch */	101	/** Retrieves processor identification and stores it to #CPU.arch */
102	void cpu_identify(void)	102	void cpu_identify(void)
103	{	103	{
104	arch_cpu_identify(&CPU->arch);	104	arch_cpu_identify(&CPU->arch);
105	}	105	}
106		106
107	/** Prints CPU identification. */	107	/** Prints CPU identification. */
108	void cpu_print_report(cpu_t *m)	108	void cpu_print_report(cpu_t *m)
109	{	109	{
110	char * vendor = imp_data[0];	110	char * vendor = imp_data[0];
111	char * architecture = arch_data[0];	111	char * architecture = arch_data[0];
112	cpu_arch_t * cpu_arch = &m->arch;	112	cpu_arch_t * cpu_arch = &m->arch;
113		113
114	if ((cpu_arch->imp_num) > 0 &&	114	if ((cpu_arch->imp_num) > 0 &&
115	(cpu_arch->imp_num < (imp_data_length + IMP_DATA_START_OFFSET))) {	115	(cpu_arch->imp_num < (imp_data_length + IMP_DATA_START_OFFSET))) {
116	vendor = imp_data[cpu_arch->imp_num - IMP_DATA_START_OFFSET];	116	vendor = imp_data[cpu_arch->imp_num - IMP_DATA_START_OFFSET];
117	}	117	}
118		118
119	if ((cpu_arch->arch_num) > 0 &&	119	if ((cpu_arch->arch_num) > 0 &&
120	(cpu_arch->arch_num < arch_data_length)) {	120	(cpu_arch->arch_num < arch_data_length)) {
121	architecture = arch_data[cpu_arch->arch_num];	121	architecture = arch_data[cpu_arch->arch_num];
122	}	122	}
123		123
124	printf("cpu%d: vendor=%s, architecture=ARM%s, part number=%x, "	124	printf("cpu%d: vendor=%s, architecture=ARM%s, part number=%x, "
125	"variant=%x, revision=%x\n",	125	"variant=%x, revision=%x\n",
126	m->id, vendor, architecture, cpu_arch->prim_part_num,	126	m->id, vendor, architecture, cpu_arch->prim_part_num,
127	cpu_arch->variant_num, cpu_arch->rev_num);	127	cpu_arch->variant_num, cpu_arch->rev_num);
128	}	128	}
129		129
130	/** @}	130	/** @}
131	*/	131	*/
132		132