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/*
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/*
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 * Copyright (c) 2007 Michal Kebrt
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 * Copyright (c) 2007 Michal Kebrt
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 * All rights reserved.
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 * All rights reserved.
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 *
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * modification, are permitted provided that the following conditions
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 * are met:
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 * are met:
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 *
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 *
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 * - Redistributions of source code must retain the above copyright
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *   derived from this software without specific prior written permission.
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 *
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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 */
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/** @addtogroup arm32
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/** @addtogroup arm32
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 * @{
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 * @{
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 */
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 */
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/** @file
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/** @file
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 *  @brief CPU identification.
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 *  @brief CPU identification.
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 */
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 */
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#include <arch/cpu.h>
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#include <arch/cpu.h>
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#include <cpu.h>
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#include <cpu.h>
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#include <arch.h>
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#include <arch.h>
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#include <print.h>  
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#include <print.h>
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/** Number of indexes left out in the #imp_data array */
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/** Number of indexes left out in the #imp_data array */
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#define IMP_DATA_START_OFFSET 0x40
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#define IMP_DATA_START_OFFSET 0x40
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/** Implementators (vendor) names */
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/** Implementators (vendor) names */
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static char *imp_data[] = {
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static char *imp_data[] = {
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    "?",                    /* IMP_DATA_START_OFFSET */
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    "?",                    /* IMP_DATA_START_OFFSET */
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    "ARM Ltd",              /* 0x41 */
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    "ARM Ltd",              /* 0x41 */
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    "",                 /* 0x42 */
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    "",                 /* 0x42 */
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    "",                                 /* 0x43 */
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    "",                                 /* 0x43 */
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    "Digital Equipment Corporation",    /* 0x44 */
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    "Digital Equipment Corporation",    /* 0x44 */
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    "", "", "", "", "", "", "", "", "", "", /* 0x45 - 0x4e */
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    "", "", "", "", "", "", "", "", "", "", /* 0x45 - 0x4e */
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    "", "", "", "", "", "", "", "", "", "", /* 0x4f - 0x58 */
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    "", "", "", "", "", "", "", "", "", "", /* 0x4f - 0x58 */
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    "", "", "", "", "", "", "", "", "", "", /* 0x59 - 0x62 */
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    "", "", "", "", "", "", "", "", "", "", /* 0x59 - 0x62 */
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    "", "", "", "", "", "",         /* 0x63 - 0x68 */
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    "", "", "", "", "", "",         /* 0x63 - 0x68 */
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    "Intel Corporation"         /* 0x69 */
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    "Intel Corporation"         /* 0x69 */
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};
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};
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/** Length of the #imp_data array */
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/** Length of the #imp_data array */
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static unsigned int imp_data_length = sizeof(imp_data) / sizeof(char *);
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static unsigned int imp_data_length = sizeof(imp_data) / sizeof(char *);
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/** Architecture names */
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/** Architecture names */
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static char *arch_data[] = {
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static char *arch_data[] = {
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    "?",       /* 0x0 */
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    "?",       /* 0x0 */
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    "4",       /* 0x1 */
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    "4",       /* 0x1 */
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    "4T",      /* 0x2 */
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    "4T",      /* 0x2 */
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    "5",       /* 0x3 */
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    "5",       /* 0x3 */
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    "5T",      /* 0x4 */
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    "5T",      /* 0x4 */
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    "5TE",     /* 0x5 */
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    "5TE",     /* 0x5 */
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    "5TEJ",    /* 0x6 */
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    "5TEJ",    /* 0x6 */
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    "6"        /* 0x7 */
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    "6"        /* 0x7 */
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};
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};
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/** Length of the #arch_data array */
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/** Length of the #arch_data array */
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static unsigned int arch_data_length = sizeof(arch_data) / sizeof(char *);
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static unsigned int arch_data_length = sizeof(arch_data) / sizeof(char *);
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/** Retrieves processor identification from CP15 register 0.
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/** Retrieves processor identification from CP15 register 0.
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 *
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 *
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 * @param cpu Structure for storing CPU identification.
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 * @param cpu Structure for storing CPU identification.
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 */
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 */
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static void arch_cpu_identify(cpu_arch_t *cpu)
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static void arch_cpu_identify(cpu_arch_t *cpu)
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{
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{
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    uint32_t ident;
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    uint32_t ident;
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    asm volatile (
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    asm volatile (
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        "mrc p15, 0, %0, c0, c0, 0\n"
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        "mrc p15, 0, %[ident], c0, c0, 0\n"
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        : "=r" (ident)
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        : [ident] "=r" (ident)
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    );
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    );
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    cpu->imp_num = ident >> 24;
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    cpu->imp_num = ident >> 24;
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    cpu->variant_num = (ident << 8) >> 28;
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    cpu->variant_num = (ident << 8) >> 28;
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    cpu->arch_num = (ident << 12) >> 28;
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    cpu->arch_num = (ident << 12) >> 28;
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    cpu->prim_part_num = (ident << 16) >> 20;
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    cpu->prim_part_num = (ident << 16) >> 20;
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    cpu->rev_num = (ident << 28) >> 28;
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    cpu->rev_num = (ident << 28) >> 28;
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}
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}
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/** Does nothing on ARM. */
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/** Does nothing on ARM. */
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void cpu_arch_init(void)
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void cpu_arch_init(void)
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{
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{
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}
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}
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/** Retrieves processor identification and stores it to #CPU.arch */
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/** Retrieves processor identification and stores it to #CPU.arch */
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void cpu_identify(void)
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void cpu_identify(void)
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{
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{
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    arch_cpu_identify(&CPU->arch);
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    arch_cpu_identify(&CPU->arch);
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}
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}
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/** Prints CPU identification. */
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/** Prints CPU identification. */
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void cpu_print_report(cpu_t *m)
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void cpu_print_report(cpu_t *m)
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{
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{
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    char * vendor = imp_data[0];
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    char * vendor = imp_data[0];
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    char * architecture = arch_data[0];
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    char * architecture = arch_data[0];
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    cpu_arch_t * cpu_arch = &m->arch;
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    cpu_arch_t * cpu_arch = &m->arch;
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    if ((cpu_arch->imp_num) > 0 &&
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    if ((cpu_arch->imp_num) > 0 &&
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        (cpu_arch->imp_num < (imp_data_length + IMP_DATA_START_OFFSET))) {
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        (cpu_arch->imp_num < (imp_data_length + IMP_DATA_START_OFFSET))) {
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        vendor = imp_data[cpu_arch->imp_num - IMP_DATA_START_OFFSET];
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        vendor = imp_data[cpu_arch->imp_num - IMP_DATA_START_OFFSET];
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    }
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    }
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    if ((cpu_arch->arch_num) > 0 &&
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    if ((cpu_arch->arch_num) > 0 &&
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        (cpu_arch->arch_num < arch_data_length)) {
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        (cpu_arch->arch_num < arch_data_length)) {
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        architecture = arch_data[cpu_arch->arch_num];
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        architecture = arch_data[cpu_arch->arch_num];
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    }
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    }
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    printf("cpu%d: vendor=%s, architecture=ARM%s, part number=%x, "
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    printf("cpu%d: vendor=%s, architecture=ARM%s, part number=%x, "
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        "variant=%x, revision=%x\n",
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        "variant=%x, revision=%x\n",
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        m->id, vendor, architecture, cpu_arch->prim_part_num,
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        m->id, vendor, architecture, cpu_arch->prim_part_num,
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        cpu_arch->variant_num, cpu_arch->rev_num);
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        cpu_arch->variant_num, cpu_arch->rev_num);
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}
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}
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/** @}
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/** @}
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 */
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 */
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