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1 | /* |
1 | /* |
2 | * Copyright (c) 2001-2004 Jakub Jermar |
2 | * Copyright (c) 2001-2004 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup amd64interrupt |
29 | /** @addtogroup amd64interrupt |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | */ |
33 | */ |
34 | 34 | ||
35 | #include <arch/interrupt.h> |
35 | #include <arch/interrupt.h> |
36 | #include <print.h> |
36 | #include <print.h> |
37 | #include <debug.h> |
37 | #include <debug.h> |
38 | #include <panic.h> |
38 | #include <panic.h> |
39 | #include <arch/drivers/i8259.h> |
39 | #include <arch/drivers/i8259.h> |
40 | #include <func.h> |
40 | #include <func.h> |
41 | #include <cpu.h> |
41 | #include <cpu.h> |
42 | #include <arch/asm.h> |
42 | #include <arch/asm.h> |
43 | #include <mm/tlb.h> |
43 | #include <mm/tlb.h> |
44 | #include <mm/as.h> |
44 | #include <mm/as.h> |
45 | #include <arch.h> |
45 | #include <arch.h> |
46 | #include <symtab.h> |
46 | #include <symtab.h> |
47 | #include <arch/asm.h> |
47 | #include <arch/asm.h> |
48 | #include <proc/scheduler.h> |
48 | #include <proc/scheduler.h> |
49 | #include <proc/thread.h> |
49 | #include <proc/thread.h> |
50 | #include <proc/task.h> |
50 | #include <proc/task.h> |
51 | #include <synch/spinlock.h> |
51 | #include <synch/spinlock.h> |
52 | #include <arch/ddi/ddi.h> |
52 | #include <arch/ddi/ddi.h> |
53 | #include <interrupt.h> |
53 | #include <interrupt.h> |
54 | #include <ddi/irq.h> |
54 | #include <ddi/irq.h> |
55 | 55 | ||
56 | /* |
56 | /* |
57 | * Interrupt and exception dispatching. |
57 | * Interrupt and exception dispatching. |
58 | */ |
58 | */ |
59 | 59 | ||
60 | void (* disable_irqs_function)(uint16_t irqmask) = NULL; |
60 | void (* disable_irqs_function)(uint16_t irqmask) = NULL; |
61 | void (* enable_irqs_function)(uint16_t irqmask) = NULL; |
61 | void (* enable_irqs_function)(uint16_t irqmask) = NULL; |
62 | void (* eoi_function)(void) = NULL; |
62 | void (* eoi_function)(void) = NULL; |
63 | 63 | ||
64 | void decode_istate(int n, istate_t *istate) |
64 | void decode_istate(int n, istate_t *istate) |
65 | { |
65 | { |
66 | char *symbol; |
66 | char *symbol; |
67 | /* uint64_t *x = &istate->stack[0]; */ |
67 | /* uint64_t *x = &istate->stack[0]; */ |
68 | 68 | ||
69 | if (!(symbol = get_symtab_entry(istate->rip))) |
69 | if (!(symbol = get_symtab_entry(istate->rip))) |
70 | symbol = ""; |
70 | symbol = ""; |
71 | 71 | ||
72 | printf("-----EXCEPTION(%d) OCCURED----- ( %s )\n", n, __func__); |
72 | printf("-----EXCEPTION(%d) OCCURED----- ( %s )\n", n, __func__); |
73 | printf("%%rip: %#llx (%s)\n", istate->rip, symbol); |
73 | printf("%%rip: %#llx (%s)\n", istate->rip, symbol); |
74 | printf("ERROR_WORD=%#llx\n", istate->error_word); |
74 | printf("ERROR_WORD=%#llx\n", istate->error_word); |
75 | printf("%%cs=%#llx, rflags=%#llx, %%cr0=%#llx\n", istate->cs, |
75 | printf("%%cs=%#llx, rflags=%#llx, %%cr0=%#llx\n", istate->cs, |
76 | istate->rflags, read_cr0()); |
76 | istate->rflags, read_cr0()); |
77 | printf("%%rax=%#llx, %%rcx=%#llx, %%rdx=%#llx\n", istate->rax, |
77 | printf("%%rax=%#llx, %%rcx=%#llx, %%rdx=%#llx\n", istate->rax, |
78 | istate->rcx, istate->rdx); |
78 | istate->rcx, istate->rdx); |
79 | printf("%%rsi=%#llx, %%rdi=%#llx, %%r8=%#llx\n", istate->rsi, |
79 | printf("%%rsi=%#llx, %%rdi=%#llx, %%r8=%#llx\n", istate->rsi, |
80 | istate->rdi, istate->r8); |
80 | istate->rdi, istate->r8); |
81 | printf("%%r9=%#llx, %%r10=%#llx, %%r11=%#llx\n", istate->r9, |
81 | printf("%%r9=%#llx, %%r10=%#llx, %%r11=%#llx\n", istate->r9, |
82 | istate->r10, istate->r11); |
82 | istate->r10, istate->r11); |
83 | #ifdef CONFIG_DEBUG_ALLREGS |
83 | #ifdef CONFIG_DEBUG_ALLREGS |
84 | printf("%%r12=%#llx, %%r13=%#llx, %%r14=%#llx\n", istate->r12, |
84 | printf("%%r12=%#llx, %%r13=%#llx, %%r14=%#llx\n", istate->r12, |
85 | istate->r13, istate->r14); |
85 | istate->r13, istate->r14); |
86 | printf("%%r15=%#llx, %%rbx=%#llx, %%rbp=%#llx\n", istate->r15, |
86 | printf("%%r15=%#llx, %%rbx=%#llx, %%rbp=%#llx\n", istate->r15, |
87 | istate->rbx, &istate->rbp); |
87 | istate->rbx, &istate->rbp); |
88 | #endif |
88 | #endif |
89 | printf("%%rsp=%#llx\n", &istate->stack[0]); |
89 | printf("%%rsp=%#llx\n", &istate->stack[0]); |
90 | } |
90 | } |
91 | 91 | ||
92 | static void trap_virtual_eoi(void) |
92 | static void trap_virtual_eoi(void) |
93 | { |
93 | { |
94 | if (eoi_function) |
94 | if (eoi_function) |
95 | eoi_function(); |
95 | eoi_function(); |
96 | else |
96 | else |
97 | panic("No eoi_function."); |
97 | panic("No eoi_function."); |
98 | 98 | ||
99 | } |
99 | } |
100 | 100 | ||
101 | static void null_interrupt(int n, istate_t *istate) |
101 | static void null_interrupt(int n, istate_t *istate) |
102 | { |
102 | { |
103 | fault_if_from_uspace(istate, "Unserviced interrupt: %d.", n); |
103 | fault_if_from_uspace(istate, "Unserviced interrupt: %d.", n); |
104 | decode_istate(n, istate); |
104 | decode_istate(n, istate); |
105 | panic("Unserviced interrupt."); |
105 | panic("Unserviced interrupt."); |
106 | } |
106 | } |
107 | 107 | ||
108 | /** General Protection Fault. */ |
108 | /** General Protection Fault. */ |
109 | static void gp_fault(int n, istate_t *istate) |
109 | static void gp_fault(int n, istate_t *istate) |
110 | { |
110 | { |
111 | if (TASK) { |
111 | if (TASK) { |
112 | count_t ver; |
112 | count_t ver; |
113 | 113 | ||
114 | spinlock_lock(&TASK->lock); |
114 | spinlock_lock(&TASK->lock); |
115 | ver = TASK->arch.iomapver; |
115 | ver = TASK->arch.iomapver; |
116 | spinlock_unlock(&TASK->lock); |
116 | spinlock_unlock(&TASK->lock); |
117 | 117 | ||
118 | if (CPU->arch.iomapver_copy != ver) { |
118 | if (CPU->arch.iomapver_copy != ver) { |
119 | /* |
119 | /* |
120 | * This fault can be caused by an early access |
120 | * This fault can be caused by an early access |
121 | * to I/O port because of an out-dated |
121 | * to I/O port because of an out-dated |
122 | * I/O Permission bitmap installed on CPU. |
122 | * I/O Permission bitmap installed on CPU. |
123 | * Install the fresh copy and restart |
123 | * Install the fresh copy and restart |
124 | * the instruction. |
124 | * the instruction. |
125 | */ |
125 | */ |
126 | io_perm_bitmap_install(); |
126 | io_perm_bitmap_install(); |
127 | return; |
127 | return; |
128 | } |
128 | } |
129 | fault_if_from_uspace(istate, "General protection fault."); |
129 | fault_if_from_uspace(istate, "General protection fault."); |
130 | } |
130 | } |
131 | 131 | ||
132 | decode_istate(n, istate); |
132 | decode_istate(n, istate); |
133 | panic("General protection fault."); |
133 | panic("General protection fault."); |
134 | } |
134 | } |
135 | 135 | ||
136 | static void ss_fault(int n, istate_t *istate) |
136 | static void ss_fault(int n, istate_t *istate) |
137 | { |
137 | { |
138 | fault_if_from_uspace(istate, "Stack fault."); |
138 | fault_if_from_uspace(istate, "Stack fault."); |
139 | decode_istate(n, istate); |
139 | decode_istate(n, istate); |
140 | panic("Stack fault."); |
140 | panic("Stack fault."); |
141 | } |
141 | } |
142 | 142 | ||
143 | static void nm_fault(int n, istate_t *istate) |
143 | static void nm_fault(int n, istate_t *istate) |
144 | { |
144 | { |
145 | #ifdef CONFIG_FPU_LAZY |
145 | #ifdef CONFIG_FPU_LAZY |
146 | scheduler_fpu_lazy_request(); |
146 | scheduler_fpu_lazy_request(); |
147 | #else |
147 | #else |
148 | fault_if_from_uspace(istate, "FPU fault."); |
148 | fault_if_from_uspace(istate, "FPU fault."); |
149 | panic("FPU fault."); |
149 | panic("FPU fault."); |
150 | #endif |
150 | #endif |
151 | } |
151 | } |
152 | 152 | ||
153 | #ifdef CONFIG_SMP |
153 | #ifdef CONFIG_SMP |
154 | static void tlb_shootdown_ipi(int n, istate_t *istate) |
154 | static void tlb_shootdown_ipi(int n, istate_t *istate) |
155 | { |
155 | { |
156 | trap_virtual_eoi(); |
156 | trap_virtual_eoi(); |
157 | tlb_shootdown_ipi_recv(); |
157 | tlb_shootdown_ipi_recv(); |
158 | } |
158 | } |
159 | #endif |
159 | #endif |
160 | 160 | ||
161 | /** Handler of IRQ exceptions */ |
161 | /** Handler of IRQ exceptions */ |
162 | static void irq_interrupt(int n, istate_t *istate) |
162 | static void irq_interrupt(int n, istate_t *istate) |
163 | { |
163 | { |
164 | ASSERT(n >= IVT_IRQBASE); |
164 | ASSERT(n >= IVT_IRQBASE); |
165 | 165 | ||
166 | int inum = n - IVT_IRQBASE; |
166 | int inum = n - IVT_IRQBASE; |
167 | bool ack = false; |
167 | bool ack = false; |
168 | ASSERT(inum < IRQ_COUNT); |
168 | ASSERT(inum < IRQ_COUNT); |
169 | ASSERT((inum != IRQ_PIC_SPUR) && (inum != IRQ_PIC1)); |
169 | ASSERT((inum != IRQ_PIC_SPUR) && (inum != IRQ_PIC1)); |
170 | 170 | ||
171 | irq_t *irq = irq_dispatch_and_lock(inum); |
171 | irq_t *irq = irq_dispatch_and_lock(inum); |
172 | if (irq) { |
172 | if (irq) { |
173 | /* |
173 | /* |
174 | * The IRQ handler was found. |
174 | * The IRQ handler was found. |
175 | */ |
175 | */ |
176 | 176 | ||
177 | if (irq->preack) { |
177 | if (irq->preack) { |
178 | /* Send EOI before processing the interrupt */ |
178 | /* Send EOI before processing the interrupt */ |
179 | trap_virtual_eoi(); |
179 | trap_virtual_eoi(); |
180 | ack = true; |
180 | ack = true; |
181 | } |
181 | } |
182 | irq->handler(irq, irq->arg); |
182 | irq->handler(irq, irq->arg); |
183 | spinlock_unlock(&irq->lock); |
183 | spinlock_unlock(&irq->lock); |
184 | } else { |
184 | } else { |
185 | /* |
185 | /* |
186 | * Spurious interrupt. |
186 | * Spurious interrupt. |
187 | */ |
187 | */ |
188 | #ifdef CONFIG_DEBUG |
188 | #ifdef CONFIG_DEBUG |
189 | printf("cpu%d: spurious interrupt (inum=%d)\n", CPU->id, inum); |
189 | printf("cpu%d: spurious interrupt (inum=%d)\n", CPU->id, inum); |
190 | #endif |
190 | #endif |
191 | } |
191 | } |
192 | 192 | ||
193 | if (!ack) |
193 | if (!ack) |
194 | trap_virtual_eoi(); |
194 | trap_virtual_eoi(); |
195 | } |
195 | } |
196 | 196 | ||
197 | void interrupt_init(void) |
197 | void interrupt_init(void) |
198 | { |
198 | { |
199 | int i; |
199 | int i; |
200 | 200 | ||
201 | for (i = 0; i < IVT_ITEMS; i++) |
201 | for (i = 0; i < IVT_ITEMS; i++) |
202 | exc_register(i, "null", (iroutine) null_interrupt); |
202 | exc_register(i, "null", (iroutine) null_interrupt); |
203 | 203 | ||
204 | for (i = 0; i < IRQ_COUNT; i++) { |
204 | for (i = 0; i < IRQ_COUNT; i++) { |
205 | if ((i != IRQ_PIC_SPUR) && (i != IRQ_PIC1)) |
205 | if ((i != IRQ_PIC_SPUR) && (i != IRQ_PIC1)) |
206 | exc_register(IVT_IRQBASE + i, "irq", |
206 | exc_register(IVT_IRQBASE + i, "irq", |
207 | (iroutine) irq_interrupt); |
207 | (iroutine) irq_interrupt); |
208 | } |
208 | } |
209 | 209 | ||
210 | exc_register(7, "nm_fault", (iroutine) nm_fault); |
210 | exc_register(7, "nm_fault", (iroutine) nm_fault); |
211 | exc_register(12, "ss_fault", (iroutine) ss_fault); |
211 | exc_register(12, "ss_fault", (iroutine) ss_fault); |
212 | exc_register(13, "gp_fault", (iroutine) gp_fault); |
212 | exc_register(13, "gp_fault", (iroutine) gp_fault); |
213 | exc_register(14, "ident_mapper", (iroutine) ident_page_fault); |
213 | exc_register(14, "ident_mapper", (iroutine) ident_page_fault); |
214 | 214 | ||
215 | #ifdef CONFIG_SMP |
215 | #ifdef CONFIG_SMP |
216 | exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown", |
216 | exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown", |
217 | (iroutine) tlb_shootdown_ipi); |
217 | (iroutine) tlb_shootdown_ipi); |
218 | #endif |
218 | #endif |
219 | } |
219 | } |
220 | 220 | ||
221 | void trap_virtual_enable_irqs(uint16_t irqmask) |
221 | void trap_virtual_enable_irqs(uint16_t irqmask) |
222 | { |
222 | { |
223 | if (enable_irqs_function) |
223 | if (enable_irqs_function) |
224 | enable_irqs_function(irqmask); |
224 | enable_irqs_function(irqmask); |
225 | else |
225 | else |
226 | panic("No enable_irqs_function."); |
226 | panic("No enable_irqs_function."); |
227 | } |
227 | } |
228 | 228 | ||
229 | void trap_virtual_disable_irqs(uint16_t irqmask) |
229 | void trap_virtual_disable_irqs(uint16_t irqmask) |
230 | { |
230 | { |
231 | if (disable_irqs_function) |
231 | if (disable_irqs_function) |
232 | disable_irqs_function(irqmask); |
232 | disable_irqs_function(irqmask); |
233 | else |
233 | else |
234 | panic("No disable_irqs_function."); |
234 | panic("No disable_irqs_function."); |
235 | } |
235 | } |
236 | 236 | ||
237 | /** @} |
237 | /** @} |
238 | */ |
238 | */ |
239 | 239 |