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1 | /* |
1 | /* |
2 | * Copyright (C) 2001-2004 Jakub Jermar |
2 | * Copyright (C) 2001-2004 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
- | 29 | /** @addtogroup amd64interrupt |
|
- | 30 | * @{ |
|
- | 31 | */ |
|
- | 32 | /** @file |
|
- | 33 | */ |
|
- | 34 | ||
29 | #include <arch/interrupt.h> |
35 | #include <arch/interrupt.h> |
30 | #include <print.h> |
36 | #include <print.h> |
31 | #include <debug.h> |
37 | #include <debug.h> |
32 | #include <panic.h> |
38 | #include <panic.h> |
33 | #include <arch/drivers/i8259.h> |
39 | #include <arch/drivers/i8259.h> |
34 | #include <func.h> |
40 | #include <func.h> |
35 | #include <cpu.h> |
41 | #include <cpu.h> |
36 | #include <arch/asm.h> |
42 | #include <arch/asm.h> |
37 | #include <mm/tlb.h> |
43 | #include <mm/tlb.h> |
38 | #include <mm/as.h> |
44 | #include <mm/as.h> |
39 | #include <arch.h> |
45 | #include <arch.h> |
40 | #include <symtab.h> |
46 | #include <symtab.h> |
41 | #include <arch/asm.h> |
47 | #include <arch/asm.h> |
42 | #include <proc/scheduler.h> |
48 | #include <proc/scheduler.h> |
43 | #include <proc/thread.h> |
49 | #include <proc/thread.h> |
44 | #include <proc/task.h> |
50 | #include <proc/task.h> |
45 | #include <synch/spinlock.h> |
51 | #include <synch/spinlock.h> |
46 | #include <arch/ddi/ddi.h> |
52 | #include <arch/ddi/ddi.h> |
47 | #include <interrupt.h> |
53 | #include <interrupt.h> |
48 | #include <ipc/irq.h> |
54 | #include <ipc/irq.h> |
49 | 55 | ||
50 | void print_info_errcode(int n, istate_t *istate) |
56 | void print_info_errcode(int n, istate_t *istate) |
51 | { |
57 | { |
52 | char *symbol; |
58 | char *symbol; |
53 | /* __u64 *x = &istate->stack[0]; */ |
59 | /* __u64 *x = &istate->stack[0]; */ |
54 | 60 | ||
55 | if (!(symbol=get_symtab_entry(istate->rip))) |
61 | if (!(symbol=get_symtab_entry(istate->rip))) |
56 | symbol = ""; |
62 | symbol = ""; |
57 | 63 | ||
58 | printf("-----EXCEPTION(%d) OCCURED----- ( %s )\n",n, __FUNCTION__); |
64 | printf("-----EXCEPTION(%d) OCCURED----- ( %s )\n",n, __FUNCTION__); |
59 | printf("%%rip: %#llX (%s)\n",istate->rip, symbol); |
65 | printf("%%rip: %#llX (%s)\n",istate->rip, symbol); |
60 | printf("ERROR_WORD=%#llX\n", istate->error_word); |
66 | printf("ERROR_WORD=%#llX\n", istate->error_word); |
61 | printf("%%rcs=%#llX, flags=%#llX, %%cr0=%#llX\n", istate->cs, istate->rflags,read_cr0()); |
67 | printf("%%rcs=%#llX, flags=%#llX, %%cr0=%#llX\n", istate->cs, istate->rflags,read_cr0()); |
62 | printf("%%rax=%#llX, %%rcx=%#llX, %%rdx=%#llX\n",istate->rax,istate->rcx,istate->rdx); |
68 | printf("%%rax=%#llX, %%rcx=%#llX, %%rdx=%#llX\n",istate->rax,istate->rcx,istate->rdx); |
63 | printf("%%rsi=%#llX, %%rdi=%#llX, %%r8 =%#llX\n",istate->rsi,istate->rdi,istate->r8); |
69 | printf("%%rsi=%#llX, %%rdi=%#llX, %%r8 =%#llX\n",istate->rsi,istate->rdi,istate->r8); |
64 | printf("%%r9 =%#llX, %%r10 =%#llX, %%r11=%#llX\n",istate->r9,istate->r10,istate->r11); |
70 | printf("%%r9 =%#llX, %%r10 =%#llX, %%r11=%#llX\n",istate->r9,istate->r10,istate->r11); |
65 | #ifdef CONFIG_DEBUG_ALLREGS |
71 | #ifdef CONFIG_DEBUG_ALLREGS |
66 | printf("%%r12=%#llX, %%r13=%#llX, %%r14=%#llX\n",istate->r12,istate->r13,istate->r14); |
72 | printf("%%r12=%#llX, %%r13=%#llX, %%r14=%#llX\n",istate->r12,istate->r13,istate->r14); |
67 | printf("%%r15=%#llX, %%rbx=%#llX, %%rbp=%#llX\n",istate->r15,istate->rbx,&istate->rbp); |
73 | printf("%%r15=%#llX, %%rbx=%#llX, %%rbp=%#llX\n",istate->r15,istate->rbx,&istate->rbp); |
68 | #endif |
74 | #endif |
69 | printf("%%rsp=%#llX\n",&istate->stack[0]); |
75 | printf("%%rsp=%#llX\n",&istate->stack[0]); |
70 | } |
76 | } |
71 | 77 | ||
72 | /* |
78 | /* |
73 | * Interrupt and exception dispatching. |
79 | * Interrupt and exception dispatching. |
74 | */ |
80 | */ |
75 | 81 | ||
76 | void (* disable_irqs_function)(__u16 irqmask) = NULL; |
82 | void (* disable_irqs_function)(__u16 irqmask) = NULL; |
77 | void (* enable_irqs_function)(__u16 irqmask) = NULL; |
83 | void (* enable_irqs_function)(__u16 irqmask) = NULL; |
78 | void (* eoi_function)(void) = NULL; |
84 | void (* eoi_function)(void) = NULL; |
79 | 85 | ||
80 | void null_interrupt(int n, istate_t *istate) |
86 | void null_interrupt(int n, istate_t *istate) |
81 | { |
87 | { |
82 | fault_if_from_uspace(istate, "unserviced interrupt: %d", n); |
88 | fault_if_from_uspace(istate, "unserviced interrupt: %d", n); |
83 | print_info_errcode(n, istate); |
89 | print_info_errcode(n, istate); |
84 | panic("unserviced interrupt\n"); |
90 | panic("unserviced interrupt\n"); |
85 | } |
91 | } |
86 | 92 | ||
87 | /** General Protection Fault. */ |
93 | /** General Protection Fault. */ |
88 | void gp_fault(int n, istate_t *istate) |
94 | void gp_fault(int n, istate_t *istate) |
89 | { |
95 | { |
90 | if (TASK) { |
96 | if (TASK) { |
91 | count_t ver; |
97 | count_t ver; |
92 | 98 | ||
93 | spinlock_lock(&TASK->lock); |
99 | spinlock_lock(&TASK->lock); |
94 | ver = TASK->arch.iomapver; |
100 | ver = TASK->arch.iomapver; |
95 | spinlock_unlock(&TASK->lock); |
101 | spinlock_unlock(&TASK->lock); |
96 | 102 | ||
97 | if (CPU->arch.iomapver_copy != ver) { |
103 | if (CPU->arch.iomapver_copy != ver) { |
98 | /* |
104 | /* |
99 | * This fault can be caused by an early access |
105 | * This fault can be caused by an early access |
100 | * to I/O port because of an out-dated |
106 | * to I/O port because of an out-dated |
101 | * I/O Permission bitmap installed on CPU. |
107 | * I/O Permission bitmap installed on CPU. |
102 | * Install the fresh copy and restart |
108 | * Install the fresh copy and restart |
103 | * the instruction. |
109 | * the instruction. |
104 | */ |
110 | */ |
105 | io_perm_bitmap_install(); |
111 | io_perm_bitmap_install(); |
106 | return; |
112 | return; |
107 | } |
113 | } |
108 | fault_if_from_uspace(istate, "general protection fault"); |
114 | fault_if_from_uspace(istate, "general protection fault"); |
109 | } |
115 | } |
110 | 116 | ||
111 | print_info_errcode(n, istate); |
117 | print_info_errcode(n, istate); |
112 | panic("general protection fault\n"); |
118 | panic("general protection fault\n"); |
113 | } |
119 | } |
114 | 120 | ||
115 | void ss_fault(int n, istate_t *istate) |
121 | void ss_fault(int n, istate_t *istate) |
116 | { |
122 | { |
117 | fault_if_from_uspace(istate, "stack fault"); |
123 | fault_if_from_uspace(istate, "stack fault"); |
118 | print_info_errcode(n, istate); |
124 | print_info_errcode(n, istate); |
119 | panic("stack fault\n"); |
125 | panic("stack fault\n"); |
120 | } |
126 | } |
121 | 127 | ||
122 | void nm_fault(int n, istate_t *istate) |
128 | void nm_fault(int n, istate_t *istate) |
123 | { |
129 | { |
124 | #ifdef CONFIG_FPU_LAZY |
130 | #ifdef CONFIG_FPU_LAZY |
125 | scheduler_fpu_lazy_request(); |
131 | scheduler_fpu_lazy_request(); |
126 | #else |
132 | #else |
127 | fault_if_from_uspace(istate, "fpu fault"); |
133 | fault_if_from_uspace(istate, "fpu fault"); |
128 | panic("fpu fault"); |
134 | panic("fpu fault"); |
129 | #endif |
135 | #endif |
130 | } |
136 | } |
131 | 137 | ||
132 | void tlb_shootdown_ipi(int n, istate_t *istate) |
138 | void tlb_shootdown_ipi(int n, istate_t *istate) |
133 | { |
139 | { |
134 | trap_virtual_eoi(); |
140 | trap_virtual_eoi(); |
135 | tlb_shootdown_ipi_recv(); |
141 | tlb_shootdown_ipi_recv(); |
136 | } |
142 | } |
137 | 143 | ||
138 | void trap_virtual_enable_irqs(__u16 irqmask) |
144 | void trap_virtual_enable_irqs(__u16 irqmask) |
139 | { |
145 | { |
140 | if (enable_irqs_function) |
146 | if (enable_irqs_function) |
141 | enable_irqs_function(irqmask); |
147 | enable_irqs_function(irqmask); |
142 | else |
148 | else |
143 | panic("no enable_irqs_function\n"); |
149 | panic("no enable_irqs_function\n"); |
144 | } |
150 | } |
145 | 151 | ||
146 | void trap_virtual_disable_irqs(__u16 irqmask) |
152 | void trap_virtual_disable_irqs(__u16 irqmask) |
147 | { |
153 | { |
148 | if (disable_irqs_function) |
154 | if (disable_irqs_function) |
149 | disable_irqs_function(irqmask); |
155 | disable_irqs_function(irqmask); |
150 | else |
156 | else |
151 | panic("no disable_irqs_function\n"); |
157 | panic("no disable_irqs_function\n"); |
152 | } |
158 | } |
153 | 159 | ||
154 | void trap_virtual_eoi(void) |
160 | void trap_virtual_eoi(void) |
155 | { |
161 | { |
156 | if (eoi_function) |
162 | if (eoi_function) |
157 | eoi_function(); |
163 | eoi_function(); |
158 | else |
164 | else |
159 | panic("no eoi_function\n"); |
165 | panic("no eoi_function\n"); |
160 | 166 | ||
161 | } |
167 | } |
162 | 168 | ||
163 | static void ipc_int(int n, istate_t *istate) |
169 | static void ipc_int(int n, istate_t *istate) |
164 | { |
170 | { |
165 | trap_virtual_eoi(); |
171 | trap_virtual_eoi(); |
166 | ipc_irq_send_notif(n-IVT_IRQBASE); |
172 | ipc_irq_send_notif(n-IVT_IRQBASE); |
167 | } |
173 | } |
168 | 174 | ||
169 | 175 | ||
170 | /* Reregister irq to be IPC-ready */ |
176 | /* Reregister irq to be IPC-ready */ |
171 | void irq_ipc_bind_arch(__native irq) |
177 | void irq_ipc_bind_arch(__native irq) |
172 | { |
178 | { |
173 | if (irq == IRQ_CLK) |
179 | if (irq == IRQ_CLK) |
174 | return; |
180 | return; |
175 | exc_register(IVT_IRQBASE+irq, "ipc_int", ipc_int); |
181 | exc_register(IVT_IRQBASE+irq, "ipc_int", ipc_int); |
176 | } |
182 | } |
- | 183 | ||
- | 184 | /** @} |
|
- | 185 | */ |
|
- | 186 | ||
177 | 187 |