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| 1 | /* |
1 | /* |
| 2 | * Copyright (c) 2005 Jakub Vana |
2 | * Copyright (c) 2005 Jakub Vana |
| 3 | * All rights reserved. |
3 | * All rights reserved. |
| 4 | * |
4 | * |
| 5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
| 6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
| 7 | * are met: |
7 | * are met: |
| 8 | * |
8 | * |
| 9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
| 10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
| 11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
| 12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
| 13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
| 14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
| 15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
| 16 | * |
16 | * |
| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 | */ |
27 | */ |
| 28 | 28 | ||
| 29 | /** @addtogroup amd64 |
29 | /** @addtogroup amd64 |
| 30 | * @{ |
30 | * @{ |
| 31 | */ |
31 | */ |
| 32 | /** @file |
32 | /** @file |
| 33 | * |
33 | * |
| 34 | */ |
34 | */ |
| 35 | 35 | ||
| 36 | #include <fpu_context.h> |
36 | #include <fpu_context.h> |
| 37 | #include <arch.h> |
- | |
| 38 | #include <cpu.h> |
- | |
| 39 | 37 | ||
| 40 | /** Save FPU (mmx, sse) context using fxsave instruction */ |
38 | /** Save FPU (mmx, sse) context using fxsave instruction */ |
| 41 | void fpu_context_save(fpu_context_t *fctx) |
39 | void fpu_context_save(fpu_context_t *fctx) |
| 42 | { |
40 | { |
| 43 | asm volatile ( |
41 | asm volatile ( |
| 44 | "fxsave %0" |
42 | "fxsave %0" |
| 45 | : "=m"(*fctx) |
43 | : "=m"(*fctx) |
| 46 | ); |
44 | ); |
| 47 | } |
45 | } |
| 48 | 46 | ||
| 49 | /** Restore FPU (mmx,sse) context using fxrstor instruction */ |
47 | /** Restore FPU (mmx,sse) context using fxrstor instruction */ |
| 50 | void fpu_context_restore(fpu_context_t *fctx) |
48 | void fpu_context_restore(fpu_context_t *fctx) |
| 51 | { |
49 | { |
| 52 | asm volatile ( |
50 | asm volatile ( |
| 53 | "fxrstor %0" |
51 | "fxrstor %0" |
| 54 | : "=m"(*fctx) |
52 | : "=m"(*fctx) |
| 55 | ); |
53 | ); |
| 56 | } |
54 | } |
| 57 | 55 | ||
| 58 | void fpu_init() |
56 | void fpu_init() |
| 59 | { |
57 | { |
| 60 | /* TODO: Zero all SSE, MMX etc. registers */ |
58 | /* TODO: Zero all SSE, MMX etc. registers */ |
| 61 | asm volatile ( |
59 | asm volatile ( |
| 62 | "fninit;" |
60 | "fninit;" |
| 63 | ); |
61 | ); |
| 64 | } |
62 | } |
| 65 | 63 | ||
| 66 | /** @} |
64 | /** @} |
| 67 | */ |
65 | */ |
| 68 | 66 | ||