WebSVN – HelenOS – Diff – /trunk/kernel/arch/amd64/src/amd64.c


/*
 * Copyright (c) 2005 Ondrej Palkovsky
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup amd64
 * @{
 */
/** @file
 */
 
#include <arch.h>
 
#include <arch/types.h>
 
#include <config.h>
 
#include <proc/thread.h>
#include <genarch/drivers/legacy/ia32/io.h>
#include <genarch/drivers/ega/ega.h>
#include <arch/drivers/vesa.h>
#include <genarch/kbd/i8042.h>
#include <arch/drivers/i8254.h>
#include <arch/drivers/i8259.h>
 
#ifdef CONFIG_SMP
#include <arch/smp/apic.h>
#endif
 
#include <arch/bios/bios.h>
#include <arch/cpu.h>
#include <print.h>
#include <arch/cpuid.h>
#include <genarch/acpi/acpi.h>
#include <panic.h>
#include <interrupt.h>
#include <arch/syscall.h>
#include <arch/debugger.h>
#include <syscall/syscall.h>
#include <console/console.h>
#include <ddi/irq.h>
#include <ddi/device.h>
#include <sysinfo/sysinfo.h>
 
 
/** Disable I/O on non-privileged levels
 *
 * Clean IOPL(12,13) and NT(14) flags in EFLAGS register
 */
static void clean_IOPL_NT_flags(void)
{
    asm volatile (
        "pushfq\n"
        "pop %%rax\n"
        "and $~(0x7000), %%rax\n"
        "pushq %%rax\n"
        "popfq\n"
 
 
        ::: "%rax"
    );
}
 
/** Disable alignment check
 *
 * Clean AM(18) flag in CR0 register
 */
static void clean_AM_flag(void)
{
    asm volatile (
        "mov %%cr0, %%rax\n"
        "and $~(0x40000), %%rax\n"
        "mov %%rax, %%cr0\n"
 
 
        ::: "%rax"
    );
}
 
void arch_pre_mm_init(void)
{
    /* Enable no-execute pages */
    set_efer_flag(AMD_NXE_FLAG);
    /* Enable FPU */
    cpu_setup_fpu();
 
    /* Initialize segmentation */
    pm_init();
   
    /* Disable I/O on nonprivileged levels
     * clear the NT (nested-thread) flag
     */
    clean_IOPL_NT_flags();
    /* Disable alignment check */
    clean_AM_flag();
 
    if (config.cpu_active == 1) {
        interrupt_init();
        bios_init();
       
        /* PIC */
        i8259_init();
    }
}
 
 
void arch_post_mm_init(void)
{
    if (config.cpu_active == 1) {
        /* Initialize IRQ routing */
        irq_init(IRQ_COUNT, IRQ_COUNT);
       
        /* hard clock */
        i8254_init();
               
#ifdef CONFIG_FB
        if (vesa_present())
            vesa_init();
        else
#endif
            ega_init(EGA_BASE, EGA_VIDEORAM);   /* video */
       
        /* Enable debugger */
        debugger_init();
        /* Merge all memory zones to 1 big zone */
        zone_merge_all();
    }
   
    /* Setup fast SYSCALL/SYSRET */
    syscall_setup_cpu();
}
 
void arch_post_cpu_init()
{
#ifdef CONFIG_SMP
    if (config.cpu_active > 1) {
        l_apic_init();
        l_apic_debug();
    }
#endif
}
 
void arch_pre_smp_init(void)
{
    if (config.cpu_active == 1) {
#ifdef CONFIG_SMP
        acpi_init();
#endif /* CONFIG_SMP */
    }
}
 
void arch_post_smp_init(void)
{
    devno_t devno = device_assign_devno();
    /* keyboard controller */
    (void) i8042_init((i8042_t *) I8042_BASE, devno, IRQ_KBD);
 
    /*
     * This is the necessary evil until the userspace driver is entirely
     * self-sufficient.
     */
    sysinfo_set_item_val("kbd", NULL, true);
    sysinfo_set_item_val("kbd.devno", NULL, devno);
    sysinfo_set_item_val("kbd.inr", NULL, IRQ_KBD);
}
 
void calibrate_delay_loop(void)
{
    i8254_calibrate_delay_loop();
    if (config.cpu_active == 1) {
        /*
         * This has to be done only on UP.
         * On SMP, i8254 is not used for time keeping and its interrupt pin remains masked.
         */
        i8254_normal_operation();
    }
}
 
/** Set thread-local-storage pointer
 *
 * TLS pointer is set in FS register. Unfortunately the 64-bit
 * part can be set only in CPL0 mode.
 *
 * The specs say, that on %fs:0 there is stored contents of %fs register,
 * we need not to go to CPL0 to read it.
 */
unative_t sys_tls_set(unative_t addr)
{
    THREAD->arch.tls = addr;
    write_msr(AMD_MSR_FS, addr);
    return 0;
}
 
/** Acquire console back for kernel
 *
 */
void arch_grab_console(void)
{
#ifdef CONFIG_FB
    vesa_redraw();
#else
    ega_redraw();
#endif
}
 
/** Return console to userspace
 *
 */
void arch_release_console(void)
{
}
 
/** Construct function pointer
 *
 * @param fptr   function pointer structure
 * @param addr   function address
 * @param caller calling function address
 *
 * @return address of the function pointer
 *
 */
void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
{
    return addr;
}
 
/** @}
 */
 

Rev 3982	Rev 4017
1	/*	1	/*
2	* Copyright (c) 2005 Ondrej Palkovsky	2	* Copyright (c) 2005 Ondrej Palkovsky
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup amd64	29	/** @addtogroup amd64
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35	#include <arch.h>	35	#include <arch.h>
36		36
37	#include <arch/types.h>	37	#include <arch/types.h>
38		38
39	#include <config.h>	39	#include <config.h>
40		40
41	#include <proc/thread.h>	41	#include <proc/thread.h>
42	#include <genarch/drivers/legacy/ia32/io.h>	42	#include <genarch/drivers/legacy/ia32/io.h>
43	#include <genarch/drivers/ega/ega.h>	43	#include <genarch/drivers/ega/ega.h>
44	#include <arch/drivers/vesa.h>	44	#include <arch/drivers/vesa.h>
45	#include <genarch/kbd/i8042.h>	45	#include <genarch/kbd/i8042.h>
46	#include <arch/drivers/i8254.h>	46	#include <arch/drivers/i8254.h>
47	#include <arch/drivers/i8259.h>	47	#include <arch/drivers/i8259.h>
48		48
49	#ifdef CONFIG_SMP	49	#ifdef CONFIG_SMP
50	#include <arch/smp/apic.h>	50	#include <arch/smp/apic.h>
51	#endif	51	#endif
52		52
53	#include <arch/bios/bios.h>	53	#include <arch/bios/bios.h>
54	#include <arch/cpu.h>	54	#include <arch/cpu.h>
55	#include <print.h>	55	#include <print.h>
56	#include <arch/cpuid.h>	56	#include <arch/cpuid.h>
57	#include <genarch/acpi/acpi.h>	57	#include <genarch/acpi/acpi.h>
58	#include <panic.h>	58	#include <panic.h>
59	#include <interrupt.h>	59	#include <interrupt.h>
60	#include <arch/syscall.h>	60	#include <arch/syscall.h>
61	#include <arch/debugger.h>	61	#include <arch/debugger.h>
62	#include <syscall/syscall.h>	62	#include <syscall/syscall.h>
63	#include <console/console.h>	63	#include <console/console.h>
64	#include <ddi/irq.h>	64	#include <ddi/irq.h>
65	#include <ddi/device.h>	65	#include <ddi/device.h>
66	#include <sysinfo/sysinfo.h>	66	#include <sysinfo/sysinfo.h>
67		67
68		68
69	/** Disable I/O on non-privileged levels	69	/** Disable I/O on non-privileged levels
70	*	70	*
71	* Clean IOPL(12,13) and NT(14) flags in EFLAGS register	71	* Clean IOPL(12,13) and NT(14) flags in EFLAGS register
72	*/	72	*/
73	static void clean_IOPL_NT_flags(void)	73	static void clean_IOPL_NT_flags(void)
74	{	74	{
75	asm (	75	asm volatile (
76	"pushfq\n"	76	"pushfq\n"
77	"pop %%rax\n"	77	"pop %%rax\n"
78	"and $~(0x7000), %%rax\n"	78	"and $~(0x7000), %%rax\n"
79	"pushq %%rax\n"	79	"pushq %%rax\n"
80	"popfq\n"	80	"popfq\n"
81	:	-
82	:	-
83	: "%rax"	81	::: "%rax"
84	);	82	);
85	}	83	}
86		84
87	/** Disable alignment check	85	/** Disable alignment check
88	*	86	*
89	* Clean AM(18) flag in CR0 register	87	* Clean AM(18) flag in CR0 register
90	*/	88	*/
91	static void clean_AM_flag(void)	89	static void clean_AM_flag(void)
92	{	90	{
93	asm (	91	asm volatile (
94	"mov %%cr0, %%rax\n"	92	"mov %%cr0, %%rax\n"
95	"and $~(0x40000), %%rax\n"	93	"and $~(0x40000), %%rax\n"
96	"mov %%rax, %%cr0\n"	94	"mov %%rax, %%cr0\n"
97	:	-
98	:	-
99	: "%rax"	95	::: "%rax"
100	);	96	);
101	}	97	}
102		98
103	void arch_pre_mm_init(void)	99	void arch_pre_mm_init(void)
104	{	100	{
105	/* Enable no-execute pages */	101	/* Enable no-execute pages */
106	set_efer_flag(AMD_NXE_FLAG);	102	set_efer_flag(AMD_NXE_FLAG);
107	/* Enable FPU */	103	/* Enable FPU */
108	cpu_setup_fpu();	104	cpu_setup_fpu();
109		105
110	/* Initialize segmentation */	106	/* Initialize segmentation */
111	pm_init();	107	pm_init();
112		108
113	/* Disable I/O on nonprivileged levels	109	/* Disable I/O on nonprivileged levels
114	* clear the NT (nested-thread) flag	110	* clear the NT (nested-thread) flag
115	*/	111	*/
116	clean_IOPL_NT_flags();	112	clean_IOPL_NT_flags();
117	/* Disable alignment check */	113	/* Disable alignment check */
118	clean_AM_flag();	114	clean_AM_flag();
119		115
120	if (config.cpu_active == 1) {	116	if (config.cpu_active == 1) {
121	interrupt_init();	117	interrupt_init();
122	bios_init();	118	bios_init();
123		119
124	/* PIC */	120	/* PIC */
125	i8259_init();	121	i8259_init();
126	}	122	}
127	}	123	}
128		124
129		125
130	void arch_post_mm_init(void)	126	void arch_post_mm_init(void)
131	{	127	{
132	if (config.cpu_active == 1) {	128	if (config.cpu_active == 1) {
133	/* Initialize IRQ routing */	129	/* Initialize IRQ routing */
134	irq_init(IRQ_COUNT, IRQ_COUNT);	130	irq_init(IRQ_COUNT, IRQ_COUNT);
135		131
136	/* hard clock */	132	/* hard clock */
137	i8254_init();	133	i8254_init();
138		134
139	#ifdef CONFIG_FB	135	#ifdef CONFIG_FB
140	if (vesa_present())	136	if (vesa_present())
141	vesa_init();	137	vesa_init();
142	else	138	else
143	#endif	139	#endif
144	ega_init(EGA_BASE, EGA_VIDEORAM); /* video */	140	ega_init(EGA_BASE, EGA_VIDEORAM); /* video */
145		141
146	/* Enable debugger */	142	/* Enable debugger */
147	debugger_init();	143	debugger_init();
148	/* Merge all memory zones to 1 big zone */	144	/* Merge all memory zones to 1 big zone */
149	zone_merge_all();	145	zone_merge_all();
150	}	146	}
151		147
152	/* Setup fast SYSCALL/SYSRET */	148	/* Setup fast SYSCALL/SYSRET */
153	syscall_setup_cpu();	149	syscall_setup_cpu();
154	}	150	}
155		151
156	void arch_post_cpu_init()	152	void arch_post_cpu_init()
157	{	153	{
158	#ifdef CONFIG_SMP	154	#ifdef CONFIG_SMP
159	if (config.cpu_active > 1) {	155	if (config.cpu_active > 1) {
160	l_apic_init();	156	l_apic_init();
161	l_apic_debug();	157	l_apic_debug();
162	}	158	}
163	#endif	159	#endif
164	}	160	}
165		161
166	void arch_pre_smp_init(void)	162	void arch_pre_smp_init(void)
167	{	163	{
168	if (config.cpu_active == 1) {	164	if (config.cpu_active == 1) {
169	#ifdef CONFIG_SMP	165	#ifdef CONFIG_SMP
170	acpi_init();	166	acpi_init();
171	#endif /* CONFIG_SMP */	167	#endif /* CONFIG_SMP */
172	}	168	}
173	}	169	}
174		170
175	void arch_post_smp_init(void)	171	void arch_post_smp_init(void)
176	{	172	{
177	devno_t devno = device_assign_devno();	173	devno_t devno = device_assign_devno();
178	/* keyboard controller */	174	/* keyboard controller */
179	(void) i8042_init((i8042_t *) I8042_BASE, devno, IRQ_KBD);	175	(void) i8042_init((i8042_t *) I8042_BASE, devno, IRQ_KBD);
180		176
181	/*	177	/*
182	* This is the necessary evil until the userspace driver is entirely	178	* This is the necessary evil until the userspace driver is entirely
183	* self-sufficient.	179	* self-sufficient.
184	*/	180	*/
185	sysinfo_set_item_val("kbd", NULL, true);	181	sysinfo_set_item_val("kbd", NULL, true);
186	sysinfo_set_item_val("kbd.devno", NULL, devno);	182	sysinfo_set_item_val("kbd.devno", NULL, devno);
187	sysinfo_set_item_val("kbd.inr", NULL, IRQ_KBD);	183	sysinfo_set_item_val("kbd.inr", NULL, IRQ_KBD);
188	}	184	}
189		185
190	void calibrate_delay_loop(void)	186	void calibrate_delay_loop(void)
191	{	187	{
192	i8254_calibrate_delay_loop();	188	i8254_calibrate_delay_loop();
193	if (config.cpu_active == 1) {	189	if (config.cpu_active == 1) {
194	/*	190	/*
195	* This has to be done only on UP.	191	* This has to be done only on UP.
196	* On SMP, i8254 is not used for time keeping and its interrupt pin remains masked.	192	* On SMP, i8254 is not used for time keeping and its interrupt pin remains masked.
197	*/	193	*/
198	i8254_normal_operation();	194	i8254_normal_operation();
199	}	195	}
200	}	196	}
201		197
202	/** Set thread-local-storage pointer	198	/** Set thread-local-storage pointer
203	*	199	*
204	* TLS pointer is set in FS register. Unfortunately the 64-bit	200	* TLS pointer is set in FS register. Unfortunately the 64-bit
205	* part can be set only in CPL0 mode.	201	* part can be set only in CPL0 mode.
206	*	202	*
207	* The specs say, that on %fs:0 there is stored contents of %fs register,	203	* The specs say, that on %fs:0 there is stored contents of %fs register,
208	* we need not to go to CPL0 to read it.	204	* we need not to go to CPL0 to read it.
209	*/	205	*/
210	unative_t sys_tls_set(unative_t addr)	206	unative_t sys_tls_set(unative_t addr)
211	{	207	{
212	THREAD->arch.tls = addr;	208	THREAD->arch.tls = addr;
213	write_msr(AMD_MSR_FS, addr);	209	write_msr(AMD_MSR_FS, addr);
214	return 0;	210	return 0;
215	}	211	}
216		212
217	/** Acquire console back for kernel	213	/** Acquire console back for kernel
218	*	214	*
219	*/	215	*/
220	void arch_grab_console(void)	216	void arch_grab_console(void)
221	{	217	{
222	#ifdef CONFIG_FB	218	#ifdef CONFIG_FB
223	vesa_redraw();	219	vesa_redraw();
224	#else	220	#else
225	ega_redraw();	221	ega_redraw();
226	#endif	222	#endif
227	}	223	}
228		224
229	/** Return console to userspace	225	/** Return console to userspace
230	*	226	*
231	*/	227	*/
232	void arch_release_console(void)	228	void arch_release_console(void)
233	{	229	{
234	}	230	}
235		231
236	/** Construct function pointer	232	/** Construct function pointer
237	*	233	*
238	* @param fptr function pointer structure	234	* @param fptr function pointer structure
239	* @param addr function address	235	* @param addr function address
240	* @param caller calling function address	236	* @param caller calling function address
241	*	237	*
242	* @return address of the function pointer	238	* @return address of the function pointer
243	*	239	*
244	*/	240	*/
245	void arch_construct_function(fncptr_t fptr, void addr, void caller)	241	void arch_construct_function(fncptr_t fptr, void addr, void caller)
246	{	242	{
247	return addr;	243	return addr;
248	}	244	}
249		245
250	/** @}	246	/** @}
251	*/	247	*/
252		248

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(root)/trunk/kernel/arch/amd64/src/amd64.c – Rev 3982 → 4017