WebSVN – HelenOS – Diff – /trunk/kernel/arch/amd64/src/amd64.c


/*
 * Copyright (c) 2005 Ondrej Palkovsky
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup amd64
 * @{
 */
/** @file
 */
 
#include <arch.h>
 
#include <arch/types.h>
 
#include <config.h>
 
#include <proc/thread.h>
#include <genarch/multiboot/multiboot.h>
#include <genarch/drivers/legacy/ia32/io.h>
#include <genarch/drivers/ega/ega.h>
#include <arch/drivers/vesa.h>
#include <genarch/drivers/i8042/i8042.h>
#include <genarch/kbrd/kbrd.h>
#include <arch/drivers/i8254.h>
#include <arch/drivers/i8259.h>
#include <arch/boot/boot.h>
 
#ifdef CONFIG_SMP
#include <arch/smp/apic.h>
#endif
 
#include <arch/bios/bios.h>
#include <arch/cpu.h>
#include <print.h>
#include <arch/cpuid.h>
#include <genarch/acpi/acpi.h>
#include <panic.h>
#include <interrupt.h>
#include <arch/syscall.h>
#include <arch/debugger.h>
#include <syscall/syscall.h>
#include <console/console.h>
#include <ddi/irq.h>
#include <ddi/device.h>
#include <sysinfo/sysinfo.h>
 
/** Disable I/O on non-privileged levels
 *
 * Clean IOPL(12,13) and NT(14) flags in EFLAGS register
 */
static void clean_IOPL_NT_flags(void)
{
    asm volatile (
        "pushfq\n"
        "pop %%rax\n"
        "and $~(0x7000), %%rax\n"
        "pushq %%rax\n"
        "popfq\n"
        ::: "%rax"
    );
}
 
/** Disable alignment check
 *
 * Clean AM(18) flag in CR0 register
 */
static void clean_AM_flag(void)
{
    asm volatile (
        "mov %%cr0, %%rax\n"
        "and $~(0x40000), %%rax\n"
        "mov %%rax, %%cr0\n"
        ::: "%rax"
    );
}
 
/** Perform amd64-specific initialization before main_bsp() is called.
 *
 * @param signature Should contain the multiboot signature.
 * @param mi        Pointer to the multiboot information structure.
 */
void arch_pre_main(uint32_t signature, const multiboot_info_t *mi)
{
    /* Parse multiboot information obtained from the bootloader. */
    multiboot_info_parse(signature, mi);
   
#ifdef CONFIG_SMP
    /* Copy AP bootstrap routines below 1 MB. */
    memcpy((void *) AP_BOOT_OFFSET, (void *) BOOT_OFFSET,
        (size_t) &_hardcoded_unmapped_size);
#endif
}
 
void arch_pre_mm_init(void)
{
    /* Enable no-execute pages */
    set_efer_flag(AMD_NXE_FLAG);
    /* Enable FPU */
    cpu_setup_fpu();
 
    /* Initialize segmentation */
    pm_init();
   
    /* Disable I/O on nonprivileged levels
     * clear the NT (nested-thread) flag
     */
    clean_IOPL_NT_flags();
    /* Disable alignment check */
    clean_AM_flag();
 
    if (config.cpu_active == 1) {
        interrupt_init();
        bios_init();
       
        /* PIC */
        i8259_init();
    }
}
 
 
void arch_post_mm_init(void)
{
    if (config.cpu_active == 1) {
        /* Initialize IRQ routing */
        irq_init(IRQ_COUNT, IRQ_COUNT);
       
        /* hard clock */
        i8254_init();
       
#ifdef CONFIG_FB
        if (vesa_present())
            vesa_init();
        else
#endif
#ifdef CONFIG_EGA
            ega_init(EGA_BASE, EGA_VIDEORAM);  /* video */
#else
            {}
#endif
       
        /* Enable debugger */
        debugger_init();
        /* Merge all memory zones to 1 big zone */
        zone_merge_all();
    }
   
    /* Setup fast SYSCALL/SYSRET */
    syscall_setup_cpu();
}
 
void arch_post_cpu_init()
{
#ifdef CONFIG_SMP
    if (config.cpu_active > 1) {
        l_apic_init();
        l_apic_debug();
    }
#endif
}
 
void arch_pre_smp_init(void)
{
    if (config.cpu_active == 1) {
#ifdef CONFIG_SMP
        acpi_init();
#endif /* CONFIG_SMP */
    }
}
 
void arch_post_smp_init(void)
{
    devno_t devno = device_assign_devno();
 
        /*
     * Initialize the keyboard module and conect it to stdin. Then
     * initialize the i8042 controller and connect it to kbrdin. Enable
     * keyboard interrupts.
         */
    kbrd_init(stdin);
    (void) i8042_init((i8042_t *) I8042_BASE, devno, IRQ_KBD, &kbrdin);
    trap_virtual_enable_irqs(1 << IRQ_KBD);
 
    /*
     * This is the necessary evil until the userspace driver is entirely
     * self-sufficient.
     */
    sysinfo_set_item_val("kbd", NULL, true);
    sysinfo_set_item_val("kbd.devno", NULL, devno);
    sysinfo_set_item_val("kbd.inr", NULL, IRQ_KBD);
    sysinfo_set_item_val("kbd.address.physical", NULL,
        (uintptr_t) I8042_BASE);
    sysinfo_set_item_val("kbd.address.kernel", NULL,
        (uintptr_t) I8042_BASE);
}
 
void calibrate_delay_loop(void)
{
    i8254_calibrate_delay_loop();
    if (config.cpu_active == 1) {
        /*
         * This has to be done only on UP.
         * On SMP, i8254 is not used for time keeping and its interrupt pin remains masked.
         */
        i8254_normal_operation();
    }
}
 
/** Set thread-local-storage pointer
 *
 * TLS pointer is set in FS register. Unfortunately the 64-bit
 * part can be set only in CPL0 mode.
 *
 * The specs say, that on %fs:0 there is stored contents of %fs register,
 * we need not to go to CPL0 to read it.
 */
unative_t sys_tls_set(unative_t addr)
{
    THREAD->arch.tls = addr;
    write_msr(AMD_MSR_FS, addr);
    return 0;
}
 
/** Acquire console back for kernel
 *
 */
void arch_grab_console(void)
{
#ifdef CONFIG_FB
    vesa_redraw();
#else
    ega_redraw();
#endif
}
 
/** Return console to userspace
 *
 */
void arch_release_console(void)
{
}
 
/** Construct function pointer
 *
 * @param fptr   function pointer structure
 * @param addr   function address
 * @param caller calling function address
 *
 * @return address of the function pointer
 *
 */
void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
{
    return addr;
}
 
/** @}
 */
 

Rev 4042	Rev 4057
1	/*	1	/*
2	* Copyright (c) 2005 Ondrej Palkovsky	2	* Copyright (c) 2005 Ondrej Palkovsky
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup amd64	29	/** @addtogroup amd64
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35	#include <arch.h>	35	#include <arch.h>
36		36
37	#include <arch/types.h>	37	#include <arch/types.h>
38		38
39	#include <config.h>	39	#include <config.h>
40		40
41	#include <proc/thread.h>	41	#include <proc/thread.h>
42	#include <genarch/multiboot/multiboot.h>	42	#include <genarch/multiboot/multiboot.h>
43	#include <genarch/drivers/legacy/ia32/io.h>	43	#include <genarch/drivers/legacy/ia32/io.h>
44	#include <genarch/drivers/ega/ega.h>	44	#include <genarch/drivers/ega/ega.h>
45	#include <arch/drivers/vesa.h>	45	#include <arch/drivers/vesa.h>
46	#include <genarch/drivers/i8042/i8042.h>	46	#include <genarch/drivers/i8042/i8042.h>
47	#include <genarch/kbrd/kbrd.h>	47	#include <genarch/kbrd/kbrd.h>
48	#include <arch/drivers/i8254.h>	48	#include <arch/drivers/i8254.h>
49	#include <arch/drivers/i8259.h>	49	#include <arch/drivers/i8259.h>
50	#include <arch/boot/boot.h>	50	#include <arch/boot/boot.h>
51		51
52	#ifdef CONFIG_SMP	52	#ifdef CONFIG_SMP
53	#include <arch/smp/apic.h>	53	#include <arch/smp/apic.h>
54	#endif	54	#endif
55		55
56	#include <arch/bios/bios.h>	56	#include <arch/bios/bios.h>
57	#include <arch/cpu.h>	57	#include <arch/cpu.h>
58	#include <print.h>	58	#include <print.h>
59	#include <arch/cpuid.h>	59	#include <arch/cpuid.h>
60	#include <genarch/acpi/acpi.h>	60	#include <genarch/acpi/acpi.h>
61	#include <panic.h>	61	#include <panic.h>
62	#include <interrupt.h>	62	#include <interrupt.h>
63	#include <arch/syscall.h>	63	#include <arch/syscall.h>
64	#include <arch/debugger.h>	64	#include <arch/debugger.h>
65	#include <syscall/syscall.h>	65	#include <syscall/syscall.h>
66	#include <console/console.h>	66	#include <console/console.h>
67	#include <ddi/irq.h>	67	#include <ddi/irq.h>
68	#include <ddi/device.h>	68	#include <ddi/device.h>
69	#include <sysinfo/sysinfo.h>	69	#include <sysinfo/sysinfo.h>
70		70
71	/** Disable I/O on non-privileged levels	71	/** Disable I/O on non-privileged levels
72	*	72	*
73	* Clean IOPL(12,13) and NT(14) flags in EFLAGS register	73	* Clean IOPL(12,13) and NT(14) flags in EFLAGS register
74	*/	74	*/
75	static void clean_IOPL_NT_flags(void)	75	static void clean_IOPL_NT_flags(void)
76	{	76	{
77	asm volatile (	77	asm volatile (
78	"pushfq\n"	78	"pushfq\n"
79	"pop %%rax\n"	79	"pop %%rax\n"
80	"and $~(0x7000), %%rax\n"	80	"and $~(0x7000), %%rax\n"
81	"pushq %%rax\n"	81	"pushq %%rax\n"
82	"popfq\n"	82	"popfq\n"
83	::: "%rax"	83	::: "%rax"
84	);	84	);
85	}	85	}
86		86
87	/** Disable alignment check	87	/** Disable alignment check
88	*	88	*
89	* Clean AM(18) flag in CR0 register	89	* Clean AM(18) flag in CR0 register
90	*/	90	*/
91	static void clean_AM_flag(void)	91	static void clean_AM_flag(void)
92	{	92	{
93	asm volatile (	93	asm volatile (
94	"mov %%cr0, %%rax\n"	94	"mov %%cr0, %%rax\n"
95	"and $~(0x40000), %%rax\n"	95	"and $~(0x40000), %%rax\n"
96	"mov %%rax, %%cr0\n"	96	"mov %%rax, %%cr0\n"
97	::: "%rax"	97	::: "%rax"
98	);	98	);
99	}	99	}
100		100
101	/** Perform amd64-specific initialization before main_bsp() is called.	101	/** Perform amd64-specific initialization before main_bsp() is called.
102	*	102	*
103	* @param signature Should contain the multiboot signature.	103	* @param signature Should contain the multiboot signature.
104	* @param mi Pointer to the multiboot information structure.	104	* @param mi Pointer to the multiboot information structure.
105	*/	105	*/
106	void arch_pre_main(uint32_t signature, const multiboot_info_t *mi)	106	void arch_pre_main(uint32_t signature, const multiboot_info_t *mi)
107	{	107	{
108	/* Parse multiboot information obtained from the bootloader. */	108	/* Parse multiboot information obtained from the bootloader. */
109	multiboot_info_parse(signature, mi);	109	multiboot_info_parse(signature, mi);
110		110
111	#ifdef CONFIG_SMP	111	#ifdef CONFIG_SMP
112	/* Copy AP bootstrap routines below 1 MB. */	112	/* Copy AP bootstrap routines below 1 MB. */
113	memcpy((void ) AP_BOOT_OFFSET, (void ) BOOT_OFFSET,	113	memcpy((void ) AP_BOOT_OFFSET, (void ) BOOT_OFFSET,
114	(size_t) &_hardcoded_unmapped_size);	114	(size_t) &_hardcoded_unmapped_size);
115	#endif	115	#endif
116	}	116	}
117		117
118	void arch_pre_mm_init(void)	118	void arch_pre_mm_init(void)
119	{	119	{
120	/* Enable no-execute pages */	120	/* Enable no-execute pages */
121	set_efer_flag(AMD_NXE_FLAG);	121	set_efer_flag(AMD_NXE_FLAG);
122	/* Enable FPU */	122	/* Enable FPU */
123	cpu_setup_fpu();	123	cpu_setup_fpu();
124		124
125	/* Initialize segmentation */	125	/* Initialize segmentation */
126	pm_init();	126	pm_init();
127		127
128	/* Disable I/O on nonprivileged levels	128	/* Disable I/O on nonprivileged levels
129	* clear the NT (nested-thread) flag	129	* clear the NT (nested-thread) flag
130	*/	130	*/
131	clean_IOPL_NT_flags();	131	clean_IOPL_NT_flags();
132	/* Disable alignment check */	132	/* Disable alignment check */
133	clean_AM_flag();	133	clean_AM_flag();
134		134
135	if (config.cpu_active == 1) {	135	if (config.cpu_active == 1) {
136	interrupt_init();	136	interrupt_init();
137	bios_init();	137	bios_init();
138		138
139	/* PIC */	139	/* PIC */
140	i8259_init();	140	i8259_init();
141	}	141	}
142	}	142	}
143		143
144		144
145	void arch_post_mm_init(void)	145	void arch_post_mm_init(void)
146	{	146	{
147	if (config.cpu_active == 1) {	147	if (config.cpu_active == 1) {
148	/* Initialize IRQ routing */	148	/* Initialize IRQ routing */
149	irq_init(IRQ_COUNT, IRQ_COUNT);	149	irq_init(IRQ_COUNT, IRQ_COUNT);
150		150
151	/* hard clock */	151	/* hard clock */
152	i8254_init();	152	i8254_init();
153		153
154	#ifdef CONFIG_FB	154	#ifdef CONFIG_FB
155	if (vesa_present())	155	if (vesa_present())
156	vesa_init();	156	vesa_init();
157	else	157	else
158	#endif	158	#endif
-		159	#ifdef CONFIG_EGA
159	ega_init(EGA_BASE, EGA_VIDEORAM); /* video */	160	ega_init(EGA_BASE, EGA_VIDEORAM); /* video */
-		161	#else
-		162	{}
-		163	#endif
160		164
161	/* Enable debugger */	165	/* Enable debugger */
162	debugger_init();	166	debugger_init();
163	/* Merge all memory zones to 1 big zone */	167	/* Merge all memory zones to 1 big zone */
164	zone_merge_all();	168	zone_merge_all();
165	}	169	}
166		170
167	/* Setup fast SYSCALL/SYSRET */	171	/* Setup fast SYSCALL/SYSRET */
168	syscall_setup_cpu();	172	syscall_setup_cpu();
169	}	173	}
170		174
171	void arch_post_cpu_init()	175	void arch_post_cpu_init()
172	{	176	{
173	#ifdef CONFIG_SMP	177	#ifdef CONFIG_SMP
174	if (config.cpu_active > 1) {	178	if (config.cpu_active > 1) {
175	l_apic_init();	179	l_apic_init();
176	l_apic_debug();	180	l_apic_debug();
177	}	181	}
178	#endif	182	#endif
179	}	183	}
180		184
181	void arch_pre_smp_init(void)	185	void arch_pre_smp_init(void)
182	{	186	{
183	if (config.cpu_active == 1) {	187	if (config.cpu_active == 1) {
184	#ifdef CONFIG_SMP	188	#ifdef CONFIG_SMP
185	acpi_init();	189	acpi_init();
186	#endif /* CONFIG_SMP */	190	#endif /* CONFIG_SMP */
187	}	191	}
188	}	192	}
189		193
190	void arch_post_smp_init(void)	194	void arch_post_smp_init(void)
191	{	195	{
192	devno_t devno = device_assign_devno();	196	devno_t devno = device_assign_devno();
193		197
194	/*	198	/*
195	* Initialize the keyboard module and conect it to stdin. Then	199	* Initialize the keyboard module and conect it to stdin. Then
196	* initialize the i8042 controller and connect it to kbrdin. Enable	200	* initialize the i8042 controller and connect it to kbrdin. Enable
197	* keyboard interrupts.	201	* keyboard interrupts.
198	*/	202	*/
199	kbrd_init(stdin);	203	kbrd_init(stdin);
200	(void) i8042_init((i8042_t *) I8042_BASE, devno, IRQ_KBD, &kbrdin);	204	(void) i8042_init((i8042_t *) I8042_BASE, devno, IRQ_KBD, &kbrdin);
201	trap_virtual_enable_irqs(1 << IRQ_KBD);	205	trap_virtual_enable_irqs(1 << IRQ_KBD);
202		206
203	/*	207	/*
204	* This is the necessary evil until the userspace driver is entirely	208	* This is the necessary evil until the userspace driver is entirely
205	* self-sufficient.	209	* self-sufficient.
206	*/	210	*/
207	sysinfo_set_item_val("kbd", NULL, true);	211	sysinfo_set_item_val("kbd", NULL, true);
208	sysinfo_set_item_val("kbd.devno", NULL, devno);	212	sysinfo_set_item_val("kbd.devno", NULL, devno);
209	sysinfo_set_item_val("kbd.inr", NULL, IRQ_KBD);	213	sysinfo_set_item_val("kbd.inr", NULL, IRQ_KBD);
210	sysinfo_set_item_val("kbd.address.physical", NULL,	214	sysinfo_set_item_val("kbd.address.physical", NULL,
211	(uintptr_t) I8042_BASE);	215	(uintptr_t) I8042_BASE);
212	sysinfo_set_item_val("kbd.address.kernel", NULL,	216	sysinfo_set_item_val("kbd.address.kernel", NULL,
213	(uintptr_t) I8042_BASE);	217	(uintptr_t) I8042_BASE);
214	}	218	}
215		219
216	void calibrate_delay_loop(void)	220	void calibrate_delay_loop(void)
217	{	221	{
218	i8254_calibrate_delay_loop();	222	i8254_calibrate_delay_loop();
219	if (config.cpu_active == 1) {	223	if (config.cpu_active == 1) {
220	/*	224	/*
221	* This has to be done only on UP.	225	* This has to be done only on UP.
222	* On SMP, i8254 is not used for time keeping and its interrupt pin remains masked.	226	* On SMP, i8254 is not used for time keeping and its interrupt pin remains masked.
223	*/	227	*/
224	i8254_normal_operation();	228	i8254_normal_operation();
225	}	229	}
226	}	230	}
227		231
228	/** Set thread-local-storage pointer	232	/** Set thread-local-storage pointer
229	*	233	*
230	* TLS pointer is set in FS register. Unfortunately the 64-bit	234	* TLS pointer is set in FS register. Unfortunately the 64-bit
231	* part can be set only in CPL0 mode.	235	* part can be set only in CPL0 mode.
232	*	236	*
233	* The specs say, that on %fs:0 there is stored contents of %fs register,	237	* The specs say, that on %fs:0 there is stored contents of %fs register,
234	* we need not to go to CPL0 to read it.	238	* we need not to go to CPL0 to read it.
235	*/	239	*/
236	unative_t sys_tls_set(unative_t addr)	240	unative_t sys_tls_set(unative_t addr)
237	{	241	{
238	THREAD->arch.tls = addr;	242	THREAD->arch.tls = addr;
239	write_msr(AMD_MSR_FS, addr);	243	write_msr(AMD_MSR_FS, addr);
240	return 0;	244	return 0;
241	}	245	}
242		246
243	/** Acquire console back for kernel	247	/** Acquire console back for kernel
244	*	248	*
245	*/	249	*/
246	void arch_grab_console(void)	250	void arch_grab_console(void)
247	{	251	{
248	#ifdef CONFIG_FB	252	#ifdef CONFIG_FB
249	vesa_redraw();	253	vesa_redraw();
250	#else	254	#else
251	ega_redraw();	255	ega_redraw();
252	#endif	256	#endif
253	}	257	}
254		258
255	/** Return console to userspace	259	/** Return console to userspace
256	*	260	*
257	*/	261	*/
258	void arch_release_console(void)	262	void arch_release_console(void)
259	{	263	{
260	}	264	}
261		265
262	/** Construct function pointer	266	/** Construct function pointer
263	*	267	*
264	* @param fptr function pointer structure	268	* @param fptr function pointer structure
265	* @param addr function address	269	* @param addr function address
266	* @param caller calling function address	270	* @param caller calling function address
267	*	271	*
268	* @return address of the function pointer	272	* @return address of the function pointer
269	*	273	*
270	*/	274	*/
271	void arch_construct_function(fncptr_t fptr, void addr, void caller)	275	void arch_construct_function(fncptr_t fptr, void addr, void caller)
272	{	276	{
273	return addr;	277	return addr;
274	}	278	}
275		279
276	/** @}	280	/** @}
277	*/	281	*/
278		282

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(root)/trunk/kernel/arch/amd64/src/amd64.c @ 3406 – Rev 4042 → 4057